LM22672/LM22672Q 42V, 1A SIMPLE SWITCHER(R) Step-Down Voltage Regulator with Features General Description Features The LM22672 switching regulator provides all of the functions necessary to implement an efficient high voltage step-down (buck) regulator using a minimum of external components. This easy to use regulator incorporates a 42V N-channel MOSFET switch capable of providing up to 1A of load current. Excellent line and load regulation along with high efficiency (>90%) are featured. Voltage mode control offers short minimum on-time, allowing the widest ratio between input and output voltages. Internal loop compensation means that the user is free from the tedious task of calculating the loop compensation components. Fixed 5V output and adjustable output voltage options are available. The default switching frequency is set at 500 kHz allowing for small external components and good transient response. In addition, the frequency can be adjusted over a range of 200 kHz to 1MHz with a single external resistor. The internal oscillator can be synchronized to a system clock or to the oscillator of another regulator. A precision enable input allows simplification of regulator control and system power sequencing. In shutdown mode the regulator draws only 25 A (typ.). An adjustable soft-start feature is provided through the selection of a single external capacitor. The LM22672 also has built in thermal shutdown, and current limiting to protect against accidental overloads. The LM22672 is a member of Texas Instruments' SIMPLE SWITCHERTM family. The SIMPLE SWITCHERTM concept provides for an easy to use complete design using a minimum number of external components and the TI WEBENCH(R) design tool. TI's WEBENCH(R) tool includes features such as external component calculation, electrical simulation, thermal simulation, and Build-It boards for easy design-in. Wide input voltage range: 4.5V to 42V Internally compensated voltage mode control Stable with low ESR ceramic capacitors 200 m N-channel MOSFET Output voltage options: -ADJ (outputs as low as 1.285V) -5.0 (output fixed to 5V) 1.5% feedback reference accuracy 500 kHz default switching frequency Adjustable switching frequency and synchronization -40C to 125C junction temperature range Precision enable input Integrated boot-strap diode Adjustable soft-start Fully WEBENCH(R) enabled LM22672Q is an Automotive Grade product that is AECQ100 grade 1 qualified (-40C to +125C junction temperature) Package PSOP-8 (Exposed Pad) Applications Industrial control Telecom and datacom systems Embedded systems Conversions from standard 24V, 12V and 5V input rails Simplified Application Schematic 30076701 (c) 2012 Texas Instruments Incorporated 300767 SNVS588K www.ti.com 42V, 1A SIMPLE SWITCHER(R) Step-Down Voltage Regulator with Features June 22, 2012 LM22672/LM22672Q Connection Diagram 30076740 8-Lead Plastic PSOP-8 Package TI Package Number MRA08B Ordering Information Output Voltage Order Number TI Package Drawing Package Type Supplied As ADJ LM22672MR-ADJ 95 Units in Rails ADJ LM22672MRE-ADJ 250 Units in Tape and Reel ADJ LM22672MRX-ADJ 5.0 LM22672MR-5.0 5.0 LM22672MRE-5.0 250 Units in Tape and Reel 5.0 LM22672MRX-5.0 2500 Units in Tape and Reel ADJ LM22672MR-ADJ 95 Units in Rails ADJ LM22672QMRE-ADJ 250 Units in Tape and Reel ADJ LM22672QMRX-ADJ 2500 Units in Tape and Reel 5.0 LM22672QMR-5.0 5.0 LM22672QMRE-5.0 250 Units in Tape and Reel 5.0 LM22672QMRX-5.0 2500 Units in Tape and Reel PSOP-8 Exposed Pad MRA08B PSOP-8 Exposed Pad MRA08B Features 2500 Units in Tape and Reel 95 Units in Rails 95 Units in Rails AEC-Q100 Grade 1 qualified. Automotive Grade Production Flow* *Automotive Grade (Q) product incorporates enhanced manufacturing and support processes for the automotive market, including defect detection methodologies. Reliability qualification is compliant with the requirements and temperature grades defined in the AEC-Q100 standard. Automotive grade products are identified with the letter Q. For more information go to http://www.ti.com/automotive. Pin Descriptions Pin Name Description Application Information 1 BOOT Bootstrap input Provides the gate voltage for the high side NFET. SS Soft-start input Used to increase soft-start time. See Soft-Start section of data sheet. 2 3 RT/SYNC Oscillator mode control input Used to control oscillator mode of regulator. See Frequency Adjustment and Synchronization section of data sheet. 4 FB Feedback input Feedback input to regulator. 5 EN Enable input Used to control regulator start-up and shutdown. See Precision Enable section of data sheet. 6 GND Ground input to regulator; system common System ground pin. 7 VIN Input voltage Supply input to the regulator. 8 SW Switch output Switching output of regulator. EP EP Exposed Pad Connect to ground. Provides thermal connection to PCB. See applications information. www.ti.com 2 If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and specifications. VIN to GND EN Pin Voltage SS, RT/SYNC Pin Voltage SW to GND (Note 2) BOOT Pin Voltage FB Pin Voltage Power Dissipation 43V -0.5V to 6V -0.5V to 7V -5V to VIN VSW + 7V -0.5V to 7V Internally Limited Operating Ratings 150C 2 kV -65C to +150C (Note 1) Supply Voltage (VIN) Junction Temperature Range 4.5V to 42V -40C to +125C Electrical Characteristics Limits in standard type are for TJ = 25C only; limits in boldface type apply over the junction temperature (TJ) range of -40C to +125C. Minimum and Maximum limits are guaranteed through test, design, or statistical correlation. Typical values represent the most likely parametric norm at TA = TJ = 25C, and are provided for reference purposes only. Unless otherwise specified: VIN = 12V. Symbol Parameter Conditions Min (Note 5) Typ (Note 4) Max (Note 5) Units Feedback Voltage VIN = 8V to 42V 4.925/4.9 5.0 5.075/5.1 V Feedback Voltage VIN = 4.7V to 42V 1.266/1.259 1.285 1.304/1.311 V 3.4 6 mA LM22672-5.0 VFB LM22672-ADJ VFB All Output Voltage Versions IQ ISTDBY Quiescent Current VFB = 5V Standby Quiescent Current EN Pin = 0V ICL Current Limit IL Output Leakage Current 25 40 A 1.5 1.7/1.8 A VIN = 42V, EN Pin = 0V, VSW = 0V 0.2 2 A VSW = -1V 0.1 3 A 1.3/1.2 0.2 0.24/0.32 Fsw Oscillator Frequency 400 500 600 kHz TOFF Minimum Off-time 100 200 300 ns TON Minimum On-time IBIAS Feedback Bias Current VFB = 1.3V (ADJ Version Only) VEN Enable Threshold Voltage Falling VENHYST Enable Voltage Hysteresis RDS(ON) Switch On-Resistance 100 ns 230 1.3 1.6 nA 1.9 V 0.6 V Enable Input Current EN Input = 0V 6 A FSYNC Maximum Synchronization Frequency VSYNC = 3.5V, 50% duty-cycle 1 MHz VSYNC Synchronization Threshold Voltage 1.75 V IEN ISS Soft-Start Current TSD Thermal Shutdown Threshold JA Thermal Resistance 30 MR Package, Junction to ambient thermal resistance (Note 6) 3 50 70 A 150 C 60 C/W www.ti.com LM22672/LM22672Q Junction Temperature For soldering specifications, refer to the following document: www.ti.com/lit/ snoa549 ESD Rating (Note 3) Human Body Model Storage Temperature Range Absolute Maximum Ratings (Note 1) LM22672/LM22672Q Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur, including inoperability and degradation of device reliability and/or performance. Functional operation of the device and/or non-degradation at the Absolute Maximum Ratings or other conditions beyond those indicated in the recommended Operating Ratings is not implied. Operating Range conditions indicate conditions at which the device is functional and should not be operated beyond such conditions. For guaranteed specifications and conditions, see the Electrical Characteristics table. Note 2: The absolute maximum specification of the `SW to GND' applies to DC voltage. An extended negative voltage limit of -10V applies to a pulse of up to 50 ns. Note 3: The human body model (HBM) is a 100 pF capacitor discharged through a 1.5 k resistor into each pin. Applicable standard is JESD-22-A114-C Note 4: Typical values represent most likely parametric norms at the conditions specified and are not guaranteed. Note 5: Min and Max limits are 100% production tested at 25C. Limits over the operating temperature range are guaranteed through correlation using Statistical Quality Control (SQC) methods. Limits are used to calculate National's Average Outgoing Quality Level (AOQL). Note 6: The value of JA for the PSOP-8 exposed pad (MR) package of 60C/W is valid if package is mounted to 1 square inch of copper. The JA value can range from 42 to 115C/W depending on the amount of PCB copper dedicated to heat transfer. Typical Performance Characteristics Unless otherwise specified the following conditions apply: Vin = 12V, TJ = 25C. Efficiency vs IOUT and VIN VOUT = 3.3V Normalized Switching Frequency vs Temperature 30076704 30076727 Current Limit vs Temperature Normalized RDS(ON) vs Temperature 30076708 30076703 www.ti.com 4 Normalized Enable Threshold Voltage vs Temperature 30076705 30076710 Standby Quiescent Current vs Input Voltage Normalized Feedback Voltage vs Temperature 30076707 30076706 Normalized Feedback Voltage vs Input Voltage Switching Frequency vs RT/SYNC Resistor 30076713 30076709 5 www.ti.com LM22672/LM22672Q Feedback Bias Current vs Temperature LM22672/LM22672Q Soft-start Current vs Temperature 30076742 www.ti.com 6 LM22672/LM22672Q Simplified Block Diagram 30076781 FIGURE 1. Simplified Block Diagram 7 www.ti.com LM22672/LM22672Q Detailed Operating Description The LM22672 incorporates a voltage mode constant frequency PWM architecture. In addition, input voltage feed-forward is used to stabilize the loop gain against variations in input voltage. This allows the loop compensation to be optimized for transient performance. The power MOSFET, in conjunction with the diode, produce a rectangular waveform at the switch pin, that swings from about zero volts to VIN. The inductor and output capacitor average this waveform to become the regulator output voltage. By adjusting the duty cycle of this waveform, the output voltage can be controlled. The error amplifier compares the output voltage with the internal reference and adjusts the duty cycle to regulate the output at the desired value. The internal loop compensation of the -ADJ option is optimized for outputs of 5V and below. If an output voltage of 5V or greater is required, the -5.0 option can be used with an external voltage divider. The minimum output voltage is equal to the reference voltage; 1.285V (typ.). The functional block diagram of the LM22672 is shown in Figure 1 . Where Voff is the input voltage where the regulator shuts off, and Von is the voltage where the regulator turns on. Due to the 6 A pull-up, the current in the divider should be much larger than this. A value of 20 k, for RENB is a good first choice. Also, a zener diode may be needed between the EN pin and ground, in order to comply with the absolute maximum ratings on this pin. Precision Enable and UVLO 30076774 The precision enable input (EN) is used to control the regulator. The precision feature allows simple sequencing of multiple power supplies with a resistor divider from another supply. Connecting this pin to ground or to a voltage less than 1.6V (typ.) will turn off the regulator. The current drain from the input supply, in this state, is 25 A (typ.) at an input voltage of 12V. The EN input has an internal pull-up of about 6 A. Therefore this pin can be left floating or pulled to a voltage greater than 2.2V (typ.) to turn the regulator on. The hysteresis on this input is about 0.6V (typ.) above the 1.6V (typ.) threshold. When driving the enable input, the voltage must never exceed the 6V absolute maximum specification for this pin. Although an internal pull-up is provided on the EN pin, it is good practice to pull the input high, when this feature is not used, especially in noisy environments. This can most easily be done by connecting a resistor between VIN and the EN pin. The resistor is required, since the internal zener diode, at the EN pin, will conduct for voltages above about 6V. The current in this zener must be limited to less than 100 A. A resistor of 470 k will limit the current to a safe value for input voltages as high 42V. Smaller values of resistor can be used at lower input voltages. The LM22672 also incorporates an input under voltage lockout (UVLO) feature. This prevents the regulator from turning on when the input voltage is not great enough to properly bias the internal circuitry. The rising threshold is 4.3V (typ.) while the falling threshold is 3.9V (typ.). In some cases these thresholds may be too low to provide good system performance. The solution is to use the EN input as an external UVLO to disable the part when the input voltage falls below a lower boundary. This is often used to prevent excessive battery discharge or early turn-on during start-up. This method is also recommended to prevent abnormal device operation in applications where the input voltage falls below the minimum of 4.5V. Figure 2 shows the connections to implement this method of UVLO. The following equations can be used to determine the correct resistor values: FIGURE 2. External UVLO Connections Duty-Cycle Limits Ideally the regulator would control the duty cycle over the full range of zero to one. However due to inherent delays in the circuitry, there are limits on both the maximum and minimum duty cycles that can be reliably controlled. This in turn places limits on the maximum and minimum input and output voltages that can be converted by the LM22672. A minimum ontime is imposed by the regulator in order to correctly measure the switch current during a current limit event. A minimum offtime is imposed in order the re-charge the bootstrap capacitor. The following equation can be used to determine the approximate maximum input voltage for a given output voltage: Where Fsw is the switching frequency and TON is the minimum on-time; both found in the Electrical Characteristics table. If the frequency adjust feature is used, that value should be used for Fsw. Nominal values should be used. The worst case is lowest output voltage, and highest switching frequency. If this input voltage is exceeded, the regulator will skip cycles, effectively lowering the switching frequency. The consequences of this are higher output voltage ripple and a degradation of the output voltage accuracy. The second limitation is the maximum duty cycle before the output voltage will "dropout" of regulation. The following equation can be used to approximate the minimum input voltage before dropout occurs: The values of TOFF and RDS(ON) are found in the Electrical Characteristics table. The worst case here is highest switch- www.ti.com 8 If the frequency synchronization feature is used, the current limit frequency fold-back is not operational, and the system may not survive a hard short-circuit at the output. The safe operating areas, when in short circuit mode, are shown in Figure 3 through Figure 5, for different switching frequencies. Operating points below and to the right of the curve represent safe operation. Note that these curves are not valid when the LM22672 is in frequency synchronization mode. Current Limit The LM22672 has current limiting to prevent the switch current from exceeding safe values during an accidental overload on the output. This peak current limit is found in the Electrical Characteristics table under the heading of ICL. The maximum load current that can be provided, before current limit is reached, is determined from the following equation: 45 INPUT VOLTAGE (v) 40 Where L is the value of the power inductor. When the LM22672 enters current limit, the output voltage will drop and the peak inductor current will be fixed at ICL at the end of each cycle. The switching frequency will remain constant while the duty cycle drops. The load current will not remain constant, but will depend on the severity of the overload and the output voltage. For very severe overloads ("short-circuit"), the regulator changes to a low frequency current foldback mode of operation. The frequency foldback is about 1/5 of the nominal switching frequency. This will occur when the current limit trips before the minimum on-time has elapsed. This mode of operation is used to prevent inductor current "run-away", and is associated with very low output voltages when in overload. The following equation can be used to determine what level of output voltage will cause the part to change to low frequency current foldback: 35 30 SAFE OPERATING AREA 25 20 15 10 5 0.0 0.2 0.4 0.6 0.8 1.0 SHORT CIRCUIT VOLTAGE (v) 1.2 30076792 FIGURE 3. SOA at 300 kHz 45 INPUT VOLTAGE (v) 40 Where Fsw is the normal switching frequency and Vin is the maximum for the application. If the overload drives the output voltage to less than or equal to Vx, the part will enter current foldback mode. If a given application can drive the output voltage to Vx, during an overload, then a second criterion must be checked. The next equation gives the maximum input voltage, when in this mode, before damage occurs: 35 30 25 SAFE OPERATING AREA 20 15 10 5 0.0 0.2 0.4 0.6 0.8 1.0 SHORT CIRCUIT VOLTAGE (v) 1.2 30076790 Where Vsc is the value of output voltage during the overload and Fsw is the normal switching frequency. If the input voltage should exceed this value, while in foldback mode, the regulator and/or the diode may be damaged. It is important to note that the voltages in these equations are measured at the inductor. Normal trace and wiring resistance will cause the voltage at the inductor to be higher than that at a remote load. Therefore, even if the load is shorted with zero volts across its terminals, the inductor will still see a finite voltage. It is this value that should be used for Vx and Vsc in the calculations. In order to return from foldback mode, the load must be reduced to a value much lower than that required to initiate foldback. This load "hysteresis" is a normal aspect of any type of current limit foldback associated with voltage regulators. FIGURE 4. SOA at 500 kHz 9 www.ti.com LM22672/LM22672Q ing frequency and highest load. In this equation, RL is the D.C. inductor resistance. Of course, the lowest input voltage to the regulator must not be less than 4.5V (typ.). LM22672/LM22672Q The choice of switching frequency is governed by several considerations. As an example, lower frequencies may be desirable to reduce switching losses or improve duty cycle limits. Higher frequencies, or a specific frequency, may be desirable to avoid problems with EMI or reduce the physical size of external components. The flexibility of increasing the switching frequency above 500 kHz can also be used to operate outside a critical signal frequency band for a given application. Keep in mind that the values of inductor and output capacitor cannot be reduced dramatically, by operating above 500 kHz. This is true because the design of the internal loop compensation restricts the range of these components. Frequency synchronization requires some care. First the external clock frequency must be greater than the internal clock frequency, and less than 1 MHz. The maximum internal switching frequency is guaranteed in the Electrical Characteristics table. Note that the frequency adjust feature and the synchronization feature can not be used simultaneously. The synchronizing frequency must always be greater than the internal clock frequency. Secondly, the RT/SYNC pin must see a valid high or low voltage, during start-up, in order for the regulator to go into the synchronizing mode (see above). Also, the amplitude of the synchronizing pulses must comport with VSYNC levels found in the Electrical Characteristics table. The regulator will synchronize on the rising edge of the external clock. If the external clock is lost during normal operation, the regulator will revert to the 500 kHz (typ.) internal clock. If the frequency synchronization feature is used, current limit foldback is not operational; see the Current Limit section for details. 45 INPUT VOLTAGE (v) 40 35 30 25 20 SAFE OPERATING AREA 15 10 5 0.0 0.2 0.4 0.6 0.8 1.0 SHORT CIRCUIT VOLTAGE (v) 1.2 30076791 FIGURE 5. SOA at 800 kHz Soft-Start The soft-start feature allows the regulator to gradually reach steady-state operation, thus reducing start-up stresses. The internal soft-start feature brings the output voltage up in about 500 s. This time can be extended by using an external capacitor connected to the SS pin. Values in the range of 100 nF to 1 F are recommended. The approximate soft-start time can be estimated from the following equation: Soft-start is reset any time the part is shut down or a thermal overload event occurs. Switching Frequency Adjustment and Synchronization The LM22672 will operate in three different modes, depending on the condition of the RT/SYNC pin. With the RT/SYNC pin floating, the regulator will switch at the internally set frequency of 500 kHz (typ.). With a resistor in the range of 25 k to 200 k, connected from RT/SYNC to ground, the internal switching frequency can be adjusted from 1MHz to 200 kHz. Figure 6 shows the typical curve for switching frequency vs. the external resistance connected to the RT/SYNC pin. The accuracy of the switching frequency, in this mode, is slightly worse than that of the internal oscillator; about +/- 25% is to be expected. Finally, an external clock can be applied to the RT/SYNC pin to allow the regulator to synchronize to a system clock or another LM22672. The mode is set during start-up of the regulator. When the LM22672 is enabled, or after VIN is applied, a weak pull-up is connected to the RT/ SYNC pin and, after approximately 100 s, the voltage on the pin is checked against a threshold of about 0.8V. With the RT/ SYNC pin open, the voltage floats above this threshold, and the mode is set to run with the internal clock. With a frequency set resistor present, an internal reference holds the pin voltage at 0.8V; the resulting current sets the mode to allow the resistor to control the clock frequency. If the external circuit forces the RT/SYNC pin to a voltage much greater or less than 0.8v, the mode is set to allow external synchronization. The mode is latched until either the EN or the input supply is cycled. www.ti.com 30076713 FIGURE 6. Switching Frequency vs RT/SYNC Resistor Self Synchronization It is possible to synchronize multiple LM22672 regulators together to share the same switching frequency. This can be done by tieing the RT/SYNC pins together through a MOSFET and connecting a 1 K resistor to ground at each pin. Figure 7 shows this connection. The gate of the MOSFET should be connected to the regulator with the highest output voltage. Also, the EN pins of both regulators should be tied to the common system enable, in order to properly initialize both regulators. The operation is as follows: When the regulators are enabled, the outputs are low and the MOSFET is off. The 1 k resistors pull the RT/SYNC pins low, thus enabling the synchronization mode. These resistors are small enough to 10 functions. The LM22672 has internal type III loop compensation, as detailed in Figure 8. This is the approximate "straight line" function from the FB pin to the input of the PWM modulator. The power stage transfer function consists of a D.C. gain and a second order pole created by the inductor and output capacitor(s). Due to the input voltage feedforward employed in the LM22672, the power stage D.C. gain is fixed at 20dB. The second order pole is characterized by its resonant frequency and its quality factor (Q). For a first pass design, the product of inductance and output capacitance should conform to the following equation: Alternatively, this pole should be placed between 1.5kHz and 15kHz and is given by the equation shown below: The Q factor depends on the parasitic resistance of the power stage components and is not typically in the control of the designer. Of course, loop compensation is only one consideration when selecting power stage components; see the Application Information section for more details. 30076776 FIGURE 7. Self Synchronizing Setup 40 COMPENSATOR GAIN (dB) Boot-Strap Supply The LM22672 incorporates a floating high-side gate driver to control the power MOSFET. The supply for this driver is the external boot-strap capacitor connected between the BOOT pin and SW. A good quality 10 nF ceramic capacitor must be connected to these pins with short, wide PCB traces. One reason the regulator imposes a minimum off-time is to ensure that this capacitor recharges every switching cycle. A minimum load of about 5 mA is required to fully recharge the bootstrap capacitor in the minimum off-time. Some of this load can be provided by the output voltage divider, if used. 35 -ADJ -5.0 30 25 20 15 10 5 0 Thermal Protection 100 Internal thermal shutdown circuitry protects the LM22672 should the maximum junction temperature be exceeded. This protection is activated at about 150C, with the result that the regulator will shutdown until the temperature drops below about 135C. 1k 10k 100k 1M FREQUENCY (Hz) 10M 30076783 FIGURE 8. Compensator Gain In general, hand calculations or simulations can only aid in selecting good power stage components. Good design practice dictates that load and line transient testing should be done to verify the stability of the application. Also, Bode plot measurements should be made to determine stability margins. Application note AN-1889 shows how to perform a loop transfer function measurement with only an oscilloscope and function generator. Internal Loop Compensation The LM22672 has internal loop compensation designed to provide a stable regulator over a wide range of external power stage components. The internal compensation of the -ADJ option is optimized for output voltages below 5V. If an output voltage of 5V or greater is needed, the -5.0 option with an external resistor divider can be used. Ensuring stability of a design with a specific power stage (inductor and output capacitor) can be tricky. The LM22672 stability can be verified using the WEBENCH(R) Designer online circuit simulation tool at www.ti.com. A quick start spreadsheet can also be downloaded from the online product folder. The complete transfer function for the regulator loop is found by combining the compensation and power stage transfer Application Information Typical Buck Regulator Application Figure 9 shows an example of converting an input voltage range of 5.5V to 35V, to an output of 3.3v at 1 Amp. See AN-1896 for more information. 11 www.ti.com LM22672/LM22672Q pull the RT/SYNC pin low, rather than activate the frequency adjust mode. Once the output voltage of one of the regulators is sufficient to turn on the MOSFET, the two RT/SYNC pins are tied together and the regulators will run in synchronized mode. The two regulators will be clocked at the same frequency but slightly phase shifted according to the minimum off-time of the regulator with the fastest internal oscillator. The slight phase shift helps to reduce stress on the input capacitors of the regulator. It is important to choose a MOSFET with a low gate threshold voltage so that the MOSFET will be fully enhanced. Also, a MOSFET with low inter-electrode capacitance is required. The 2N7002 is a good choice. LM22672/LM22672Q 30076778 FIGURE 9. Typical Buck Regulator Application EXTERNAL COMPONENTS The following guidelines should be used when designing a step-down (buck) converter with the LM22672. it can saturate resulting in damage to the LM22672 and/ or the power diode. Input Capacitor The input capacitor selection is based on both input voltage ripple and RMS current. Good quality input capacitors are necessary to limit the ripple voltage at the VIN pin while supplying most of the regulator current during switch on-time. Low ESR ceramic capacitors are preferred. Larger values of input capacitance are desirable to reduce voltage ripple and noise on the input supply. This noise may find its way into other circuitry, sharing the same input supply, unless adequate bypassing is provided. A very approximate formula for determining the input voltage ripple is shown below: Inductor The inductor value is determined based on the load current, ripple current, and the minimum and maximum input voltages. To keep the application in continuous conduction mode (CCM), the maximum ripple current, IRIPPLE , should be less than twice the minimum load current. The general rule of keeping the inductor current peak-to-peak ripple around 30% of the nominal output current is a good compromise between excessive output voltage ripple and excessive component size and cost. Using this value of ripple current, the value of inductor, L, is calculated using the following formula: Where Vri is the peak-to-peak ripple voltage at the switching frequency. Another concern is the RMS current passing through this capacitor. The following equation gives an approximation to this current: where Fsw is the switching frequency and Vin should be taken at its maximum value, for the given application. The above formula provides a guide to select the value of the inductor L; the nearest standard value will then be used in the circuit. Once the inductor is selected, the actual ripple current can be found from the equation shown below: The capacitor must be rated for at least this level of RMS current at the switching frequency. All ceramic capacitors have large voltage coefficients, in addition to normal tolerances and temperature coefficients. To help mitigate these effects, multiple capacitors can be used in parallel to bring the minimum capacitance up to the desired value. This may also help with RMS current constraints by sharing the current among several capacitors. Many times it is desirable to use an electrolytic capacitor on the input, in parallel with the ceramics. The moderate ESR of this capacitor can help to damp any ringing on the input supply caused by long power leads. This method can also help to reduce voltage spikes that may exceed the maximum input voltage rating of the LM22672. It is good practice to include a high frequency bypass capacitor as close as possible to the LM22672. This small case size, low ESR, ceramic capacitor should be connected directly to the VIN and GND pins with the shortest possible PCB traces. Values in the range of 0.47 F to 1 F are appropriate. This Increasing the inductance will generally slow down the transient response but reduce the output voltage ripple. Reducing the inductance will generally improve the transient response but increase the output voltage ripple. The inductor must be rated for the peak current, IPK, in a given application, to prevent saturation. During normal loading conditions, the peak current is equal to the load current plus 1/2 of the inductor ripple current. During an overload condition, as well as during certain load transients, the controller may trip current limit. In this case the peak inductor current is given by ICL, found in the Electrical Characteristics table. Good design practice requires that the inductor rating be adequate for this overload condition. If the inductor is not rated for the maximum expected current, www.ti.com 12 vider are as follows: 7.38k from the FB pin to the input of the error amplifier and 2.55k from there to ground. Both the -ADJ and -5.0 options can be used for output voltages greater than 5V, by using the correct output divider. As mentioned in the Internal Loop Compensation section, the -5.0 option is optimized for output voltages of 5V. However, for output voltages greater than 5V, this option may provide better loop bandwidth than the -ADJ option, in some applications. If the -5.0 option is to be used at output voltages greater than 5V, the following equation should be used to determine the resistor values in the output divider: Output Capacitor The output capacitor is responsible for filtering the output voltage and supplying load current during transients. Capacitor selection depends on application conditions as well as ripple and transient requirements. Best performance is achieved with a parallel combination of ceramic capacitors and a low ESR SPTM or POSCAPTM type. Very low ESR capacitors such as ceramics reduce the output ripple and noise spikes, while higher value electrolyticsor polymer provide large bulk capacitance to supply transients. Assuming very low ESR, the following equation gives an approximation to the output voltage ripple: Again a value of RFBB of about 1k is a good first choice. Typically, a total value of 100 F, or greater, is recommended for output capacitance. In applications with Vout less than 3.3V, it is critical that low ESR output capacitors are selected. This will limit potential output voltage overshoots as the input voltage falls below the device normal operating range. If the switching frequency is set higher than 500 kHz, the capacitance value may not be reduced proportionally due to stability requirements. The internal compensation is optimized for circuits with a 500 kHz switching frequency. See the Internal Loop Compensation section for more details. 30076768 FIGURE 10. Output Voltage Divider Boot-strap Capacitor The bootstrap capacitor between the BOOT pin and the SW pin supplies the gate current to turn on the N-channel MOSFET. The recommended value of this capacitor is 10 nF and should be a good quality, low ESR ceramic capacitor. In some cases it may be desirable to slow down the turn-on of the internal power MOSFET, in order to reduce EMI. This can be done by placing a small resistor in series with the Cboot capacitor. Resistors in the range of 10 to 50 can be used. This technique should only be used when absolutely necessary, since it will increase switching losses and thereby reduce efficiency. A maximum value of 10 k is recommended for the sum of RFBB and RFBT to maintain good output voltage accuracy for the -ADJ option. A maximum of 2 k is recommended for the -5.0 option. For the -5.0 option, the total internal divider resistance is typically 9.93 k. In all cases the output voltage divider should be placed as close as possible to the FB pin of the LM22672; since this is a high impedance input and is susceptible to noise pick-up. Power Diode A Schottky type power diode is required for all LM22672 applications. Ultra-fast diodes are not recommended and may result in damage to the IC due to reverse recovery current transients. The near ideal reverse recovery characteristics and low forward voltage drop of Schottky diodes are particularly important for high input voltage and low output voltage applications common to the LM22672. The reverse breakdown rating of the diode should be selected for the maximum VIN, plus some safety margin. A good rule of thumb is to select a diode with a reverse voltage rating of 1.3 times the maximum input voltage. Select a diode with an average current rating at least equal to the maximum load current that will be seen in the application. Output Voltage Divider Selection For output voltages between about 1.285V and 5V, the -ADJ option should be used, with an appropriate voltage divider as shown in Figure 10. The following equation can be used to calculate the resistor values of this divider: A good value for RFBB is 1k . This will help to provide some of the minimum load current requirement and reduce susceptibility to noise pick-up. The top of RFBT should be connected directly to the output capacitor or to the load for remote sensing. If the divider is connected to the load, a local highfrequency bypass should be provided at that location. For output voltages of 5V, the -5.0 option should be used. In this case no divider is needed and the FB pin is connected to the output. The approximate values of the internal voltage di- Circuit Board Layout Board layout is critical for the proper operation of switching power supplies. First, the ground plane area must be sufficient for thermal dissipation purposes. Second, appropriate guidelines must be followed to reduce the effects of switching noise. Switch mode converters are very fast switching devices. In such cases, the rapid increase of input current combined with the parasitic trace inductance generates un- 13 www.ti.com LM22672/LM22672Q capacitor helps to provide a low impedance supply to sensitive internal circuitry. It also helps to suppress any fast noise spikes on the input supply that may lead to increased EMI. LM22672/LM22672Q wanted L di/dt noise spikes. The magnitude of this noise tends to increase as the output current increases. This noise may turn into electromagnetic interference (EMI) and can also cause problems in device performance. Therefore, care must be taken in layout to minimize the effect of this switching noise. The most important layout rule is to keep the AC current loops as small as possible. Figure 11 shows the current flow in a buck converter. The top schematic shows a dotted line which represents the current flow during the FET switch on-state. The middle schematic shows the current flow during the FET switch off-state. The bottom schematic shows the currents referred to as AC currents. These AC currents are the most critical since they are changing in a very short time period. The dotted lines of the bottom schematic are the traces to keep as short and wide as possible. This will also yield a small loop area reducing the loop inductance. To avoid functional problems due to layout, review the PCB layout example. Best results are achieved if the placement of the LM22672, the bypass capacitor, the Schottky diode, RFBB, RFBT, and the inductor are placed as shown in the example. Note that, in the layout shown, R1 = RFBB and R2 = RFBT. It is also recommended to use 2oz copper boards or heavier to help thermal dissipation and to reduce the parasitic inductances of board traces. See application note AN-1229 for more information. Thermal Considerations The components with the highest power dissipation are the power diode and the power MOSFET internal to the LM22672 regulator. The easiest method to determine the power dissipation within the LM22672 is to measure the total conversion losses then subtract the power losses in the diode and inductor. The total conversion loss is the difference between the input power and the output power. An approximation for the power diode loss is: Where VD is the diode voltage drop. An approximation for the inductor power is: where RL is the DC resistance of the inductor and the 1.1 factor is an approximation for the AC losses. The regulator has an exposed thermal pad to aid power dissipation. Adding multiple vias under the device to the ground plane will greatly reduce the regulator junction temperature. Selecting a diode with an exposed pad will also aid the power dissipation of the diode. The most significant variables that affect the power dissipation of the regulator are output current, input voltage and operating frequency. The power dissipated while operating near the maximum output current and maximum input voltage can be appreciable. The junction-toambient thermal resistance of the LM22672 will vary with the application. The most significant variables are the area of copper in the PC board, the number of vias under the IC exposed pad and the amount of forced air cooling provided. A large continuous ground plane on the top or bottom PCB layer will provide the most effective heat dissipation. The integrity of the solder connection from the IC exposed pad to the PC board is critical. Excessive voids will greatly diminish the thermal dissipation capacity. The junction-to-ambient thermal resistance of the LM22672 PSOP-8 package is specified in the Electrical Characteristics table. See application note AN-2020 for more information. 30076724 FIGURE 11. Current Flow in a Buck Application www.ti.com 14 LM22672/LM22672Q PCB Layout Example 30076741 15 www.ti.com LM22672/LM22672Q 30076798 FIGURE 12. Inverting Regulator Application www.ti.com 16 LM22672/LM22672Q Physical Dimensions inches (millimeters) unless otherwise noted 8-Lead Plastic PSOP-8 Package TI Package Number MRA08B 17 www.ti.com 42V, 1A SIMPLE SWITCHER(R) Step-Down Voltage Regulator with Features Notes www.ti.com IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are sold subject to TI's terms and conditions of sale supplied at the time of order acknowledgment. TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI's standard warranty. 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