TDA6402M/C1 - Philips Semiconductors / NXP Semiconductors

DATA SH EET

Product speciﬁcation

Supersedes data of 1998 Jul 28

File under Integrated Circuits, IC02

2000 Jan 24

INTEGRATED CIRCUITS

TDA6402; TDA6402A; TDA6403;

TDA6403A

5 V mixers/oscillators and

synthesizers for cable TV and VCR

2-band tuners

2000 Jan 24 2

Philips Semiconductors Product speciﬁcation

5 V mixers/oscillators and synthesizers for

cable TV and VCR 2-band tuners TDA6402; TDA6402A;

TDA6403; TDA6403A

FEATURES

•Single-chip 5 V mixer/oscillator and synthesizer for

cable TV and VCR tuners

•Synthesizer function compatible with existing TSA5526

•Universal bus protocol (I2C-bus or 3-wire bus)

– Bus protocol for 18 or 19-bit transmission (3-wire

bus)

– Extraprotocolfor27-bittransmission(testmodesand

features for 3-wire bus)

– Address + 4 data bytes transmission (I2C-bus ‘write’

mode)

– Address + 1 status byte (I2C-bus ‘read’ mode)

– 4 independent I2C-bus addresses.

•1 PNP buffer for UHF band selection (25 mA)

•3 PNP buffers for general purpose, e.g. 2 VHF

sub-bands, FM sound trap (25 mA)

•33 V tuning voltage output

•In-lock detector

•5-step A/D converter (3 bits in I2C-bus mode)

•15-bit programmable divider

•Programmable reference divider ratio (512, 640 or

1024)

•Programmable charge pump current (60 or 280 µA)

•Programmable automatic charge pump current switch

•Varicap drive disable

•Mixer/oscillator function compatible with existing

TDA5732

•Balanced mixer with a common emitter input for VHF

(single input)

•Balanced mixer with a common base input for UHF

(balanced input)

•2-pin common emitter oscillator for VHF

•4-pin common emitter oscillator for UHF

•IF preamplifier with asymmetrical 75 Ωoutput

impedance to drive a low-ohmic impedance (75 Ω)

•Low power

•Low radiation

•Small size

•TheTDA6402AandTDA6403AdifferfromtheTDA6402

and TDA6403 by the UHF port protocol in the I2C-bus

mode (see Tables 3 and 4).

APPLICATIONS

•Cable tuners for TV and VCR (switched concept for

VHF)

•Recommended RF bands for the USA:

55.25 to 133.25 MHz, 139.25 to 361.25 MHz and

367.25 to 801.25 MHz.

GENERAL DESCRIPTION

The TDA6402, TDA6402A, TDA6403 and TDA6403A are

programmable2-bandmixers/oscillatorsandsynthesizers

intended for VHF/UHF cable tuners (see Fig.1).

The devices include two double balanced mixers and two

oscillators for the VHF and UHF band respectively, an IF

amplifier and a PLL synthesizer. The VHF band can be

split-up into two sub-bands using a proper oscillator

application and a switchable inductor. Two pins are

available between the mixer output and the IF amplifier

input to enable IF filtering for improved signal handling.

Four PNP ports are provided. Band selection is provided

by using pin PUHF. When PUHF is ‘ON’, the UHF

mixer-oscillator is active and the VHF band is switched off.

When PUHF is ‘OFF’, the VHF mixer-oscillator is active

and the UHF band is ‘OFF’. PVHFL and PVHFH are used

to select the VHF sub-bands. FMST is a general purpose

port, that can be used to switch an FM sound trap. When

itisused,thesumofthecollectorcurrentshastobelimited

to 30 mA.

The synthesizer consists of a divide-by-eight prescaler, a

15-bit programmable divider, a crystal oscillator and its

programmable reference divider and a phase/frequency

detector combined with a charge pump which drives the

tuning amplifier, including 33 V output (V33) at pin VT.

Depending on the reference divider ratio (512, 640 or

1024), the phase comparator operates at 7.8125 kHz,

6.25 kHz or 3.90625 kHz with a 4 MHz crystal.

2000 Jan 24 3

Philips Semiconductors Product speciﬁcation

5 V mixers/oscillators and synthesizers for

cable TV and VCR 2-band tuners TDA6402; TDA6402A;

TDA6403; TDA6403A

The device can be controlled according to the I2C-bus

format or 3-wire bus format depending on the voltage

applied to pin SW (see Table 2). In the 3-wire bus mode

(SW = HIGH), pin LOCK/ADC is the LOCK output.

The LOCK output is LOW when the PLL loop is locked.

In the I2C-bus mode (SW = LOW), the lock detector bit FL

is set to logic 1 when the loop is locked and is read on the

SDA line (Status Byte; SB) during a READ operation in

I2C-bus mode only. The Analog-to-Digital Converter

(ADC) input is available on pin LOCK/ADC for digital AFC

control in the I2C-bus mode only. The ADC code is read

during a READ operation on the I2C-bus (see Table 11).

In test mode, pin LOCK/ADC is used as a TEST output for

fREF and1⁄2fDIV,inbothI2C-busmodeand3-wirebusmode

(see Table 7).

When the automatic charge pump current switch mode is

activated and when the loop is phase-locked, the charge

pumpcurrent valueis automaticallyswitched toLOW. This

action is taken to improve the carrier-to-noise ratio.

The status of this feature can be read in the ACPS flag

during a READ operation on the I2C-bus (see Table 9).

I2C-bus mode (SW = GND)

Five serial bytes (including address byte) are required to

address the device, select the VCO frequency, program

the four ports, set the charge pump current and set the

reference divider ratio. The device has four independent

I2C-bus addresses which can be selected by applying a

specific voltage on input CE (see Table 6).

3-wire bus mode (SW = OPEN or VCC)

Data is transmitted to the devices during a HIGH-level on

inputCE (enableline). The deviceis compatiblewith 18-bit

and19-bitdata formats,asshowninFigs 4 and 5. Thefirst

four bits are used to program the PNP ports and the

remaining bits control the programmable divider. A 27-bit

data format may also be used to set the charge pump

current, the reference divider ratio and for test purposes

(see Fig.6).

It is not allowed to address the devices with words whose

length is different from 18, 19 or 27 bits.

Table 1 Data word length for 3-wire bus

Note

1. The selection of the reference divider is given by an automatic identification of the data word length. When the 27-bit

format is used, the reference divider is controlled by RSA and RSB bits (see Table 8). More details are given in

Chapter “PLL functional description”, Section “3-wire bus mode (SW = OPEN or VCC)”.

TYPE NUMBER DATA WORD REFERENCE DIVIDER(1) FREQUENCY STEP

TDA6402; TDA6402A; TDA6403; TDA6403A 18-bit 512 62.50 kHz

TDA6402; TDA6402A; TDA6403; TDA6403A 19-bit 1024 31.25 kHz

TDA6402; TDA6402A; TDA6403; TDA6403A 27-bit programmable programmable

2000 Jan 24 4

Philips Semiconductors Product speciﬁcation

5 V mixers/oscillators and synthesizers for

cable TV and VCR 2-band tuners TDA6402; TDA6402A;

TDA6403; TDA6403A

QUICK REFERENCE DATA

Measured over full voltage and temperature ranges; unless otherwise speciﬁed.

Notes

1. One buffer ‘ON’, Io= 25 mA; two buffers ‘ON’, maximum sum of Io= 30 mA.

2. The power dissipation is calculated as follows:

ORDERING INFORMATION

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

VCC supply voltage operating 4.5 5 5.5 V

ICC supply current all PNP ports are ‘OFF’ −71 −mA

fXTAL crystal oscillator input frequency 3.2 4.0 4.48 MHz

Io(PNP) PNP port output current note 1 −−30 mA

Ptot total power dissipation note 2 −−490 mW

Tstg IC storage temperature −40 −+150 °C

Tamb ambient temperature −20 −+85 °C

fRF RF frequency VHF band 55.25 −361.25 MHz

UHF band 367.25 −801.25 MHz

GVvoltage gain VHF band −19 −dB

UHF band −29 −dB

NF noise ﬁgure VHF band −8.5 −dB

UHF band −9−dB

Vooutput voltage causing 1% cross

modulation in channel VHF band −108 −dBµV

UHF band −108 −dBµV

TYPE NUMBER PACKAGE

NAME DESCRIPTION VERSION

TDA6402M;

TDA6402AM SSOP28 plastic shrink small outline package; 28 leads; body width 5.3 mm SOT341-1

TDA6403M;

TDA6403AM SSOP28 plastic shrink small outline package; 28 leads; body width 5.3 mm SOT341-1

Ptot VCC ICC Io

–()V

CE(sat PNP) Io

--- V33





22 kΩ

-----------------------

+×+×=

2000 Jan 24 5

Philips Semiconductors Product speciﬁcation

5 V mixers/oscillators and synthesizers for

cable TV and VCR 2-band tuners TDA6402; TDA6402A;

TDA6403; TDA6403A

BLOCK DIAGRAM

Fig.1 Block diagram.

The pin numbers in parenthesis represent the TDA6403 and TDA6403A.

handbook, full pagewidth

MGE692

PRESCALER

DIVIDE BY

512, 640, 1024

XTAL

OSCILLATOR

4 MHz

15-BIT

PROGRAMMABLE

DIVIDER

15-BIT

FREQUENCY

PRESCALER

DIVIDE BY 8

POWER-DOWN

DETECTOR

PHASE

COMPARATOR

IN LOCK

DETECTOR

CHARGE

PUMP OPAMP

T0, T1, T2 CP OS

CP T2 T1 T0 RSA RSB OS

CONTROL

I2C / 3-WIRE BUS TRANSCEIVER

3-BIT A/D

CONVERTER

PORT

UHF VHFH VHFL FMST

FL fREF

fREF

1/2fDIV

fDIV

GATE

RF INPUT

VHF VHF

MIXER VHF

OSCILLATOR

RF INPUT

UHF UHF

MIXER UHF

OSCILLATOR

PREAMPLIFIER

BS BS

BSBS BS

T0, T1, T2

RSA RSB

VHFIN

RFGND

UHFIN1

UHFIN2

XTAL

CE/AS

IFFIL1 IFFIL2 VCC

VHFOSCOC

VHFOSCIB

OSCGND

IFOUT

UHFOSCIB2

UHFOSCOC2

UHFOSCOC1

UHFOSCIB1

GND

FMST

PVHFL

PVHFH

PUHF

LOCK/ADC

3 (26)

4 (25)

1 (28)

2 (27)

18 (11)

14 (15)

13 (16)

11 (18)

12 (17)

15 (14) 9 (20) 8 (21) 7 (22) 10 (19)

(8) 21

(12) 17

(13) 16

(4) 25

(3) 26

(2) 27

(1) 28

(9) 20

(6) 23

(7) 22

(5) 24

19 (10)

6 (23)

5 (24)

SCL

SDA

SW CE/AS

TDA6402

TDA6402A

TDA6403

TDA6403A

2000 Jan 24 6

Philips Semiconductors Product speciﬁcation

5 V mixers/oscillators and synthesizers for

cable TV and VCR 2-band tuners TDA6402; TDA6402A;

TDA6403; TDA6403A

PINNING

SYMBOL PIN DESCRIPTION

TDA6402;

TDA6402A TDA6403;

TDA6403A

UHFIN1 1 28 UHF RF input 1

UHFIN2 2 27 UHF RF input 2

VHFIN 3 26 VHF RF input

RFGND 4 25 RF ground

IFFIL1 5 24 IF ﬁlter output 1

IFFIL2 6 23 IF ﬁlter output 2

PVHFL 7 22 PNP port output, general purpose (e.g. VHF low sub-band)

PVHFH 8 21 PNP port output, general purpose (e.g. VHF high sub-band)

PUHF 9 20 PNP port output, UHF band

FMST 10 19 PNP port output, general purpose (e.g. FM sound trap)

SW 11 18 bus mode selection input (I2C-bus/3-wire bus)

CE/AS 12 17 Chip Enable/Address Selection input

DA 13 16 serial data input/output

CL 14 15 serial clock input

LOCK/ADC 15 14 lock detector output (3-wire bus)/ADC input (I2C-bus)

CP 16 13 charge pump output

VT 17 12 tuning voltage output

XTAL 18 11 crystal oscillator input

VCC 19 10 supply voltage

IFOUT 20 9 IF output

GND 21 8 digital ground

VHFOSCIB 22 7 VHF oscillator input base

OSCGND 23 6 oscillator ground

VHFOSCOC 24 5 VHF oscillator output collector

UHFOSCIB1 25 4 UHF oscillator input base 1

UHFOSCOC1 26 3 UHF oscillator output collector 1

UHFOSCOC2 27 2 UHF oscillator output collector 2

UHFOSCIB2 28 1 UHF oscillator input base 2

2000 Jan 24 7

Philips Semiconductors Product speciﬁcation

5 V mixers/oscillators and synthesizers for

cable TV and VCR 2-band tuners TDA6402; TDA6402A;

TDA6403; TDA6403A

Fig.2 Pin configuration for TDA6402 and

TDA6402A.

handbook, halfpage

UHFIN1

UHFIN2

VHFIN

RFGND

IFFIL1

IFFIL2

PVHFL

PVHFH

PUHF

FMST

CE/AS

UHFOSCIB2

UHFOSCOC2

UHFOSCOC1

UHFOSCIB1

OSCGND

VHFOSCIB

VHFOSCOC

GND

IFOUT

VCC

XTAL

LOCK/ADC

1514

TDA6402

TDA6402A

MGE690

Fig.3 Pin configuration for TDA6403 and

TDA6403A.

handbook, halfpage

UHFIN1

UHFIN2

VHFIN

RFGND

IFFIL1

IFFIL2

PVHFL

PVHFH

PUHF

FMST

CE/AS

UHFOSCIB2

UHFOSCOC2

UHFOSCOC1

UHFOSCIB1

OSCGND

VHFOSCIB

VHFOSCOC

GND

IFOUT

VCC

XTAL

LOCK/ADC

1514

TDA6403

TDA6403A

MGE691

PLL FUNCTIONAL DESCRIPTION

The device is controlled via the I2C-bus or the 3-wire bus,

depending on the voltage applied on the SW input.

A HIGH-level on the SW input enables the 3-wire bus;

CE/AS, DA and CL inputs are used as enable (CE), data

and clock inputs respectively. A LOW-level on SW input

enables the I2C-bus; the CE/AS, DA and CL inputs are

used as address selection (AS), SDA and SCL input

respectively (see Table 2).

Table 2 Bus mode selection

SYMBOL PIN 3-WIRE BUS MODE I2C-BUS MODE

TDA6402;

TDA6402A TDA6403;

TDA6403A

SW 11 18 HIGH-level or OPEN LOW-level or GND

CE/AS 12 17 enable input address selection input

DA 13 16 data input serial data input

CL 14 15 clock input serial clock input

LOCK/ADC 15 14 LOCK/TEST output ADC input/TEST output

2000 Jan 24 8

Philips Semiconductors Product speciﬁcation

5 V mixers/oscillators and synthesizers for

cable TV and VCR 2-band tuners TDA6402; TDA6402A;

TDA6403; TDA6403A

I2C-bus mode (SW = GND)

WRITE MODE; R/W = 0 (see Tables 3 and 4)

Data bytes can be sent to the device after the address

transmission (first byte). Four data bytes are needed to

fully program the device. The bus transceiver has an

auto-increment facility which permits the programming of

the device within one single transmission

(address + 4 data bytes).

The device can also be partially programmed providing

that the first data byte following the address is divider

byte 1 (DB1) or control byte (CB). The bits in the data

bytes are defined in Tables 3 and 4. The first bit of the first

data byte transmitted indicates whether frequency data

(first bit = 0) or control and band-switch data (first bit = 1)

will follow. Until an I2C-bus STOP command is sent by the

controller,additional data bytescanbe entered withoutthe

need to re-address the device. The frequency register is

loaded after the 8th clock pulse of the second divider byte

(DB2), the control register is loaded after the 8th clock

pulse of the control byte (CB) and the band-switch register

is loaded after the 8th clock pulse of the band switch byte

(BB).

I2C-BUS ADDRESS SELECTION

The module address contains programmable address bits

(MA1 and MA0) which offer the possibility of having

several synthesizers (up to 4) in one system by applying a

specific voltage on the CE input. The relationship between

MA1 and MA0 and the input voltage applied to the CE

input is given in Table 6.

Table 3 I2C-bus data format, ‘write’ mode for the TDA6402 and TDA6403

Table 4 I2C-bus data format, ‘write’ mode for the TDA6402A and TDA6403A

NAME BYTE BITS ACK

MSB LSB

Address byte ADB 11000MA1MA0R/W=0A

Divider byte 1 DB1 0 N14 N13 N12 N11 N10 N9 N8 A

Divider byte 2 DB2 N7 N6 N5 N4 N3 N2 N1 N0 A

Control byte CB 1 CP T2 T1 T0 RSA RSB OS A

Band-switch byte BB XXXXFMST PUHF PVHFH PVHFL A

NAME BYTE BITS ACK

MSB LSB

Address byte ADB 11000MA1MA0R/W=0A

Divider byte 1 DB1 0 N14 N13 N12 N11 N10 N9 N8 A

Divider byte 2 DB2 N7 N6 N5 N4 N3 N2 N1 N0 A

Control byte CB 1 CP T2 T1 T0 RSA RSB OS A

Band-switch byte BB XXXXPUHF FMST PVHFH PVHFL A

2000 Jan 24 9

Philips Semiconductors Product speciﬁcation

5 V mixers/oscillators and synthesizers for

cable TV and VCR 2-band tuners TDA6402; TDA6402A;

TDA6403; TDA6403A

Table 5 Description of symbols used in Tables 3 and 4

Table 6 Address selection (I2C-bus mode)

Table 7 Test modes

Notes

1. This is the default mode at power-on reset.

2. The ADC input cannot be used when these test modes are active; see Section “Read mode; R/W = 1 (see Table 9)”

for more information.

SYMBOL DESCRIPTION

A acknowledge

MA1, MA0 programmable address bits (see Table 6)

N14 to N0 programmable divider bits; N = N14 ×214 + N13 ×213 + ... + N1 ×21+N0

CP charge pump current:

CP=0=60µA

CP = 1 = 280 µA (default)

T2, T1,T0 test bits (see Table 7)

RSA, RSB reference divider ratio select bits (see Table 8)

OS tuning ampliﬁer control bit:

OS = 0; normal operation; tuning voltage is ‘ON’ (default)

OS = 1; tuning voltage is ‘OFF’ (high-impedance)

PVHFL, PVHFH, PUHF, FMST PNP ports control bits:

bit = 0; buffer n is ‘OFF’ (default)

bit = 1; buffer n is ‘ON’

X don’t care

MA1 MA0 VOLTAGE APPLIED ON CE INPUT (SW = GND)

0 0 0Vto0.1×V

0 1 open or 0.2 ×VCC to 0.3 ×VCC

1 0 0.4 ×VCC to 0.6 ×VCC

1 1 0.9 ×VCC to 1.0 ×VCC

T2 T1 T0 TEST MODES

0 0 0 automatic charge pump switched off

0 0 1 automatic charge pump switched on (note 1)

0 1 X charge pump is ‘OFF’

1 1 0 charge pump is sinking current

1 1 1 charge pump is sourcing current

100f

REF is available on pin LOCK/ADC (note 2)

101

⁄

DIV is available on pin LOCK/ADC (note 2)

2000 Jan 24 10

Philips Semiconductors Product speciﬁcation

5 V mixers/oscillators and synthesizers for

cable TV and VCR 2-band tuners TDA6402; TDA6402A;

TDA6403; TDA6403A

Table 8 Reference divider ratio select bits

Note

1. X = don’t care.

RSA RSB REFERENCE DIVIDER RATIO FREQUENCY STEP (kHz)

X(1) 0 640 6.25

0 1 1024 3.90625

1 1 512 7.8125

READ MODE; R/W = 1 (see Table 9)

Data can be read from the device by setting the R/W bit to

logic 1. After the slave address has been recognized, the

device generates an acknowledge pulse and the first data

byte (status byte) is transferred on the SDA line (MSB

first). Data is valid on the SDA line during a HIGH-level of

the SCL clock signal. A second data byte can be read from

the device if the microcontroller generates an

acknowledge on the SDA line (master acknowledge).

End of transmission will occur if no master acknowledge

occurs. The device will then release the data line to allow

the microcontroller to generate a STOP condition.

The PORflag isset tologic 1at power-on.The flagis reset

when an end-of-data is detected by the device (end of a

READ sequence). Control of the loop is made possible

with the in-lock flag FL which indicates when the loop is

locked (FL = 1).

The automatic charge pump switch flag (ACPS) is LOW

when the automatic charge pump switch mode is ‘ON’ and

the loop is locked. In other conditions, ACPS = 1.

When ACPS = 0, the charge pump current is forced to the

LOW value.

A built-in ADC is available on LOCK/ADC pin (I2C-bus

mode only). This converter can be used to apply AFC

informationtothemicrocontroller from the IF section of the

television.Therelationshipbetweenthe bitsA2,A1andA0

is given in Table 11.

Table 9 Read data format

Note

1. MSB is transmitted first.

Table 10 Description of symbols used in Table 9

NAME BYTE BITS ACK

MSB(1) LSB

Address byte ADB 11000MA1MA0R/W=1A

Status byte SB POR FL ACPS 1 1 A2 A1 A0 −

SYMBOL DESCRIPTION

A acknowledge

POR power-on reset ﬂag (POR = 1 at power-on)

FL in-lock ﬂag (FL = 1 when the loop is locked)

ACPS automatic charge pump switch ﬂag:

ACPS = 0; active

ACPS = 1; not active

A2, A1, A0 digital outputs of the 5-level ADC

2000 Jan 24 11

Philips Semiconductors Product speciﬁcation

5 V mixers/oscillators and synthesizers for

cable TV and VCR 2-band tuners TDA6402; TDA6402A;

TDA6403; TDA6403A

Table 11 A to D converter levels (note 1)

Note

1. Accuracy is ±0.03 ×VCC.

POWER-ON RESET

Table 12 Default bits at power-on reset

A2 A1 A0 VOLTAGE APPLIED ON ADC INPUT

1 0 0 0.60 ×VCC to 1.00 ×VCC

0 1 1 0.45 ×VCC to 0.60 ×VCC

0 1 0 0.30 ×VCC to 0.45 ×VCC

0 0 1 0.15 ×VCC to 0.30 ×VCC

0 0 0 0 to 0.15 ×VCC

NAME BYTE BITS

MSB LSB

Address byte ADB 1 1 0 0 0 MA1 MA0 X

Divider byte 1 DB1 0 XXXXXXX

Divider byte 2 DB2 XXXXXXXX

Control byte CB 1 1 0 0 1 X 1 1

Band switch byte BB XXXX0000

The power-on detection threshold voltage VPOR is set to

VCC = 2 V at room temperature. Below this threshold, the

device is reset to the power-on state.

At power-on state, the charge pump current is set to

280 µA, the tuning voltage output is disabled, the test bits

T2, T1 and T0 are set to ‘001’ (automatic charge pump

switch ‘ON’) and RSB is set to logic 1.

PUHF is ‘OFF’, which means that the UHF oscillator and

the UHF mixer are switched off. Consequently, the VHF

oscillator and the VHF mixer are switched on. PVHFL and

PVHFH are ‘OFF’, which means that the VHF tank circuit

is working in the VHF I sub-band. The tuning amplifier is

switched off until the first transmission. In that case, the

tank circuit in VHF I is supplied with the maximum tuning

voltage. The oscillator is therefore working at the end of

the VHF I sub-band.

3-wire bus mode (SW = OPEN or VCC)

Duringa HIGH-levelonthe CE input(enable line), thedata

is clocked into the data register at the HIGH-to-LOW

transition of the clock. The first four bits control the PNP

ports and are loaded into the internal band switch register

on the 5th rising edge of the clock pulse. The frequency

bits are loaded into the frequency register at the

HIGH-to-LOW transition of the chip enable line when an

18-bit or 19-bit data word is transmitted (see Figs 4 and 5).

When a 27-bit data word is transmitted, the frequency bits

are loaded into the frequency register on the 20th rising

edge of the clock pulse and the control bits at the

HIGH-to-LOWtransitionofthe chipenable line(see Fig.6).

Inthis mode, the reference divider is given by the RSA and

RSB bits (see Table 8). The test bits T2, T1 and T0, the

charge pump bit CP, the ratio select bit RSB and the OS

bit can only be selected or changed with a 27-bit

transmission. They remain programmed if an 18-bit or

19-bit transmission occurs. Only RSA is controlled by the

transmission length when the 18-bit or 19-bit format is

used. When an 18-bit data word is transmitted, the most

significant bit of the divider N14 is internally set to logic 0

and the RSA bit is set to logic 1. When a 19-bit data word

is transmitted, the RSA bit is set to logic 0.

A data word of less than 18 bits will not affect the

frequency register of the device. The definition of the bits

is unchanged compared to I2C-bus mode.

It is not allowed to address the devices with words whose

length is different from 18, 19 or 27 bits.

2000 Jan 24 12

Philips Semiconductors Product speciﬁcation

5 V mixers/oscillators and synthesizers for

cable TV and VCR 2-band tuners TDA6402; TDA6402A;

TDA6403; TDA6403A

POWER-ON RESET

The power-on detection threshold voltage VPOR is set to

VCC = 2 V at room temperature. Below this threshold, the

device is reset to the power-on state.

At power-on state, the charge pump current is set to

280 µA, the tuning voltage output is disabled, the test bits

T2, T1 and T0 are set to ‘001’ (automatic charge pump

switch ‘ON’) and RSB is set to logic 1.

PUHF is ‘OFF’, which means that the UHF oscillator and

the UHF mixer are switched off. Consequently, the VHF

oscillator and the VHF mixer are switched on. PVHFL and

PVHFH are ‘OFF’, which means that the VHF tank circuit

is working in the VHF I sub-band. The tuning amplifier is

switched off until the first transmission. In that case, the

tank circuit in VHF I is supplied with the maximum tuning

voltage. The oscillator is therefore working at the end of

the VHF I sub-band.

If the first sequence transmitted to the device

has 18 or 19 bits, the reference divider ratio is set to 512

or 1024, depending on the sequence length.

If the sequence has 27 bits, the reference divider ratio is

fixed by RSA and RSB bits (see Table 8).

Fig.4 Normal mode; 18-bit data format (RSA = 1).

handbook, full pagewidth

MGE693

145 18

N13 N12 N11 N10 N9 N8 N7 N6 N5 N4 N3 N2 N1 N0

PUHF

FMST

PVHFH

PVHFL

INVALID

DATA BAND SWITCH

DATA FREQUENCY

DATA INVALID

DATA

LOAD BAND SWITCH

2000 Jan 24 13

Philips Semiconductors Product speciﬁcation

5 V mixers/oscillators and synthesizers for

cable TV and VCR 2-band tuners TDA6402; TDA6402A;

TDA6403; TDA6403A

Fig.5 Normal mode; 19-bit data format (RSA = 0).

handbook, full pagewidth

MGE694

145 19

N13N14 N12 N11 N10 N9 N8 N7 N6 N5 N4 N3 N2 N1 N0

PUHF

FMST

PVHFH

PVHFL

INVALID

DATA BAND SWITCH

DATA FREQUENCY

DATA INVALID

DATA

LOAD BAND SWITCH

Fig.6 Test and features mode; 27-bit data format.

handbook, full pagewidth

MGE695

145 272019

N13N14 N12 N2 N1 N0 X CP T2 T1 T0 RSA RSB OS

PUHF

FMST

PVHFH

PVHFL

INVALID

DATA BAND SWITCH

DATA FREQUENCY

DATA INVALID

DATA

LOAD BAND SWITCH

TEST AND FEATURES

DATA

LOAD CONTROL

2000 Jan 24 14

Philips Semiconductors Product speciﬁcation

5 V mixers/oscillators and synthesizers for

cable TV and VCR 2-band tuners TDA6402; TDA6402A;

TDA6403; TDA6403A

Fig.7 Timing diagram for 3-wire bus; DA, CL and CE.

handbook, full pagewidth

MGE696

tHIGH

tHD;DA

tHD;ENDA

tSU;DA

tSU;ENCL

MSB LSB

INVALID

DATA INVALID

DATA

Fig.8 Timing diagram for 3-wire bus; CE and CL.

handbook, halfpage

MGE697

tEN

tHD;ENCL

2000 Jan 24 15

Philips Semiconductors Product speciﬁcation

5 V mixers/oscillators and synthesizers for

cable TV and VCR 2-band tuners TDA6402; TDA6402A;

TDA6403; TDA6403A

LIMITING VALUES

In accordance with the Absolute Maximum Rating System (IEC 60134) (note 1).

Note

1. Maximum ratings can not be exceeded, not even momentarily without causing irreversible IC damage.

Maximum ratings can not be accumulated.

THERMAL CHARACTERISTICS

SYMBOL PIN PARAMETER MIN. MAX. UNIT

TDA6402;

TDA6402A TDA6403;

TDA6403A

VCC 19 10 DC supply voltage −0.3 +6 V

operating supply voltage 4.5 5.5 V

OVS pulse is 1 second width and 1 A max. −8V

BSn 7 to 10 19 to 22 PNP port output voltage −0.3 +6 V

IBSn 7 to 10 19 to 22 PNP port output current −1 +30 mA

VCP 16 13 charge pump output voltage −0.3 +6 V

VSW 11 18 bus mode selection input voltage −0.3 +6 V

VVT 17 12 tuning voltage output −0.3 +35 V

VLOCK/ADC 15 14 LOCK/ADC input/output voltage −0.3 +6 V

VCL 14 15 serial clock input voltage −0.3 +6 V

VDA 13 16 serial data input/output voltage −0.3 +6 V

IDA 13 16 data output current (I2C-bus mode) −1 +10 mA

VCE 12 17 chip enable/address selection input voltage −0.3 +6 V

VXTAL 18 11 crystal input voltage −0.3 +6 V

IO1to6,

19 to 28 1 to 10,

23 to 28 output current of each pin to ground −−10 mA

tsc(max) −−maximum short-circuit time (all pins to VCC and all

pins to GND, OSCGND and RFGND) −10 s

Tstg −−IC storage temperature −40 +150 °C

Tamb −−ambient temperature −20 +85 °C

Tj−−junction temperature −150 °C

SYMBOL PARAMETER CONDITIONS TYP. UNIT

Rth( j-a) thermal resistance from junction to ambient in free air 90 K/W

2000 Jan 24 16

Philips Semiconductors Product speciﬁcation

5 V mixers/oscillators and synthesizers for

cable TV and VCR 2-band tuners TDA6402; TDA6402A;

TDA6403; TDA6403A

CHARACTERISTICS

Tamb =25°C

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

Supply

VCC supply voltage 4.5 5.0 5.5 V

ICC supply current at VCC = 5 V all PNP ports are ‘OFF’ −71 78 mA

one PNP port is ‘ON’; sourcing

25 mA −103 113 mA

one PNP port is ‘ON’; sourcing

25 mA and a second one is ‘ON’;

sourcing 5 mA

−111 122 mA

PLL part (VCC = 4.5 to 5.5 V; Tamb =−20 to +85 °C; unless otherwise speciﬁed)

FUNCTIONAL RANGE

VPOR power-on reset supply voltage below this supply voltage power-on

reset becomes active 1.5 2.0 −V

N divider ratio 15-bit frequency word 256 −32767

14-bit frequency word 256 −16383

fXTAL crystal oscillator RXTAL =25to300Ω3.2 4.0 4.48 MHz

ZXTALinput impedance (absolute

value) fXTAL = 4 MHz 600 1200 −Ω

PNP PORTS

IBSn(off) leakage current VCC = 5.5 V; VPn =0V −10 −−µA

BSn(sat) output saturation voltage one buffer output is ‘ON’, sourcing

25 mA; VPn(sat) =V

CC −VPn

−0.25 0.4 V

LOCK OUTPUT IN 3-WIRE BUS MODE (PNP COLLECTOR OUT)

IUNLOCK output current when the PLL is

out-of-lock VCC = 5.5 V; VOUT = 5.5 V −−100 µA

VUNLOCK output saturation voltage

when the PLL is out-of-lock ISOURCE = 200 µA;

VUNLOCK =V

CC −VOUT

−0.4 0.8 V

VLOCK output voltage the PLL is locked −0.01 0.40 V

ADC INPUT IN I2C-BUS MODE

VADC ADC input voltage see Table 11 0 −VCC V

IADCH HIGH-level input current VADC =V

CC −−10 µA

IADCL LOW-level input current VADC =0V −10 −−µA

SW INPUT (BUS MODE SELECTION)

VSWL LOW-level input voltage 0 −1.5 V

VSWH HIGH-level input voltage 3 −VCC V

ISWH HIGH-level input current VSW =V

CC −−10 µA

ISWL LOW-level input current VSW =0V −100 −−µA

2000 Jan 24 17

Philips Semiconductors Product speciﬁcation

5 V mixers/oscillators and synthesizers for

cable TV and VCR 2-band tuners TDA6402; TDA6402A;

TDA6403; TDA6403A

CE/AS INPUT (CHIP ENABLE/ADDRESS SELECTION)

VCE/ASL LOW-level input voltage 0 −1.5 V

VCE/ASH HIGH-level input voltage 3 −5.5 V

ICE/ASH HIGH-level input current VCE/AS = 5.5 V −−10 µA

ICE/ASL LOW-level input current VCE/AS =0V −10 −−µA

CL AND DA INPUTS

VCL/DAL LOW-level input voltage 0 −1.5 V

VCL/DAH HIGH-level input voltage 3 −5.5 V

ICL/DAH HIGH-level input current VBUS = 5.5 V; VCC =0V −−10 µA

VBUS = 5.5 V; VCC = 5.5 V −−10 µA

ICL/DAL LOW-level input current VBUS = 1.5 V; VCC =0V −−10 µA

VBUS =0V; V

CC = 5.5 V −10 −−µA

DA OUTPUT (I2C-BUS MODE)

IDAH leakage current VDA = 5.5 V −−10 µA

VDA output voltage IDA = 3 mA (sink current) −−0.4 V

CLOCK FREQUENCY

fclk clock frequency −100 150 kHz

CHARGE PUMP OUTPUT CP

ICPH HIGH-level input current

(absolute value) CP = 1 −280 −µA

CPL LOW-level input current

(absolute value) CP = 0 −60 −µA

CP output voltage PLL is locked; Tamb =25°C−1.95 −V

ICPleak off-state leakage current T2 = 0; T1 = 1 −15 −0.5 +15 nA

TUNING VOLTAGE OUTPUT VT

IVTOFF leakage current when

switched off OS = 1; tuning supply = 33 V −−10 µA

VVT output voltage when the loop

is closed OS = 0; T2 = 0; T1 = 0; T0 = 1;

RLOAD =22kΩ; tuning supply = 33 V 0.2 −32.7 V

3-WIRE BUS TIMING

tHIGH clock HIGH time see Fig.7 2 −−µs

SU;DA data set-up time see Fig.7 2 −−µs

HD;DA data hold time see Fig.7 2 −−µs

SU;ENCL enable to clock set-up time see Fig.7 10 −−µs

HD;ENDA enable to data hold time see Fig.7 2 −−µs

EN enable time between two

transmissions see Fig.8 10 −−µs

HD;ENCL enable to clock active edge

hold time see Fig.8 6 −−µs

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

2000 Jan 24 18

Philips Semiconductors Product speciﬁcation

5 V mixers/oscillators and synthesizers for

cable TV and VCR 2-band tuners TDA6402; TDA6402A;

TDA6403; TDA6403A

Mixer/oscillator part (VCC =5V) (measured in circuit of Fig.19; unless otherwise speciﬁed)

VHF MIXER (INCLUDING IF AMPLIFIER)

fRF RF frequency note 1 55.25 −361.25 MHz

Gvvoltage gain fRF = 57.5 MHz; see Fig.12 16.5 19 21.5 dB

fRF = 357.5 MHz; see Fig.12 16.5 19 21.5 dB

NF noise ﬁgure fRF = 50 MHz; see Figs 13 and 14 −8.5 9.5 dB

fRF = 150 MHz; see Figs 13 and 14 −8.5 10.5 dB

fRF = 300 MHz; see Fig.14 −9.5 12.5 dB

Vooutput voltage causing 1%

cross modulation in channel fRF = 55.25 MHz; see Fig.15 105 108 −dBµV

fRF = 361.25 MHz; see Fig.15 105 108 −dBµV

Viinputvoltagecausing pulling in

channel (750 Hz) fRF = 361.25 MHz; note 2 −83 −dBµV

gos optimum source conductance

for noise ﬁgure fRF =50MHz −0.7 −mS

fRF = 150 MHz −0.9 −mS

fRF = 300 MHz −1.5 −mS

giinput conductance fRF = 55.25 MHz; see Fig.9 −0.25 −mS

fRF = 361.25 MHz; see Fig.9 −0.5 −mS

Ciinput capacitance fRF = 57.5 to 357.5 MHz; see Fig.9 −1.3 −pF

VHF OSCILLATOR; see Fig.19

fOSC oscillator frequency note 3 101 −407 MHz

∆fOSC(V) oscillator frequency shift ∆VCC = 5%; note 4 −20 120 kHz

∆VCC = 10%; note 4 −110 −kHz

∆fOSC(T) oscillator frequency drift ∆T=25°C; with compensation;

note 5 −1600 2700 kHz

∆fOSC(t) oscillator frequency drift 5 s to 15 min after switch on; note 6 −600 1100 kHz

ΦOSC phase noise, carrier to noise

sideband ±100 kHz frequency offset; worst

case in the frequency range −100 −dBc/Hz

RSC ripple susceptibility of VCC

(peak-to-peak value) VCC = 5 V; worst case in the

frequency range; ripple frequency

500 kHz; note 7

15 20 −mV

UHF MIXER (INCLUDING IF AMPLIFIER)

fRF RF frequency note 1 367.25 −801.25 MHz

Gvvoltage gain fRF = 369.5 MHz; see Fig.16 26 29 32 dB

fRF = 803.5 MHz; see Fig.16 26 29 32 dB

NF noise ﬁgure (not corrected for

image) fRF = 369.5 MHz; see Fig.17 −911dB

RF = 803.5 MHz; see Fig.17 −10 12 dB

Vooutput voltage causing 1%

cross modulation in channel fRF = 367.25 MHz; see Fig.18 105 108 −dBµV

fRF = 801.25 MHz; see Fig.18 105 108 −dBµV

Viinputvoltagecausing pulling in

channel (750 Hz) fRF = 801.25 MHz; note 2 −82 −dBµV

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

2000 Jan 24 19

Philips Semiconductors Product speciﬁcation

5 V mixers/oscillators and synthesizers for

cable TV and VCR 2-band tuners TDA6402; TDA6402A;

TDA6403; TDA6403A

Notes

1. The RF frequency range is defined by the oscillator frequency range and the intermediate frequency (IF).

2. This is the level of the RF signal (100% amplitude modulated with 11.89 kHz) that causes a 750 Hz frequency

deviation on the oscillator signal; it produces sidebands 30 dB below the level of the oscillator signal.

3. Limits are related to the tank circuits used in Fig.19; frequency bands may be adjusted by the choice of external

components.

4. The frequency shift is defined as a change in oscillator frequency when the supply voltage varies from

VCC = 5 to 4.75 V (4.5 V) or from VCC = 5 to 5.25 V (5.5 V). The oscillator is free running during this measurement.

Ziinput impedance (RS+jωL

at fRF = 367.25 MHz; see Fig.10 −30 −Ω

at fRF = 801.25 MHz; see Fig.10 −38 −Ω

at fRF = 367.25 MHz; see Fig.10 −9−nH

LS at fRF = 801.25 MHz; see Fig.10 −6−nH

UHF OSCILLATOR

fOSC oscillator frequency note 3 413 −847 MHz

∆fOSC(V) oscillator frequency shift ∆VCC = 5%; note 4 −10 80 kHz

∆VCC = 10%; note 4 −300 −kHz

∆fOSC(T) oscillator frequency drift ∆T=25°C; with compensation;

note 5 −2000 2700 kHz

∆fOSC(t) oscillator frequency drift 5 s to 15 min after switching on;

note 6 −300 1300 kHz

ΦOSC phase noise, carrier to noise

sideband ±100 kHz frequency offset; worst

case in the frequency range −100 −dBc/Hz

RSC ripple susceptibility of VCC

(peak-to-peak value) VCC = 5 V (worst case in the

frequency range); ripple frequency

500 kHz; note 7

15 28 −mV

IF AMPLIFIER

S22 output reﬂection coefﬁcient magnitude; see Fig.11 −−13.1 −dB

phase; see Fig.11 −2.9 −deg

Zooutput impedance (RS+jωL

at 43.5 MHz; see Fig.11 −75 −Ω

at 43.5 MHz; see Fig.11 −6.6 −nH

REJECTION AT THE IF OUTPUT

INTDIF level of divider interferences in

the IF signal note 8; worst case: channel C −17 −dBµV

INTRXTAL crystal oscillator interferences

rejection VIF = 100 dBµV; worst case in the

frequency range; note 9 60 −−dBc

INTRFREF reference frequency rejection VIF = 100 dBµV; worst case in the

frequency range; fREF = 7.8125 kHz;

note 10

50 −−dBc

INTCH6 channel 6 beat VRFpix =V

RFsnd =80dBµV; note 11 57 −−dBc

INTCHA-5 channel A-5 beat VRFpix =80dBµV; note 12 60 −−dBc

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

2000 Jan 24 20

Philips Semiconductors Product speciﬁcation

5 V mixers/oscillators and synthesizers for

cable TV and VCR 2-band tuners TDA6402; TDA6402A;

TDA6403; TDA6403A

5. The frequency drift is defined as a change in oscillator frequency when the ambient temperature varies from

Tamb =25to50°C or from Tamb =25to0°C. The oscillator is free running during this measurement. The VHF drift

value can be improved by adding a 10 kΩresistor between the VHFOSCOC pin and the VCC. In that case the typical

VHF drift value can be reduced to 900 kHz.

6. Switch-on drift is defined as the change in oscillator frequency between 5 s and 15 min after switch on. The oscillator

is free running during this measurement.

7. The ripple susceptibility is measured for a 500 kHz ripple at the IF output using the measurement circuit of Fig.19;

the level of the ripple signal is increased until a difference of 53.5 dB occurs between the IF carrier fixed at 100 dBµV

and the sideband components.

8. This is the level of divider interferences close to the IF frequency. For example channel C: fOSC = 179 MHz,

1⁄4fOSC = 44.75 MHz. Divider interference is measured with the Philips 37185 demonstration board in accordance

with Fig.19. All ground pins are connected to a single ground plane under the IC. The VHFIN input must be left open

(i.e. not connected to any load or cable); The UHFIN1 and UHFIN2 inputs are connected to a hybrid.

The measured levels of divider interference are influenced by layout, grounding and port decoupling.

The measurement results could vary by as much as 10 dB with respect to the specification.

9. Crystal oscillator interference means the 4 MHz sidebands caused by the crystal oscillator. The rejection has to be

greater than 60 dB for an IF output signal of 100 dBµV.

10. The reference frequency rejection is the level of reference frequency sidebands related to the sound sub-carrier.

The rejection has to be greater than 50 dB for an IF output signal of 100 dBµV.

11. Channel 6 beat is the interfering product of fRFpix +f

RFsnd −fOSC of channel 6 at 42 MHz.

12. Channel A-5 beat is the interfering product of fRFpix, fIF and fOSC of channel A-4; fBEAT = 45.5 MHz. The possible

mechanisms are: fOSC −2×fIF or 2 ×fRFpix −fOSC. For the measurement VRF =80dBµV.

Fig.9 Input admittance (S11) of the VHF mixer input (40 to 400 MHz); Y0= 20 mS.

handbook, full pagewidth

MGE722

0.2

0.5

0.2

0.5

∞0

+ j

– j

0.20.512510 40 MHz

400 MHz

2000 Jan 24 21

Philips Semiconductors Product speciﬁcation

5 V mixers/oscillators and synthesizers for

cable TV and VCR 2-band tuners TDA6402; TDA6402A;

TDA6403; TDA6403A

Fig.10 Input impedance (S11) of the UHF mixer input (350 to 860 MHz); Z0=50Ω.

handbook, full pagewidth

0.2

0.5

∞

0.2

0.5

+ j

– j

MGE723

0.5 10.2 1052

860 MHz

350 MHz

Fig.11 Output impedance (S22) of the IF amplifier (20 to 60 MHz); Z0=50Ω.

handbook, full pagewidth

0.2

0.5

∞

0.2

0.5

+ j

– j

MGE724

0.5 10.2 1052

20 MHz

100 MHz

2000 Jan 24 22

Philips Semiconductors Product speciﬁcation

5 V mixers/oscillators and synthesizers for

cable TV and VCR 2-band tuners TDA6402; TDA6402A;

TDA6403; TDA6403A

TEST AND APPLICATION INFORMATION

Fig.12 Gain measurement in VHF band.

Zi>> 50 Ω⇒V

i=2×V

meas =80dBµV.

Vi=V

meas +6dB=80dBµV.

Vo=V’

meas ×

Gv= 20 log

50 22+

-------------------

------

handbook, full pagewidth

MGE698

50 Ω22 Ω

50 Ω

VHFIN IFOUT

eVmeas

RMS

voltmeter

spectrum

analyzer

ViD.U.T. V'meas

signal

source

Fig.13 Input circuit for optimum noise figure in VHF band.

(b) For fRF = 150 MHz:

mixer A frequency response measured = 150.3 MHz, loss = 1.3 dB

image suppression = 13 dB

C3 = 5 pF

C4=25pF

l2 = semi rigid cable (RIM): 30 cm long

l3 = semi rigid cable (RIM): 5 cm long

(semi rigid cable (RIM); 33 dB/100 m; 50 Ω; 96 pF/m).

(a) For fRF = 50 MHz:

mixer A frequency response measured = 57 MHz, loss = 0 dB

image suppression = 16 dB

C1 = 9 pF

C2 = 15 pF

L1 = 7 turns (∅5.5 mm, wire ∅= 0.5 mm)

l1 = semi rigid cable (RIM): 5 cm long

(semi rigid cable (RIM); 33 dB/100 m; 50 Ω; 96 pF/m).

handbook, full pagewidth

MBE286 - 1

L1 C2

C1 PCB

plug plug

BNC BNC

RIM-RIM

C3 PCB

RIM-RIM

(a) (b)

2000 Jan 24 23

Philips Semiconductors Product speciﬁcation

5 V mixers/oscillators and synthesizers for

cable TV and VCR 2-band tuners TDA6402; TDA6402A;

TDA6403; TDA6403A

NF = NFmeas −loss (of input circuit) (dB).

Fig.14 Noise figure (NF) measurement in VHF band.

handbook, full pagewidth

MGE699

22 Ω

VHFIN IFOUT

D.U.T.

NOISE

SOURCE

NOISE

FIGURE

METER

BNC RIM

INPUT

CIRCUIT

handbook, full pagewidth

MGE700

50 Ω

22 Ω

50 Ω

Ω

45.75 MHz

VHFIN IFOUT

HYBRID

18 dB

attenuator

Vmeas

RMS

voltmeter

modulation

analyzer

unwanted

signal

source

wanted

signal

source

AM = 50%

1 kHz

FILTER

D.U.T.

Fig.15 Cross modulation measurement in VHF band.

Vo=V

meas ×

Wanted output signal at fRFW = 55.25 (361.25) MHz; Vo(w) = 100 dBµV.

Measuring the level of the unwanted output signal Vo(u) causing 0.5% AM modulation in the wanted output signal; fRFU = 59.75 (366.75) MHz.

fOSC = 101 (407) MHz.

Filter characteristics: fC= 45.75 MHz, f−3 dB(BW) = 1.4 MHz, f−30 dB(BW) = 3.1 MHz.

50 22+

-------------------

2000 Jan 24 24

Philips Semiconductors Product speciﬁcation

5 V mixers/oscillators and synthesizers for

cable TV and VCR 2-band tuners TDA6402; TDA6402A;

TDA6403; TDA6403A

Fig.16 Gain (Gv) measurement in UHF band.

Loss (in hybrid) = 1 dB.

Vi=V

meas −loss (in hybrid) = 70 dBµV.

Vo=V’

meas ×

Gv= 20 log

50 22+

-------------------

------

handbook, full pagewidth

MGE701

UHFIN2

50 Ω22 Ω

50 Ω

UHFIN1 IFOUT

eVmeas

RMS

voltmeter

spectrum

analyzer

D.U.T. V'meas

signal

source

50 Ω

HYBRID

Fig.17 Noise figure (NF) measurement in bands UHF.

Loss (in hybrid) = 1 dB.

NF = NFmeas −loss (in hybrid).

handbook, full pagewidth

MGE702

22 Ω

UHFIN

IFOUT

D.U.T.

NOISE

SOURCE

NOISE

FIGURE

METER

50 Ω

HYBRID

2000 Jan 24 25

Philips Semiconductors Product speciﬁcation

5 V mixers/oscillators and synthesizers for

cable TV and VCR 2-band tuners TDA6402; TDA6402A;

TDA6403; TDA6403A

Fig.18 Cross modulation measurement in UHF band.

Vo=V

meas ×

Wanted output signal at fRFW = 367.25 (801.25) MHz; Vo(w) = 100 dBµV.

Measuring the level of the unwanted output signal Vo(u) causing 0.5% AM modulation in the wanted output signal; fRFU = 371.25 (805.75) MHz.

fOSC = 413 (847) MHz.

Filter characteristics: fC= 45.75 MHz, f−3 dB(BW) = 1.4 MHz, f−30 dB(BW) = 3.1 MHz.

50 22+

-------------------

handbook, full pagewidth

50 Ω

50 Ω50 Ω

euunwanted

signal

source

wanted

signal

source

AM = 50%

1 kHz

MGE703

22 Ω

50 Ω

45.75 MHz

UHFIN

IFOUT

HYBRID

18 dB

attenuator

Vmeas

RMS

voltmeter

modulation

analyzer

FILTER

D.U.T.

2000 Jan 24 26

Philips Semiconductors Product speciﬁcation

5 V mixers/oscillators and synthesizers for

cable TV and VCR 2-band tuners TDA6402; TDA6402A;

TDA6403; TDA6403A

handbook, full pagewidth

MGE689

6.8 kΩ

33 kΩ22 kΩ

22 kΩ

10 kΩ

3.9 kΩ

22 kΩ

330 Ω

680 Ω

4.7 Ω

10 µF

(16 V) 10 µF

(16 V)

1 pF

kΩ

4.7

kΩ

Ω

8 pF

(N750)

47 pF

(N750)

C11

C10

C6 (N750)

1.8 pF

C7 (N750)

1.8 pF

C8 (N750)

1 pF

C9 (N750)

22 kΩ

BB133

C14 (N470)

100 pF

30 nH

80 nH

C15

4.7 nF

C16

4.7 nF

BA792

C12 (N750)

C13 (N750)

2.2 pF

2.5 pF

80 nH

C17

1 nF

4 MHz

C19

18 pF VCC

C18 10 nF

C20

100 nF

R10

C21

2.2 nF

R11

R16

C22

1 nF

15 pF

L1 2 x 5t

R20

330 Ω

R19

330 Ω

R21

330 Ω

R22

D7 3-WIRE / I2C-bus

R14

330 Ω

R12

330 Ω

R13

330 Ω

R15

68 kΩ

R24

1 kΩ

R25

R23

R26

50 Ω

C23 C24

1 (28)

2 (27)

3 (26)

4 (25)

UHFIN1

UHFIN2

VHFIN

UHF-IN

VHF-IN

RFGND

5 (24)

6 (23)

7 (22)

8 (21)

IFFIL1

IFFIL2

PVHFL

PVHFH

9 (20)

10 (19)

11 (18)

12 (17)

13 (16)

PUHF

FMST

CE/AS

CL 14 (15) (14) 15

(13) 16

(12) 17

(11) 18

LOCK/ADC

XTAL

(10) 19

(9) 20

(8) 21

(7) 22

(6) 23

VCC

IFOUT

GND

VHFOSCIB

OSCGND

(5) 24

(4) 25

(3) 26

(2) 27

(1) 28

VHFOSCOC

UHFOSCIB1

UHFOSCIB2

UHFOSCOC2

UHFOSCOC1

C25

10 nF

for test

purpose

only

R18

IFOUT

measurement

for test purpose only

4 × LED 3 mm open for

3-wire

+5 V +33 V

VCC AGND

AGND

+5 V

LOCK

JMP2

BC847B

TR2

VHF-LOW

VHF-HIGH

UHF

FMST

PVHFH

PVHFL

TDA6402

TDA6402A

TDA6403

TDA6403A

BB134

TR1

BC847B

Vripple 1/2fDIV or fREF

measurement

Fig.19 Measurement circuit.

The pin numbers in parenthesis represent the TDA6403 and TDA6403A.

2000 Jan 24 27

Philips Semiconductors Product speciﬁcation

5 V mixers/oscillators and synthesizers for

cable TV and VCR 2-band tuners TDA6402; TDA6402A;

TDA6403; TDA6403A

Component values for measurement circuit

Table 13 Capacitors (all SMD and NP0)

Table 14 Resistors (all SMD)

COMPONENT VALUE

C1 1 nF

C2 1 nF

C3 1 nF

C4 15 pF

C5 15 pF

C6 1 pF (N750)

C7 1.8 pF (N750)

C8 1.8 pF (N750)

C9 1 pF (N750)

C10 8 pF (N750)

C11 47 pF (N750)

C12 2.2 pF (N750)

C13 2.7 pF (N750)

C14 100 pF (N470)

C15 4.7 nF

C16 4.7 nF

C17 1 nF

C18 10 nF

C19 18 pF

C20 100 nF

C21 2.2 nF

C22 10 nF

C23 10 µF (16 V; electrolytic)

C24 10 µF (16 V; electrolytic)

C25 10 nF

COMPONENT VALUE

R1 22 kΩ

R2 4.7 kΩ

R3 22 kΩ

R4 22 kΩ

R5 4.7 Ω

R6 10 kΩ

R7 680 Ω

R8 3.9 kΩ

R9 3.9 kΩ

R10 33 kΩ

Table 15 Diodes and ICs

Table 16 Coils (wire size 0.4 mm)

Table 17 Transformer (note 1)

Note

1. Coil type: TOKO 7kN; material: 113 kN; screw core:

03-0093; pot core: 04-0026.

R11 22 kΩ

R12 330 Ω

R13 330 Ω

R14 330 Ω

R15 330 Ω

R16 22 kΩ

R18 22 Ω

R19 330 Ω

R20 330 Ω

R21 330 Ω

R22 330 Ω

R23 6.8 kΩ

R24 68 kΩ

R25 1 kΩ

R26 50 Ω

COMPONENT VALUE

D1 BB134

D2 BB133

D3 BA792

IC TDA6402; TDA6402A;

TDA6403; TDA6403A

COMPONENT VALUE

L2 23 nH

L3 23 nH

L4 30 nH

L5 80 nH

L6 80 nH

COMPONENT VALUE

L1 2 ×5 turns

COMPONENT VALUE

2000 Jan 24 28

Philips Semiconductors Product speciﬁcation

5 V mixers/oscillators and synthesizers for

cable TV and VCR 2-band tuners TDA6402; TDA6402A;

TDA6403; TDA6403A

Table 18 Crystal

Table 19 Transistors

Tuning ampliﬁer

The tuning amplifier is capable of driving the varicap

voltage without an external transistor. The tuning voltage

output must be connected to an external load of 27 kΩ

which is connected to the tuning voltage supply rail.

The loop filter design depends on the oscillator

characteristics and the selected reference frequency.

Crystal oscillator

The crystal oscillator uses a 4 MHz crystal connected in

series with an 18 pF capacitor thereby operating in the

series resonance mode. Connecting the oscillator to the

supply voltage is preferred, but it can also be connected to

ground.

Examples of I2C-bus sequences (SW = VCC) for

TDA6402 and TDA6403

Tables 20 to 24 show the various sequences where:

fOSC = 100 MHz

PVHFL = ‘ON’ to switch on VHF I

FMST is ‘ON’ to switch on an FM sound trap

ICP = 280 µA

N = 512

fXTAL = 4 MHz

S = START

A = acknowledge

P = STOP.

For the complete sequence see Table 20 (sequence 1) or

Table 21 (sequence 2).

COMPONENT VALUE

X1 4 MHz

COMPONENT VALUE

TR1 BC847B

TR2 BC847B

Table 20 Complete sequence 1

Table 21 Complete sequence 2

START ADDRESS BYTE DIVIDER BYTE 1 DIVIDER BYTE 2 CONTROL BYTE BAND SWITCH

BYTE STOP

SC2A06A40ACEA09A P

START ADDRESS BYTE CONTROL BYTE BAND SWITCH

BYTE DIVIDER BYTE 1 DIVIDER BYTE 2 STOP

SC2ACEA09A06A40A P

Table 22 Divider bytes only sequence

Table 23 Control and band switch bytes only sequence

Table 24 Control byte only sequence

Table 25 Status byte acquisition

Notes

1. XX = Read status byte.

2. X = No acknowledge from the master means end of

sequence.

SC2A06A40A P

SC2ACEA09A P

SC2ACEA P

SC3AXX

(1) X(2) P

2000 Jan 24 29

Philips Semiconductors Product speciﬁcation

5 V mixers/oscillators and synthesizers for

cable TV and VCR 2-band tuners TDA6402; TDA6402A;

TDA6403; TDA6403A

Table 26 Two status bytes acquisition

Notes

1. XX = Read status byte.

2. X = No acknowledge from the master means end of sequence.

Other I2C-bus addresses may be selected by applying an appropriate voltage to the CE input.

Examples of 3-wire bus sequences (SW = OPEN)

Table 27 18-bit sequence (fOSC = 800 MHz; PUHF = ON)

Thereference divider is automatically set to 512 assuming that RSB has been set to logic 1 at power-on. If RSB has been

set to logic 0, in a previous 27-bit sequence, the reference divider will still be set at 640. In that event, the 18-bit sequence

has to be adapted to the 640 divider ratio.

Table 28 19-bit sequence (fOSC = 650 MHz; PUHF = ON)

Thereference divider is automatically set to 512 assuming that RSB has been set to logic 1 at power-on. If RSB has been

set to logic 0 in a previous 27-bit sequence, the reference divider will still be set at 640. In that event, the 19-bit sequence

has to be adapted to the 640 divider ratio.

Table 29 27-bit sequence (fOSC = 750 MHz; PUHF = ON; N = 640; ICP =60µA; no test function)

Table 30 19-bit sequence

This sequence will program fOSC to 600 MHz in 50 kHz steps; ICP remains at 60 µA.

Table 31 18-bit sequence

This sequence will program fOSC to 600 MHz in 50 kHz steps; ICP remains at 60 µA.

SC3AXX

(1) AXX

(1) X(2) P

100011001000000000

1000010100010100000

100001110101001100010001000

1000010111011100000

100010111011100000

2000 Jan 24 30

Philips Semiconductors Product speciﬁcation

5 V mixers/oscillators and synthesizers for

cable TV and VCR 2-band tuners TDA6402; TDA6402A;

TDA6403; TDA6403A

INTERNAL PIN CONFIGURATION

SYMBOL PIN DESCRIPTION(1)

AVERAGE DC VOLTAGE (V)

(measured in Fig.19)

TDA6402;

TDA6402A TDA6403;

TDA6403A VHF UHF

UHFIN1 1 28 note 2 1.0

UHFIN2 2 27 note 2 1.0

VHFIN 3 26 1.8 note 2

RFGND 4 25 0.0 0.0

IFFIL1 5 24 3.6 3.6

IFFIL2 6 23 3.6 3.6

PVHFL 7 22 0.0 or (VCC −VCE) 0.0

PVHFH 8 21 (VCC −VCE) or 0.0 0.0

PUHF 9 20 0.0 (VCC −VCE)

FMST 10 19 0.0 or (VCC −VCE) 0.0

MGE704

(27)

(28)

MGE705

(26)

MGE706

(25)

MGD617

65 (23)(24)

MGE708

(22) 8

(21)

(19)

(20)

2000 Jan 24 31

Philips Semiconductors Product speciﬁcation

5 V mixers/oscillators and synthesizers for

cable TV and VCR 2-band tuners TDA6402; TDA6402A;

TDA6403; TDA6403A

SW 11 18 5.0 5.0

CE/AS 12 17 1.25 1.25

DA 13 16 note 2 note 2

CL 14 15 note 2 note 2

LOCK/ADC 15 14 4.6 4.6

SYMBOL PIN DESCRIPTION(1)

AVERAGE DC VOLTAGE (V)

(measured in Fig.19)

TDA6402;

TDA6402A TDA6403;

TDA6403A VHF UHF

MGE709

(18)

MGE710

(17)

MGE711

(16)

MGE712

(15)

MGE713

(14)

2000 Jan 24 32

Philips Semiconductors Product speciﬁcation

5 V mixers/oscillators and synthesizers for

cable TV and VCR 2-band tuners TDA6402; TDA6402A;

TDA6403; TDA6403A

CP 16 13 1.9 1.9

VT 17 12 VVT VVT

XTAL 18 11 3.4 3.4

VCC 19 10 supply voltage 5.0 5.0

IFOUT 20 9 2.1 2.1

GND 21 8 0.0 0.0

OSCGND 23 6 0.0 0.0

SYMBOL PIN DESCRIPTION(1)

AVERAGE DC VOLTAGE (V)

(measured in Fig.19)

TDA6402;

TDA6402A TDA6403;

TDA6403A VHF UHF

MGE714

(13)

MGE715

(12)

MGE716

(11)

MGE717

(9)

MGE718

(8)

MGE719

(6)

2000 Jan 24 33

Philips Semiconductors Product speciﬁcation

5 V mixers/oscillators and synthesizers for

cable TV and VCR 2-band tuners TDA6402; TDA6402A;

TDA6403; TDA6403A

Notes

1. The pin numbers in parenthesis represent the TDA6403 and TDA6403A.

2. Not applicable.

VHFOSCIB 22 7 1.8 note 2

VHFOSCOC 24 5 3.0 note 2

UHFOSCIB1 25 4 note 2 1.9

UHFOSCOC1 26 3 note 2 2.9

UHFOSCOC2 27 2 note 2 2.9

UHFOSCIB2 28 1 note 2 1.9

SYMBOL PIN DESCRIPTION(1)

AVERAGE DC VOLTAGE (V)

(measured in Fig.19)

TDA6402;

TDA6402A TDA6403;

TDA6403A VHF UHF

MGE720

(7)

(5)

MGK825

(1)

(2) (3)

(4)

2000 Jan 24 34

Philips Semiconductors Product speciﬁcation

5 V mixers/oscillators and synthesizers for

cable TV and VCR 2-band tuners TDA6402; TDA6402A;

TDA6403; TDA6403A

PACKAGE OUTLINE

UNIT A1A2A3bpcD

(1) E(1) (1)

ELL

pQZywv θ

REFERENCES

OUTLINE

VERSION EUROPEAN

PROJECTION ISSUE DATE

IEC JEDEC EIAJ

mm 0.21

0.05 1.80

1.65 0.38

0.25 0.20

0.09 10.4

10.0 5.4

5.2 0.65 1.25

7.9

7.6 0.9

0.7 1.1

0.7 8

0.13 0.10.2

DIMENSIONS (mm are the original dimensions)

Note

1. Plastic or metal protrusions of 0.20 mm maximum per side are not included.

1.03

0.63

SOT341-1 MO-150 95-02-04

99-12-27

detail X

vMA

(A )

114

28 15

0.25

pin 1 index

0 2.5 5 mm

scale

SSOP28: plastic shrink small outline package; 28 leads; body width 5.3 mm SOT341-1

max.

2.0

2000 Jan 24 35

Philips Semiconductors Product speciﬁcation

5 V mixers/oscillators and synthesizers for

cable TV and VCR 2-band tuners TDA6402; TDA6402A;

TDA6403; TDA6403A

SOLDERING

Introduction to soldering surface mount packages

Thistextgivesaverybriefinsighttoacomplex technology.

A more in-depth account of soldering ICs can be found in

our

“Data Handbook IC26; Integrated Circuit Packages”

(document order number 9398 652 90011).

There is no soldering method that is ideal for all surface

mount IC packages. Wave soldering is not always suitable

for surface mount ICs, or for printed-circuit boards with

high population densities. In these situations reflow

soldering is often used.

Reﬂow soldering

Reflow soldering requires solder paste (a suspension of

fine solder particles, flux and binding agent) to be applied

tothe printed-circuit boardbyscreen printing, stencillingor

pressure-syringe dispensing before package placement.

Several methods exist for reflowing; for example,

infrared/convection heating in a conveyor type oven.

Throughput times (preheating, soldering and cooling) vary

between 100 and 200 seconds depending on heating

method.

Typical reflow peak temperatures range from

215 to 250 °C. The top-surface temperature of the

packages should preferable be kept below 230 °C.

Wave soldering

Conventional single wave soldering is not recommended

forsurfacemount devices(SMDs) orprinted-circuitboards

with a high component density, as solder bridging and

non-wetting can present major problems.

To overcome these problems the double-wave soldering

method was specifically developed.

If wave soldering is used the following conditions must be

observed for optimal results:

•Use a double-wave soldering method comprising a

turbulent wave with high upward pressure followed by a

smooth laminar wave.

•For packages with leads on two sides and a pitch (e):

– larger than or equal to 1.27 mm, the footprint

longitudinal axis is preferred to be parallel to the

transport direction of the printed-circuit board;

– smaller than 1.27 mm, the footprint longitudinal axis

must be parallel to the transport direction of the

printed-circuit board.

The footprint must incorporate solder thieves at the

downstream end.

•Forpackageswith leadson foursides,the footprintmust

be placed at a 45°angle to the transport direction of the

printed-circuit board. The footprint must incorporate

solder thieves downstream and at the side corners.

During placement and before soldering, the package must

be fixed with a droplet of adhesive. The adhesive can be

applied by screen printing, pin transfer or syringe

dispensing. The package can be soldered after the

adhesive is cured.

Typical dwell time is 4 seconds at 250 °C.

A mildly-activated flux will eliminate the need for removal

of corrosive residues in most applications.

Manual soldering

Fix the component by first soldering two

diagonally-opposite end leads. Use a low voltage (24 V or

less) soldering iron applied to the flat part of the lead.

Contact time must be limited to 10 seconds at up to

300 °C.

When using a dedicated tool, all other leads can be

soldered in one operation within 2 to 5 seconds between

270 and 320 °C.

2000 Jan 24 36

Philips Semiconductors Product speciﬁcation

5 V mixers/oscillators and synthesizers for

cable TV and VCR 2-band tuners TDA6402; TDA6402A;

TDA6403; TDA6403A

Suitability of surface mount IC packages for wave and reﬂow soldering methods

Notes

1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum

temperature (with respect to time) and body size of the package, there is a risk that internal or external package

cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the

Drypack information in the

“Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods”

2. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink

(at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version).

3. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction.

The package footprint must incorporate solder thieves downstream and at the side corners.

4. Wave soldering is only suitable for LQFP, TQFP and QFP packages with a pitch (e) equal to or larger than 0.8 mm;

it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm.

5. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is

definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.

PACKAGE SOLDERING METHOD

WAVE REFLOW(1)

BGA, LFBGA, SQFP, TFBGA not suitable suitable

HBCC, HLQFP, HSQFP, HSOP, HTQFP, HTSSOP, SMS not suitable(2) suitable

PLCC(3), SO, SOJ suitable suitable

LQFP, QFP, TQFP not recommended(3)(4) suitable

SSOP, TSSOP, VSO not recommended(5) suitable

2000 Jan 24 37

Philips Semiconductors Product speciﬁcation

5 V mixers/oscillators and synthesizers for

cable TV and VCR 2-band tuners TDA6402; TDA6402A;

TDA6403; TDA6403A

DEFINITIONS

LIFE SUPPORT APPLICATIONS

These products are not designed for use in life support appliances, devices, or systems where malfunction of these

products can reasonably be expected to result in personal injury. Philips customers using or selling these products for

use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such

improper use or sale.

PURCHASE OF PHILIPS I2C COMPONENTS

Data sheet status

Objective speciﬁcation This data sheet contains target or goal speciﬁcations for product development.

Preliminary speciﬁcation This data sheet contains preliminary data; supplementary data may be published later.

Product speciﬁcation This data sheet contains ﬁnal product speciﬁcations.

Limiting values

Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or

more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation

of the device at these or at any other conditions above those given in the Characteristics sections of the speciﬁcation

is not implied. Exposure to limiting values for extended periods may affect device reliability.

Application information

Where application information is given, it is advisory and does not form part of the speciﬁcation.

Purchase of Philips I2C components conveys a license under the Philips’ I2C patent to use the

components in the I2C system provided the system conforms to the I2C specification defined by

Philips. This specification can be ordered using the code 9398 393 40011.

2000 Jan 24 38

Philips Semiconductors Product speciﬁcation

5 V mixers/oscillators and synthesizers for

cable TV and VCR 2-band tuners TDA6402; TDA6402A;

TDA6403; TDA6403A

NOTES

2000 Jan 24 39

Philips Semiconductors Product speciﬁcation

5 V mixers/oscillators and synthesizers for

cable TV and VCR 2-band tuners TDA6402; TDA6402A;

TDA6403; TDA6403A

NOTES

All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.

The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed

without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license

under patent- or other industrial or intellectual property rights.

Internet: http://www.semiconductors.philips.com

2000 69

Philips Semiconductors – a worldwide compan y

For all other countries apply to: Philips Semiconductors,

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Printed in The Netherlands 545004/05/pp40 Date of release: 2000 Jan 24 Document order number: 9397 750 06728