ANALOG ~ 10-Bit, 400 MSPS DEVICES D/A Converters ADS720/AD9721 1.1 Scope. This specification covers the requirements for 10-bit, high speed digital-to-analog converters (DACs). The AD9720/883B is a 10-bit ECL-compatible DAC that features update rates of 400 Msps; the TTL- compatible AD9721/883B will update at 100 Msps. 1.2 Part Number. The complete part numbers are as follows: Device Part Number ~1 AD9720T(X)/883B ~2 AD9721T(X)/883B 1.2.3 Case Outline. See Appendix 1 of General Specification ADI-M-1000: package outline: (X) Package Description E E-28A 28-Pin Leadless Chip Carrier Q Q28 28-Pin Cerdip 1.3 Absolute Maximum Ratings. (T, = +25C unless otherwise noted) Positive Supply Voltage (+.V5) 0... cee ee nent e eee teen e eee ee nee +6V Negative Supply Voltage (~Vs) 0... eee eee eee tee eee settee eens -7V Digital Input Voltages (D,|~D,5, CLOCK, CLOCK) AD9720 00. ee eee teen teen eben eee eneenee 0V to ~Vs AD972Z1 2 cet ete eee ee tenet teen ee nees -0.5 V 0 +V5 Internal Reference Output Current 2.2.00... cee teeter e nee tenee 500 pA Control Amplifier Input Voltage Range .... 0.0... cece eee eens 0V to -4.0V Control Amplifier Output Current 22.0... eee ee eee eee ee enee +2.5mA Reference Input Voltage (Vppp) . 6.6 ee ee eee ence eee nes -3.7 V to ~Vs Analog Output Current 2.2.0.2... cee eect e eee eee eees 30 mA Operating Temperature Range (Case) AD9720/AD9721TE/TQ ... 00. ec nee eee eben neee 55C to +125C Junction Temperature 2.0.0... 0... eee ee ee tee tect e eee tee eeees +175C Storage Temperature Range (Case) 2.0... 00 cece tee eee teenies -65C to +150C Lead Soldering Temperature (10 sec) 0... ce ee tence etn eenenes +300C 1.5 Thermal Characteristics. Maximum junction temperature should not be allowed to exceed +175C. Typical thermal impedances with parts soldered in place; no air flow: 28-pin ceramic DIP: 0,4 = 35C/W, Oc = 10C/W; 28-pin LCC: 63, = 41C/W, 85, = 13C/AW. REV. B DIGITAL-TO-ANALOG CONVERTERS 8-193 DIGITAL-TO-ANALOG CONVERTERS a AD9720/AD9721 SPECIFICATIONS Table 1. Sub Sub Sub Sub Sub Sub Design | Group | Group | Group | Group | Group | Group | Test Test Symbol | Device | Limits | 1 2,3 /4 5,6 |9 10, 11 | Conditions? | Units Differential Nonlinearity | DNL All +10 | +15 LSB Integral Nonlinearity INL All +1.5 +2.0 LSB Zero-Scale Offset Error | Ips All : 60 75 pA max Full-Scale Gain Error All 15 15 % max Internal Reference Vir All ~1L.S | -1.15 V min Voltage ~1.35 | 1.35 V max Internal Reference liz All 50 vA min Output Current +500 vA max Output Compliance Voc All -1L5 @+25C |-V min Range +3 @ +25C | V max Output Resistance Ro All 210 @ +25C 2 typ Output Update Rate 1 400 typ -2 100 Digital Logic 1 Vin -1 -0.9 | -0.9 V min Input Voltage -2 2.0 2.0 Digital Logic 0 Vir -1 -1.6 | -16 V max Input Voltage -2 0.8 0.8 Digital Logic 1 Ty -1 50 50 uA max Input Current -2 400 400 Digital Logic 0 Vin -] 2 2 pA max Input Current -2 700 700 Setup Time? ts -1 1.2 ns min -2 1.2 Hold Time* ty -1 2.8 ns min 2 2.3 Clock Pulse Width tipw ~-1 1.4 @ +25C ns min LOW -2 1.3 @ +25C Clock Pulse Width tiapw ~1 1.6 @ +25C ns min HIGH -2 1.5 @ +25C Supply Current +I -2 30 30 mA max Vs Supply Current I, -1 280 290 mA max -2 290 300 NOTES "Value shown is over full temperature range unless otherwise noted in Test Condition. Numbers in this column indicate specifications are guaranteed but not tested. 24V. = +5 V (AD9721 only); -V, = 5.2 V; reference voltage = 1.25 V; Rspr = 1,960 9, unless otherwise indicated. 3Data must remain stable for specified time prior to falling edge of CLOCK signal. Data must remain stable for specified time after rising edge of CLOCK signal. 8-194 DIGITAL-TO-ANALOG CONVERTERS REV. B AD9720/AD9721 3.2.1 Functional Block Diagram and Terminal Assignments. = ANALOG ____ o, TURN =) Te 2 40 | DEcoDERS lour d 2 Gd ca ee eee ia | PBs [2 ~ Vv INVERT | clock 7 REFERENCE - CLOCK i { Ager ' ' contro. INTERNAL - AMP VOLTAGE AMP OUT REFERENCE [ T T T Y ~--=- DIGITAL DIGITAL ANALOG REFERENCE CONTROL = -V, Vs Vs OUT AMP IN | + BYP | + BYP. | + BYP -5.2V +5V ~S.2V VY * p, se) [7] [28] GRounp g 2228 z z o, [2] 27] DIGITAL -V, sed * g 8 63 p, [3] [26] CONTROL AMP IN NM iS] NM ba My o, [4] 25| REFERENCE OUT / D, [25 REFERENCE OUT p, [5 pesleed 24] CONTROL AMP OUT . D [24 CONTROL AMP OUT De [e| [23] REFERENCE IN + pel D. 4D9720/AD9721 [23 REFERENCE IN o, [7] bIP 22] ANALOG -V, ; TOP VIEW _ Dy D8 | Loc [22 ANALOG -V, Ds [ze {Not to Scale) [21] our , 59] TOP VIEW [21C igor D5 PP 20] lo (Not to Scate) out vt Djo (LSB) 910] Exe 19 OUT D4 (LSB) [10 79] ANALOG RETURN a red cLock ANALOG RETURN ao ty pel ome Fal fe) Fel bel 1 CLOCK (NC) fia] 7] Riser S&& a2 & INVERT [73] 6] DIGITAL -Vg M4 g = 3 7 @ 3 = J ec DIGITAL Vg (+Vg) [14 [5] Grounn le 6 # 3 3 4 S g a AD9720 (AD9721) Pinouts a (SOIC Pinouts Same as DIP) REV. B LCC AD9720 (AD9721) Pinouts DIGITAL-TO-ANALOG CONVERTERS 8-195 DIGITAL-TO-ANALOG CONVERTERS a AD9720/AD9721 3.2.4 Microcircuit Technology Group. This microcircuit is covered by technology group (D-56). 4.2.1 Life Test/Burn-In Circuit. Steady state life test is per MIL-STD-883 Method 1005. Burn-in is per MIL-STD-883 Method 1015 test condition (B). BkQ 5.2V O-\Whe- ot] " 6-10, 12,43 17 Hig A09720 x. a 24 14, 16, 25 TT 72 27 ON uF Fy To 518 26 0 -5.2v ALL RESISTORS 5% Vg =-5.2V @ 280mA 8-196 DIGITAL-TO-ANALOG CONVERTERS 1-5, " 50a | 6-10, 5 12, 13 a 14 AD9721 7 24 Z 2kQ 4 0.1 nF 0 -52v 16, 22, 35 t 27 15, 18, 26 t O.1uF 19, 28 ALL RESISTORS =5% +Vg = +5V 25% @ 30MA Vg = -5.2V @ 200mA REV.B