©1997 Burr-Brown Corporation PDS-1361B Printed in U.S.A., February, 1998
®
INA125
INSTRUMENTATION AMPLIFIER
With Precision Voltage Reference
FEATURES
LOW QUIESCENT CURRENT: 460µA
PRECISION VOLTAGE REFERENCE:
1.24V, 2.5V, 5V or 10V
SLEEP MODE
LOW OFFSET VOLTAGE: 250µV max
LOW OFFSET DRIFT: 2µV/°C max
LOW INPUT BIAS CURRENT: 20nA max
HIGH CMR: 100dB min
LOW NOISE: 38nV/Hz at f = 1kHz
INPUT PROTECTION TO ±40V
WIDE SUPPLY RANGE
Single Supply: 2.7V to 36V
Dual Supply: ±1.35V to ±18V
16-PIN DIP AND SO-16 SOIC PACKAGES
APPLICATIONS
PRESSURE AND TEMPERATURE BRIDGE
AMPLIFIERS
INDUSTRIAL PROCESS CONTROL
FACTORY AUTOMATION
MULTI-CHANNEL DATA ACQUISITION
BATTERY OPERATED SYSTEMS
GENERAL PURPOSE INSTRUMENTATION
DESCRIPTION
The INA125 is a low power, high accuracy instrumen-
tation amplifier with a precision voltage reference. It
provides complete bridge excitation and precision dif-
ferential-input amplification on a single integrated
circuit.
A single external resistor sets any gain from 4 to
10,000. The INA125 is laser-trimmed for low offset
voltage (250µV), low offset drift (2µV/°C), and high
common-mode rejection (100dB at G = 100). It oper-
ates on single (+2.7V to +36V) or dual (±1.35V to
±18V) supplies.
The voltage reference is externally adjustable with pin-
selectable voltages of 2.5V, 5V, or 10V, allowing use
with a variety of transducers. The reference voltage is
accurate to ±0.5% (max) with ±35ppm/°C drift (max).
Sleep mode allows shutdown and duty cycle operation
to save power.
The INA125 is available in 16-pin plastic DIP and
SO-16 surface-mount packages and is specified for
the –40°C to +85°C industrial temperature range.
A
1
Ref
Amp
10V
A
2
30k
10k
10k
30k
Bandgap
V
REF
13
12
1
14
15
16
4
6
9
10
11
IA
REF
5
8
7
R
G
Sense
R
R
2R
4R
INA125
V
REF
COM
V
REF
BG
V
REF
2.5
V
REF
5
V
REF
10
V
REF
Out
V
IN
V+
+
V
IN
2
SLEEP
3
V–
V
O
= (V
IN
– V
IN
) G
G = 4 + 60k
+
R
G
V
O
INA125
INA125
International Airport Industrial Park • Mailing Address: PO Box 11400, Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 • Tel: (520) 746-1111 • Twx: 910-952-1111
Internet: http://www.burr-brown.com/ • FAXLine: (800) 548-6133 (US/Canada Only) • Cable: BBRCORP • Telex: 066-6491 • FAX: (520) 889-1510 • Immediate Product Info: (800) 548-6132
SBOS060
2
®
INA125
SPECIFICATIONS: VS = ±15V
At TA = +25°C, VS = ±15V, IA common = 0V, VREF common = 0V, and RL = 10k, unless otherwise noted.
INA125P, U INA125PA, UA
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes
no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change
without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant
any BURR-BROWN product for use in life support devices and/or systems.
PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS
INPUT
Offset Voltage, RTI
Initial ±50 ±250 ±500 µV
vs Temperature ±0.25 ±2±5µV/°C
vs Power Supply VS = ±1.35V to ±18V, G = 4 ±3±20 ±50 µV/V
Long-Term Stability ±0.2 µV/mo
Impedance, Differential 1011 || 2 || pF
Common-Mode 1011 || 9 || pF
Safe Input Voltage ±40 V
Input Voltage Range See Text
Common-Mode Rejection VCM = –10.7V to +10.2V
G = 4 78 84 72 dB
G = 10 86 94 80 dB
G = 100 100 114 90 dB
G = 500 100 114 90 dB
BIAS CURRENT VCM = 0V 10 25 50 nA
vs Temperature ±60 pA/°C
Offset Current ±0.5 ±2.5 ±5nA
vs Temperature ±0.5 pA/°C
NOISE, RTI RS = 0
Voltage Noise, f = 10Hz 40 nV/Hz
f = 100Hz 38 nV/Hz
f = 1kHz 38 nV/Hz
f = 0.1Hz to 10Hz 0.8 µVp-p
Current Noise, f = 10Hz 170 fA/Hz
f = 1kHz 56 fA/Hz
f = 0.1Hz to 10Hz 5 pAp-p
GAIN
Gain Equation
4 + 60k/RG
V/V
Range of Gain 4 10,000 ✻✻V/V
Gain Error VO = –14V to +13.3V
G = 4 ±0.01 ±0.075 ±0.1 %
G = 10 ±0.03 ±0.3 ±0.5 %
G = 100 ±0.05 ±0.5 ±1%
G = 500 ±0.1 %
Gain vs Temperature G = 4 ±1±15 ✻✻ppm/°C
G > 4(1) ±25 ±100 ✻✻ppm/°C
Nonlinearity VO = –14V to +13.3V
G = 4 ±0.0004 ±0.002 ±0.004 % of FS
G = 10 ±0.0004 ±0.002 ±0.004 % of FS
G = 100 ±0.001 ±0.01 ✻✻% of FS
G = 500 ±0.002 % of FS
OUTPUT
Voltage: Positive (V+)–1.7 (V+)–0.9 ✻✻ V
Negative (V–)+1 (V–)+0.4 ✻✻ V
Load Capacitance Stability 1000 pF
Short-Circuit Current –9/+12 mA
VOLTAGE REFERENCE VREF = +2.5V, +5V, +10V
Accuracy IL = 0 ±0.15 ±0.5 ±1%
vs Temperature IL = 0 ±18 ±35 ±100 ppm/°C
vs Power Supply, V+ V+ = (VREF + 1.25V) to +36V ±20 ±50 ±100 ppm/V
vs Load IL = 0 to 5mA 3 75 ✻✻ppm/mA
Dropout Voltage, (V+) – VREF(2) Ref Load = 2k1.25 1 ✻✻ V
Bandgap Voltage Reference 1.24 V
Accuracy IL = 0 ±0.5 %
vs Temperature IL = 0 ±18 ppm/°C
3
®
INA125
INA125P, U INA125PA, UA
PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS
FREQUENCY RESPONSE
Bandwidth, –3dB G = 4 150 kHz
G = 10 45 kHz
G = 100 4.5 kHz
G = 500 0.9 kHz
Slew Rate G = 4, 10V Step 0.2 V/µs
Settling Time, 0.01% G = 4, 10V Step 60 µs
G = 10, 10V Step 83 µs
G = 100, 10V Step 375 µs
G = 500, 10V Step 1700 µs
Overload Recovery 50% Overdrive 5 µs
POWER SUPPLY
Specified Operating Voltage ±15 V
Specified Voltage Range ±1.35 ±18 ✻✻V
Quiescent Current, Positive IO = IREF = 0mA 460 525 ✻✻ µA
Negative IO = IREF = 0mA –280 –325 ✻✻ µA
Reference Ground Current(3) 180 µA
Sleep Current (VSLEEP 100mV) RL = 10k, Ref Load = 2kΩ±1±25 ✻✻ µA
SLEEP MODE PIN(4)
VIH (Logic high input voltage) +2.7 V+ ✻✻V
V
IL (Logic low input voltage) 0 +0.1 ✻✻V
I
IH (Logic high input current) 15 µA
IIL (Logic low input current) 0 µA
Wake-up Time(5) 150 µs
TEMPERATURE RANGE
Specification Range –40 +85 ✻✻°C
Operation Range –55 +125 ✻✻°C
Storage Range –55 +125 ✻✻°C
Thermal Resistance,
θ
JA
16-Pin DIP 80 °C/W
SO-16 Surface-Mount 100 °C/W
Specification same as INA125P, U.
NOTES: (1) Temperature coefficient of the "Internal Resistor" in the gain equation. Does not include TCR of gain-setting resistor, RG. (2) Dropout voltage is the
positive supply voltage minus the reference voltage that produces a 1% decrease in reference voltage. (3) VREFCOM pin. (4) Voltage measured with respect to
Reference Common. Logic low input selects Sleep mode. (5) IA and Reference, see Typical Performance Curves.
SPECIFICATIONS: VS = ±15V (CONT)
At TA = +25°C, VS = ±15V, IA common = 0V, VREF common = 0V, and RL = 10k, unless otherwise noted.
INA125P, U INA125PA, UA
PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS
INPUT
Offset Voltage, RTI
Initial ±75 ±500 ±750 µV
vs Temperature ±0.25 µV/°C
vs Power Supply VS = +2.7V to +36V 3 20 50 µV/V
Input Voltage Range See Text
Common-Mode Rejection VCM = +1.1V to +3.6V
G = 4 78 84 72 dB
G = 10 86 94 80 dB
G = 100 100 114 90 dB
G = 500 100 114 90 dB
GAIN
Gain Error VO = +0.3V to +3.8V
G = 4 ±0.01 %
OUTPUT
Voltage, Positive (V+)–1.2 (V+)–0.8 ✻✻ V
Negative (V–)+0.3 (V–)+0.15 ✻✻ V
POWER SUPPLY
Specified Operating Voltage +5 V
Operating Voltage Range +2.7 +36 ✻✻V
Quiescent Current IO = IREF = 0mA 460 525 ✻✻ µA
Sleep Current (VSLEEP 100mV) RL = 10k, Ref Load = 2kΩ±1±25 ✻✻ µA
Specification same as INA125P, U.
SPECIFICATIONS: VS = +5V
At TA = +25°C, VS = +5V, IA common at VS/2, VREF common = VS/2, VCM = VS/2, and RL = 10k to VS/2, unless otherwise noted.
4
®
INA125
PIN CONFIGURATION
Top View 16-Pin DIP, SO-16 Power Supply Voltage, V+ to V– ........................................................36V
Input Signal Voltage .......................................................................... ±40V
Output Short Circuit ................................................................. Continuous
Operating Temperature ................................................. –55°C to +125°C
Storage Temperature ..................................................... –55°C to +125°C
Lead Temperature (soldering, 10s)............................................... +300°C
NOTE: Stresses above these ratings may cause permanent damage.
ABSOLUTE MAXIMUM RATINGS(1)
V+
SLEEP
V–
V
REF
OUT
IA
REF
V
IN
V
IN
R
G
V
REF
10
V
REF
5
V
REF
2.5
V
REF
BG
V
REF
COM
Sense
V
O
R
G
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
+
ELECTROSTATIC
DISCHARGE SENSITIVITY
This integrated circuit can be damaged by ESD. Burr-Brown
recommends that all integrated circuits be handled with ap-
propriate precautions. Failure to observe proper handling and
installation procedures can cause damage.
ESD damage can range from subtle performance degradation
to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric
changes could cause the device not to meet its published
specifications.
PACKAGE INFORMATION
PACKAGE DRAWING
PRODUCT PACKAGE NUMBER(1)
INA125PA 16-Pin Plastic DIP 180
INA125P 16-Pin Plastic DIP 180
INA125UA SO-16 Surface-Mount 265
INA125U SO-16 Surface-Mount 265
NOTES: (1) For detailed drawing and dimension table, please see end of data
sheet, or Appendix C of Burr-Brown IC Data Book.
5
®
INA125
TYPICAL PERFORMANCE CURVES
At TA = +25°C and VS = ±15V, unless otherwise noted.
GAIN vs FREQUENCY
60
50
40
30
20
10
0
Gain (dB)
Frequency (Hz)
1 10 100 1k 10k 100k 1M
G = 500
G = 100
G = 10
G = 4
COMMON-MODE REJECTION vs FREQUENCY
120
100
80
60
40
20
0
Common-Mode Rejection (dB)
Frequency (Hz)
1 10 100 1k 10k 100k 1M
G = 100, 500
G = 4
G = 10
G = 500
G = 100
INPUT COMMON-MODE VOLTAGE
vs OUTPUT VOLTAGE, V
S
= ±5V
Output Voltage (V)
Input Common-Mode Voltage (V)
–5 –4 5–3 –2 –1 0 1 2 3 4
5
4
3
2
1
0
–1
–2
–3
–4
–5
Limited by A
2
output swing—see text
Limited by A
2
output swing—see text
V
S
= ±5V
V
S
= +5V
IA
REF
= 0V
POSITIVE POWER SUPPLY REJECTION
vs FREQUENCY
140
120
100
80
60
40
20
Power Supply Rejection (dB)
Frequency (Hz)
1 10 100 1k 10k 100k 1M
G = 4 G = 10
G = 500
G = 100
NEGATIVE POWER SUPPLY REJECTION
vs FREQUENCY
120
100
80
60
40
20
0
Power Supply Rejection (dB)
Frequency (Hz)
1 10 100 1k 10k 100k 1M
G = 4
G = 10
G = 100 G = 500
INPUT COMMON-MODE VOLTAGE
vs OUTPUT VOLTAGE, V
S
= ±15V
Output Voltage (V)
Input Common-Mode Voltage (V)
–15 –10 0 5 15–5
15
10
5
0
–5
–10
–15 10
V
D/2
+
+
V
CM
V
O
V
D/2
IA
REF
–15V
+15V
+
Limited by A
2
output swing—see text
Limited by A
2
output swing—see text
6
®
INA125
TYPICAL PERFORMANCE CURVES (CONT)
At TA = +25°C and VS = ±15V, unless otherwise noted.
SLEW RATE vs TEMPERATURE
Temperature (°C)
Slew Rate (V/µs)
0.30
0.25
0.20
0.15
0.10
0.05
0–75 –50 –25 0 25 50 75 100 125
INPUT BIAS AND OFFSET CURRENT
vs TEMPERATURE
Temperature (°C)
Input Bias and Offset Current (nA)
16
14
12
10
8
6
4
2
0–75 –50 –25 0 25 50 75 100 125
I
B
I
OS
INPUT-REFERRED VOLTAGE AND CURRENT NOISE
vs FREQUENCY
Frequency (Hz)
Input-Referred Voltage Noise (nV/Hz)
1 10010 1k 10k
1k
100
10
1
1k
100
10
1
100k
Input Bias Current Noise (fA/Hz)
Voltage Noise
Current Noise
INPUT-REFERRED OFFSET VOLTAGE
vs SLEEP TURN-ON TIME
Time From Turn-On (µs)
Offset Voltage Change (µV)
0 25050 100 150 200
100
80
60
40
20
0
–20
–40
–60
–80
–100
G = 100
SETTLING TIME vs GAIN
Gain (V/V)
Settling Time (µs)
1 10010 1k
10k
1k
100
10
0.1%
0.01%
QUIESCENT CURRENT AND SLEEP CURRENT
vs TEMPERATURE
Temperature (°C)
Quiescent and Sleep Current (µA)
550
500
450
400
350
300
250
200
150
100
50
0
–50–75 –50 –25 0 25 50 75 100 125
–I
SLEEP
–I
Q
+I
Q
±I
SLEEP
+I
SLEEP
V
SLEEP
= 100mV
V
SLEEP
= 0V
7
®
INA125
TYPICAL PERFORMANCE CURVES (CONT)
At TA = +25°C and VS = ±15V, unless otherwise noted.
200mV/div
5V/div
100µs/div
100µs/div
200nV/div
1µs/div
INPUT-REFERRED NOISE, 0.1Hz to 10Hz
SMALL-SIGNAL RESPONSE LARGE-SIGNAL RESPONSE
INPUT BIAS CURRENT
vs INPUT OVERLOAD VOLTAGE
Overload Voltage (V)
Input Bias Current (µA)
–40 400
200
160
120
80
40
0
–40
–80
–120
–160
–200
All Gains
OUTPUT VOLTAGE SWING
vs OUTPUT CURRENT
0 ±2±8±10
Output Current (mA)
Output Voltage (V)
+125°C
V+
(V+)–1
(V+)–2
(V+)–3
(V+)–4
(V+)–5
(V–)+5
(V–)+4
(V–)+3
(V–)+2
(V–)+1
V–
+75°C –55°C
+125°C
–55°C
+25°C
+75°C
+25°C
DELTA V
OS
vs REFERENCE CURRENT
Reference Current (mA)
Delta V
OS
, RTI (µV)
25
20
15
10
5
0
–5 –8 –6 –4 –2 0 2 4 6 8
Sourcing
Sinking
G = 4
G = 100
G = 4
G = 100
8
®
INA125
TYPICAL PERFORMANCE CURVES (CONT)
At TA = +25°C and VS = ±15V, unless otherwise noted.
REFERENCE TURN-ON SETTLING TIME
Time From Power Supply Turn-On (µs)
Reference Error (%)
05010 20 30 40
15
12
9
6
4
0
–3
–6
–9
–12
–15
V
REF
= 10V
V
REF
= 5V
V
REF
= 2.5V
REFERENCE VOLTAGE DEVIATION
vs TEMPERATURE
Temperature (°C)
Reference Voltage Deviation (ppm)
–75 125–50 –25 0 25 50 75 100
50
0
–50
–100
–150
–200
V
REF
= V
BG
, 2.5V, 5V, or 10V
INPUT-REFERRED OFFSET VOLTAGE
PRODUCTION DISTRIBUTION, V
S
= ±15V
Percent of Amplifiers (%)
Input-Referred Offset Voltage (µV)
30
25
20
15
10
5
0
–500
–450
–400
–350
–300
–250
–200
–150
–100
–50
0
50
100
150
200
250
300
350
400
450
500
Typical production
distribution of
packaged units.
0.02% 0.1%
0.02%
0.1%
INPUT-REFERRED OFFSET VOLTAGE
PRODUCTION DISTRIBUTION, V
S
= +5V
Percent of Amplifiers (%)
Input-Referred Offset Voltage (µV)
35
30
25
20
15
10
5
0
–750
–675
–600
–525
–450
–375
–300
–225
–150
–75
0
75
150
225
300
375
450
525
600
675
750
Typical production
distribution of
packaged units.
0.02% 0.05%
0.1%
0.1%
INPUT-REFERRED OFFSET VOLTAGE DRIFT
PRODUCTION DISTRIBUTION
Percent of Amplifiers (%)
Input-Referred Offset Voltage Drift (µV/°C)
90
80
70
60
50
40
30
20
10
0
±0.25
±0.50
±0.75
±1.00
±1.25
±1.50
±1.75
±2.00
±2.25
±2.50
±2.75
±3.00
±3.25
±3.50
±3.75
±4.00
Typical production
distribution of packaged units.
V
S
= ±15V or +5V
VOLTAGE REFERENCE DRIFT
PRODUCTION DISTRIBUTION
Percent of Amplifiers (%)
Voltage Reference Drift (ppm/°C)
100
90
80
70
60
50
40
30
20
10
0
10
20
30
40
50
60
70
80
90
100
Typical production
distribution of packaged units.
0.3% 0.2% 0.05%
9
®
INA125
2µV/div
10µs/div1µs/div
0.1Hz to 10Hz REFERENCE NOISE
VREF = 2.5V, CL = 100pF
TYPICAL PERFORMANCE CURVES (CONT)
At TA = +25°C and VS = ±15V, unless otherwise noted.
REFERENCE TRANSIENT RESPONSE
VREF = 2.5V, CL = 100pF
1mA/div
50mV/div
NEGATIVE REFERENCE AC LINE REJECTION
vs FREQUENCY
Frequency (Hz)
Negative AC Line Rejection (dB)
11M10 100 1k 10k 100k
120
100
80
60
40
20
0
V
REF
= 2.5V
V
REF
= 5V
V
REF
= 10V
Reference
Output
POSITIVE REFERENCE AC LINE REJECTION
vs FREQUENCY
Frequency (Hz)
Positive AC Line Rejection (dB)
11M10 100 1k 10k 100k
120
100
80
60
40
20
0
V
REF
= 2.5V V
REF
= 5V
V
REF
= 10V C = 0.01µF
C = 0.1µF
Capacitor connected between
V
REF
OUT
and V
REF
COM.
+1mA
0mA
–1mA
10
®
INA125
APPLICATION INFORMATION
Figure 1 shows the basic connections required for operation
of the INA125. Applications with noisy or high impedance
power supplies may require decoupling capacitors close to
the device pins as shown.
The output is referred to the instrumentation amplifier refer-
ence (IAREF) terminal which is normally grounded. This
must be a low impedance connection to assure good com-
mon-mode rejection. A resistance of 12 in series with the
IAREF pin will cause a typical device to degrade to approxi-
mately 80dB CMR (G = 4).
Connecting VREFOUT (pin 4) to one of the four available
reference voltage pins (VREFBG, VREF2.5, VREF5, or VREF10)
provides an accurate voltage source for bridge applications.
For example, in Figure 1 VREFOUT is connected to VREF10
thus supplying 10V to the bridge. It is recommended that
VREFOUT be connected to one of the reference voltage pins
even when the reference is not being utilized to avoid
saturating the reference amplifier. Driving the SLEEP pin
LOW puts the INA125 in a shutdown mode.
SETTING THE GAIN
Gain of the INA125 is set by connecting a single external
resistor, RG, between pins 8 and 9:
(1)
Commonly used gains and RG resistor values are shown in
Figure 1.
DESIRED GAIN RGNEAREST 1%
(V/V) ()R
G VALUE ()
4NCNC
5 60k 60.4k
10 10k 10k
20 3750 3740
50 1304 1300
100 625 619
200 306 309
500 121 121
1000 60 60.4
2000 30 30.1
10000 6 6.04
NC: No Connection.
FIGURE 1. Basic Connections.
G=4+60k
R
G
A
1
Ref
Amp
10V
A
2
30k
10k
10k
30k
Bandgap
V
REF
13
12
1
14
15
16
4
6
9
10
11
IA
REF
V
O
5
8
7
R
G
Load
Sense +
R
(2)
R
2R
4R
INA125
V
REF
COM
V
REF
BG
V
REF
2.5
V
REF
5
V
REF
10
V
REF
Out
V
IN
0.1µF
V+
+
V
IN
2
SLEEP
(1)
3
0.1µF
V–
V
O
= (V
IN
– V
IN
) G
G = 4 + 60k
+–
R
G
NOTE: (1) SLEEP pin should be connected
to V+ if shutdown function is not being used.
(2) Nominal value of R is 21k, ±25%.
11
®
INA125
The 60k term in equation 1 comes from the internal metal
film resistors which are laser trimmed to accurate absolute
values. The accuracy and temperature coefficient of these
resistors are included in the gain accuracy and drift specifi-
cations of the INA125.
The stability and temperature drift of the external gain
setting resistor, RG, also affects gain. RG’s contribution to
gain accuracy and drift can be directly inferred from the gain
equation (1). Low resistor values required for high gain can
make wiring resistance important. Sockets add to the wiring
resistance, which will contribute additional gain error (pos-
sibly an unstable gain error) in gains of approximately 100
or greater.
OFFSET TRIMMING
The INA125 is laser trimmed for low offset voltage and
offset voltage drift. Most applications require no external
offset adjustment. Figure 2 shows an optional circuit for
trimming the output offset voltage. The voltage applied to
the IAREF terminal is added to the output signal. The op amp
buffer is used to provide low impedance at the IAREF
terminal to preserve good common-mode rejection.
FIGURE 2. Optional Trimming of Output Offset Voltage.
10k
OPA237
±10mV
Adjustment Range
100
100
100µA
1/2 REF200
100µA
1/2 REF200
V+
V–
R
G
INA125
IA
REF
V
O
V
IN
V
IN
+
INPUT BIAS CURRENT RETURN
The input impedance of the INA125 is extremely high—
approximately 1011. However, a path must be provided for
the input bias current of both inputs. This input bias current
flows out of the device and is approximately 10nA. High
input impedance means that this input bias current changes
very little with varying input voltage.
Input circuitry must provide a path for this input bias current
for proper operation. Figure 3 shows various provisions for
an input bias current path. Without a bias current path, the
inputs will float to a potential which exceeds the common-
mode range, and the input amplifiers will saturate.
If the differential source resistance is low, the bias current
return path can be connected to one input (see the thermo-
couple example in Figure 3). With higher source impedance,
using two equal resistors provides a balanced input with
possible advantages of lower input offset voltage due to bias
current and better high frequency common-mode rejection.
INPUT COMMON-MODE RANGE
The input common-mode range of the INA125 is shown in
the typical performance curves. The common-mode range is
limited on the negative side by the output voltage swing of
A2, an internal circuit node that cannot be measured on an
external pin. The output voltage of A2 can be expressed as:
V02 = 1.3VIN – (VIN – VIN) (10k/RG)
(voltages referred to IAREF terminal, pin 5)
The internal op amp A2 is identical to A1. Its output swing
is limited to approximately 0.8V from the positive supply
and 0.25V from the negative supply. When the input com-
mon-mode range is exceeded (A2’s output is saturated), A1
can still be in linear operation, responding to changes in the
non-inverting input voltage. The output voltage, however,
will be invalid.
PRECISION VOLTAGE REFERENCE
The on-board precision voltage reference provides an accu-
rate voltage source for bridge and other transducer applica-
tions or ratiometric conversion with analog-to-digital con-
verters. A reference output of 2.5V, 5V or 10V is available
by connecting VREFOUT (pin 4) to one of the VREF pins
(VREF2.5, VREF5, or VREF10). Reference voltages are laser-
trimmed for low inital error and low temperature drift.
Connecting VREFOUT to VREFBG (pin 13) produces the
bandgap reference voltage (1.24V ±0.5%) at the reference
output.
Positive supply voltage must be 1.25V above the desired
reference voltage. For example, with V+ = 2.7V, only the
1.24V reference (VREFBG) can be used. If using dual sup-
plies VREFCOM can be connected to V–, increasing the
+
FIGURE 3. Providing an Input Common-Mode Current Path.
47k47k
10k
Microphone,
Hydrophone
etc.
Thermocouple
Center-tap provides
bias current return.
INA125
INA125
INA125
12
®
INA125
amount of supply voltage headroom available to the refer-
ence. Approximately 180µA flows out of the VREFCOM
terminal, therefore, it is recommended that it be connected
through a low impedance path to sensor common to avoid
possible ground loop problems.
Reference noise is proportional to the reference voltage
selected. With VREF = 2.5V, 0.1Hz to 10Hz peak-to-peak
noise is approximately 9µVp-p. Noise increases to 36µVp-p
for the 10V reference. Output drive capability of the voltage
reference is improved by connecting a transistor as shown in
Figure 4. The external transistor also serves to remove power
from the INA125.
Internal resistors that set the voltage reference output are
ratio-trimmed for accurate output voltages (±0.5% max). The
absolute resistance values, however, may vary ±25%. Adjust-
ment of the reference output voltage with an external resistor
is not recommended because the required resistor value is
uncertain.
SHUTDOWN
The INA125 has a shutdown option. When the SLEEP pin
is LOW (100mV or less), the supply current drops to
approximately 1µA and output impedance becomes approxi-
mately 80k. Best performance is achieved with CMOS
logic. To maintain low sleep current at high temperatures,
VSLEEP should be as close to 0V as possible. This should not
be a problem if using CMOS logic unless the CMOS gate is
driving other currents. Refer to the typical performance
curve, “Sleep Current vs Temperature.”
A transition region exists when VSLEEP is between 400mV
and 2.7V (with respect to VREFCOM) where the output is
unpredictable. Operation in this region is not recommended.
The INA125 achieves high accuracy quickly following wake-
up (VSLEEP 2.7V). See the typical performance curve
“Input-Referred Offset Voltage vs Sleep Turn-on Time.” If
shutdown is not being used, connect the SLEEP pin to V+.
LOW VOLTAGE OPERATION
The INA125 can be operated on power supplies as low as
±1.35V. Performance remains excellent with power sup-
plies ranging from ±1.35V to ±18V. Most parameters vary
only slightly throughout this supply voltage range—see
typical performance curves. Operation at very low supply
voltage requires careful attention to ensure that the com-
mon-mode voltage remains within its linear range. See
“Input Common-Mode Voltage Range.” As previously men-
tioned, when using the on-board reference with low supply
voltages, it may be necessary to connect VREFCOM to V– to
ensure VS – VREF 1.25V.
SINGLE SUPPLY OPERATION
The INA125 can be used on single power supplies of +2.7V
to +36V. Figure 5 shows a basic single supply circuit. The
IAREF, VREFCOM, and V– terminals are connected to ground.
Zero differential input voltage will demand an output volt-
age of 0V (ground). When the load is referred to ground as
shown, actual output voltage swing is limited to approxi-
mately 150mV above ground. The typical performance curve
“Output Voltage Swing vs Output Current” shows how the
output swing varies with output current.
With single supply operation, careful attention should be
paid to input common-mode range, output voltage swing of
both op amps, and the voltage applied to the IAREF terminal.
VIN+ and VIN– must both be 1V above ground for linear
operation. You cannot, for instance, connect the inverting
input to ground and measure a voltage connected to the non-
inverting input.
FIGURE 5. Single Supply Bridge Amplifier.
1000
+3V
R
L
1.5V – V
1.5V + V
+3V
R
G
INA125 V
O
3512
Ref
Amp
to load
(transducer)
V+
Bandgap
V
REF
13
12
14
15
16
4
INA125
V
REF
COM
V
REF
BG
V
REF
2.5
V
REF
5
V
REF
10
V
REF
Out
TIP29C
10V
FIGURE 4. Reference Current Boost.
13
®
INA125
INPUT PROTECTION
The inputs of the INA125 are individually protected for
voltage up to ±40V. For example, a condition of –40V on
one input and +40V on the other input will not cause
damage. Internal circuitry on each input provides low series
impedance under normal signal conditions. To provide
equivalent protection, series input resistors would contribute
FIGURE 6. Psuedoground Bridge Measurement, 5V Single Supply.
excessive noise. If the input is overloaded, the protection
circuitry limits the input current to a safe value of approxi-
mately 120µA to 190µA. The typical performance curve
“Input Bias Current vs Input Overload Voltage” shows this
input current limit behavior. The inputs are protected even if
the power supplies are disconnected or turned off.
A
1
Ref
Amp
2.5V
A
2
30k
10k
10k
30k
Bandgap
V
REF
13
12
14
15
16
4
6
9
10
11
IA
REF
5
2.5V
(1)
(Psuedoground)
8
7
R
G
Load
Sense
INA125
V
REF
COM
V
REF
BG
V
REF
2.5
V
REF
5
V
REF
10
V
IN
+
V
IN
1
3
+5V
2
SLEEP
+
V
O
= +2.5V +
[
(
V
IN
– V
IN
)
(
4 +
)
]
+–
60k
R
G
NOTE: (1) “Psuedoground” is at +2.5V above actual ground.
This provides a precision reference voltage for succeeding
single-supply op amp stages.
PACKAGING INFORMATION
Orderable Device Status (1) Package
Type Package
Drawing Pins Package
Qty Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
INA125P ACTIVE PDIP N 16 25 Green (RoHS &
no Sb/Br) CU NIPDAU N / A for Pkg Type
INA125PA ACTIVE PDIP N 16 25 Green (RoHS &
no Sb/Br) CU NIPDAU N / A for Pkg Type
INA125PAG4 ACTIVE PDIP N 16 25 Green (RoHS &
no Sb/Br) CU NIPDAU N / A for Pkg Type
INA125PG4 ACTIVE PDIP N 16 25 Green (RoHS &
no Sb/Br) CU NIPDAU N / A for Pkg Type
INA125U ACTIVE SOIC D 16 40 Green (RoHS &
no Sb/Br) CU NIPDAU Level-3-260C-168 HR
INA125U/2K5 ACTIVE SOIC D 16 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-3-260C-168 HR
INA125U/2K5E4 ACTIVE SOIC D 16 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-3-260C-168 HR
INA125UA ACTIVE SOIC D 16 40 Green (RoHS &
no Sb/Br) CU NIPDAU Level-3-260C-168 HR
INA125UA/2K5 ACTIVE SOIC D 16 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-3-260C-168 HR
INA125UA/2K5E4 ACTIVE SOIC D 16 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-3-260C-168 HR
INA125UAG4 ACTIVE SOIC D 16 40 Green (RoHS &
no Sb/Br) CU NIPDAU Level-3-260C-168 HR
INA125UE4 ACTIVE SOIC D 16 40 Green (RoHS &
no Sb/Br) CU NIPDAU Level-3-260C-168 HR
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
PACKAGE OPTION ADDENDUM
www.ti.com 16-Feb-2009
Addendum-Page 1
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
PACKAGE OPTION ADDENDUM
www.ti.com 16-Feb-2009
Addendum-Page 2
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0 (mm) B0 (mm) K0 (mm) P1
(mm) W
(mm) Pin1
Quadrant
INA125U/2K5 SOIC D 16 2500 330.0 16.4 6.5 10.3 2.1 8.0 16.0 Q1
INA125UA/2K5 SOIC D 16 2500 330.0 16.4 6.5 10.3 2.1 8.0 16.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 5-Sep-2008
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
INA125U/2K5 SOIC D 16 2500 346.0 346.0 33.0
INA125UA/2K5 SOIC D 16 2500 346.0 346.0 33.0
PACKAGE MATERIALS INFORMATION
www.ti.com 5-Sep-2008
Pack Materials-Page 2
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