5962-9221802M2A - Texas Instruments High-Performance Analog

CY54FCT374T, CY74FCT374T

8-BIT REGISTERS

WITH 3-STATE OUTPUTS

SCCS022A – MAY 1994 – REVISED OCTOBER 2001

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

Function, Pinout, and Drive Compatible

With FCT and F Logic

Reduced VOH (Typically = 3.3 V) Versions

of Equivalent FCT Functions

Edge-Rate Control Circuitry for

Significantly Improved Noise

Characteristics

Ioff Supports Partial-Power-Down Mode

Operation

Matched Rise and Fall Times

Fully Compatible With TTL Input and

Output Logic Levels

ESD Protection Exceeds JESD 22

– 2000-V Human-Body Model (A114-A)

– 200-V Machine Model (A115-A)

– 1000-V Charged-Device Model (C101)

Edge-Triggered D-Type Inputs

250-MHz Typical Switching Rate

CY54FCT374T

– 32-mA Output Sink Current

– 12-mA Output Source Current

CY74FCT374T

– 64-mA Output Sink Current

– 32-mA Output Source Current

3-State Outputs

description

The ’FCT374T devices are high-speed, low-power , octal D-type flip-flops, featuring separate D-type inputs for

each flip-flop. These devices have 3-state outputs for bus-oriented applications. A buffered clock (CP) and

output-enable (OE) inputs are common to all flip-flops. The eight flip-flops in the ’FCT374T store the state of

their individual D inputs that meet the setup-time and hold-time requirements on the low-to-high CP transition.

When OE is low, the contents of the eight flip-flops are available at the outputs. When OE is high, the outputs

are in the high-impedance state. The state of OE does not affect the state of the flip-flops.

These devices are fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the

outputs, preventing damaging current backflow through the device when it is powered down.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

On products compliant to MIL-PRF-38535, all parameters are tested

unless otherwise noted. On all other products, production

processing does not necessarily include testing of all parameters.

CY54FCT374T ...D PACKAGE

CY74FCT374T ...P, Q, OR SO PACKAGE

(TOP VIEW)

CY54FCT374T ...L PACKAGE

(TOP VIEW)

GND

VCC

3 2 1 20 19

9 10 11 12 13

GND

VCC

CY54FCT374T, CY74FCT374T

8-BIT REGISTERS

WITH 3-STATE OUTPUTS

SCCS022A – MA Y 1994 – REVISED OCT OBER 2001

2POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

ORDERING INFORMATION

TAPACKAGE†SPEED

(ns) ORDERABLE

PART NUMBER TOP-SIDE

MARKING

QSOP – Q Tape and reel 5.2 CY74FCT374CTQCT FCT374C

SOIC SO

Tube 5.2 CY74FCT374CTSOC

FCT374C

SOIC

–

Tape and reel 5.2 CY74FCT374CTSOCT

FCT374C

DIP – P Tube 6.5 CY74FCT374ATPC CY74FCT374ATPC

40°Cto85°C

QSOP – Q Tape and reel 6.5 CY74FCT374ATQCT FCT374A

–

40°C

85°C

SOIC SO

Tube 6.5 CY74FCT374ATSOC

FCT374A

SOIC

–

Tape and reel 6.5 CY74FCT374ATSOCT

FCT374A

QSOP – Q Tape and reel 10 CY74FCT374TQCT FCT374

SOIC SO

Tube 10 CY74FCT374TSOC

FCT374

SOIC

–

Tape and reel 10 CY74FCT374TSOCT

FCT374

CDIP – D Tube 6.2 CY54FCT374CTDMB

LCC – L Tube 6.2 CY54FCT374CTLMB

55°C to 125°C

CDIP – D Tube 7.2 CY54FCT374ATDMB

–

55°C

125°C

LCC – L Tube 7.2 CY54FCT374ATLMB

CDIP – D Tube 11 CY54FCT374TDMB

LCC – L Tube 11 CY54FCT374TLMB

†Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available

at www.ti.com/sc/package.

FUNCTION TABLE

INPUTS OUTPUT

D CP OE O

H↑L H

L↑LL

X X H Z

H = High logic level, L = Low logic level,

X = Don’t care, Z = High-impedance state,

↑ = Low-to-high clock transition

logic diagram (positive logic)

To Seven Other Channels

1D O0

CY54FCT374T, CY74FCT374T

8-BIT REGISTERS

WITH 3-STATE OUTPUTS

SCCS022A – MA Y 1994 – REVISED OCT OBER 2001

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†

Supply voltage range to ground potential –0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

DC input voltage range –0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

DC output voltage range –0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

DC output current (maximum sink current/pin) 120 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Package thermal impedance, θJA (see Note 1): P package 69°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Q package 68°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

SO package 58°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Ambient temperature range with power applied, TA –65°C to 135°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Storage temperature range, Tstg –65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

†Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only , and

functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied.

Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTE 1: The package thermal impedance is calculated in accordance with JESD 51-7.

recommended operating conditions (see Note 2)

CY54FCT374T CY74FCT374T

UNIT

MIN NOM MAX MIN NOM MAX

UNIT

VCC Supply voltage 4.5 5 5.5 4.75 5 5.25 V

VIH High-level input voltage 2 2 V

VIL Low-level input voltage 0.8 0.8 V

IOH High-level output current –12 –32 mA

IOL Low-level output current 32 64 mA

TAOperating free-air temperature –55 125 –40 85 °C

NOTE 2: All unused inputs of the device must be held at VCC or GND to ensure proper device operation.

CY54FCT374T, CY74FCT374T

8-BIT REGISTERS

WITH 3-STATE OUTPUTS

SCCS022A – MA Y 1994 – REVISED OCT OBER 2001

4POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

electrical characteristics over recommended operating free-air temperature range (unless

otherwise noted)

PARAMETER

TEST CONDITIONS

CY54FCT374T CY74FCT374T

UNIT

PARAMETER

TEST

CONDITIONS

MIN TYP†MAX MIN TYP†MAX

UNIT

VIK

VCC = 4.5 V, IIN = –18 mA –0.7 –1.2

IK VCC = 4.75 V, IIN = –18 mA –0.7 –1.2

VCC = 4.5 V, IOH = –12 mA 2.4 3.3

VOH

VCC 475V

IOH = –32 mA 2V

CC =

IOH = –15 mA 2.4 3.3

VOL

VCC = 4.5 V, IOL = 32 mA 0.3 0.55

OL VCC = 4.75 V, IOL = 64 mA 0.3 0.55

Vhys All inputs 0.2 0.2 V

VCC = 5.5 V, VIN = VCC 5

µA

IVCC = 5.25 V, VIN = VCC 5µ

IIH

VCC = 5.5 V, VIN = 2.7 V ±1

µA

IH VCC = 5.25 V, VIN = 2.7 V ±1µ

IIL

VCC = 5.5 V, VIN = 0.5 V ±1

µA

IL VCC = 5.25 V, VIN = 0.5 V ±1µ

Ioff VCC = 0 V, VOUT = 4.5 V ±1±1µA

IOS‡

VCC = 5.5 V, VOUT = 0 V –60 –120 –225

‡

VCC = 5.25 V, VOUT = 0 V –60 –120 –225

IOZH

VCC = 5.5 V, VIN = 2.7 V 10

µA

OZH VCC = 5.25 V, VIN = 2.7 V 10 µ

IOZL

VCC = 5.5 V, VIN = 0.5 V –10

µA

OZL VCC = 5.25 V, VIN = 0.5 V –10 µ

ICC

VCC = 5.5 V, VIN ≤ 0.2 V, VIN ≥ VCC – 0.2 V 0.1 0.2

CC VCC = 5.25 V, VIN ≤ 0.2 V, VIN ≥ VCC – 0.2 V 0.1 0.2

∆ICC

VCC = 5.5 V, VIN = 3.4 V§, f1 = 0, Outputs open 0.5 2

∆I

CC VCC = 5.25 V, VIN = 3.4 V§, f1 = 0, Outputs open 0.5 2

†Typical values are at VCC = 5 V, TA = 25°C.

‡Not more than one output should be shorted at a time. Duration of short should not exceed one second. The use of high-speed test apparatus and/or

sample-and-hold techniques are preferable to minimize internal chip heating and more accurately reflect operational values. Otherwise, prolonged

shorting of a high output can raise the chip temperature well above normal and cause invalid readings in other parametric tests. In any sequence

of parameter tests, IOS tests should be performed last.

§Per TTL-driven input (VIN = 3.4 V); all other inputs at VCC or GND

CY54FCT374T, CY74FCT374T

8-BIT REGISTERS

WITH 3-STATE OUTPUTS

SCCS022A – MA Y 1994 – REVISED OCT OBER 2001

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

electrical characteristics over recommended operating free-air temperature range (unless

otherwise noted) (continued)

PARAMETER

TEST CONDITIONS

CY54FCT374T CY74FCT374T

UNIT

PARAMETER

TEST

CONDITIONS

MIN TYP†MAX MIN TYP†MAX

UNIT

ICCD¶

VCC = 5.5 V, Outputs open,

One bit switching at 50% duty cycle, OE = GND,

VIN ≤ 0.2 V or VIN ≥ VCC – 0.2 V 0.06 0.12 mA/

CCD

VCC = 5.25 V, Outputs open,

One bit switching at 50% duty cycle, OE = GND,

VIN ≤ 0.2 V or VIN ≥ VCC – 0.2 V 0.06 0.12 MHz

One bit

switching

at f

= 5 MHz

VIN ≤0.2 V or

VIN ≥VCC – 0.2 V 0.7 1.4

VCC = 5.5 V,

= 10 MHz,

at 50% duty

cycle VIN = 3.4 V or GND 1.2 3.4

Outputs open,

OE = GND Eight bits

switching

at f

= 2.5 MHz

VIN ≤0.2 V or

VIN ≥VCC – 0.2 V 1.6 3.2||

at 50% duty

cycle VIN = 3.4 V or GND 3.9 12.2||

COne bit

switching

at f

= 5 MHz

VIN ≤0.2 V or

VIN ≥VCC – 0.2 V 0.7 1.4

VCC = 5.25 V,

= 10 MHz,

at 50% duty

cycle VIN = 3.4 V or GND 1.2 3.4

Outputs open,

OE = GND Eight bits

switching

at f

= 2.5 MHz

VIN ≤0.2 V or

VIN ≥VCC – 0.2 V 1.6 3.2||

at 50% duty

cycle VIN = 3.4 V or GND 3.9 12.2||

Ci5 10 5 10 pF

Co9 12 9 12 pF

†Typical values are at VCC = 5 V, TA = 25°C.

¶This parameter is derived for use in total power-supply calculations.

#IC= ICC + ∆ICC × DH × NT + ICCD (f0/2 + f1 × N1)

Where:

IC= Total supply current

ICC = Power-supply current with CMOS input levels

∆ICC = Power-supply current for a TTL high input (VIN = 3.4 V)

DH= Duty cycle for TTL inputs high

NT= Number of TTL inputs at DH

ICCD = Dynamic current caused by an input transition pair (HLH or LHL)

f0= Clock frequency for registered devices, otherwise zero

f1= Input signal frequency

N1= Number of inputs changing at f1

All currents are in milliamperes and all frequencies are in megahertz.

|| Values for these conditions are examples of the ICC formula.

CY54FCT374T, CY74FCT374T

8-BIT REGISTERS

WITH 3-STATE OUTPUTS

SCCS022A – MA Y 1994 – REVISED OCT OBER 2001

6POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

timing requirements over recommended operating free-air temperature range (unless otherwise

noted) (see Figure 1)

CY54FCT374T CY54FCT374AT CY54FCT374CT

UNIT

MIN MAX MIN MAX MIN MAX

UNIT

twPulse duration, CP high or low 7 6 6 ns

tsu Setup time, data before CP↑2 2 2 ns

thHold time, data after CP↑1.5 1.5 1.5 ns

timing requirements over recommended operating free-air temperature range (unless otherwise

noted) (see Figure 1)

CY74FCT374T CY74FCT374AT CY74FCT374CT

UNIT

MIN MAX MIN MAX MIN MAX

UNIT

twPulse duration, CP high or low 7 5 5 ns

tsu Setup time, data before CP↑2 2 2 ns

thHold time, data after CP↑1.5 1.5 1.5 ns

switching characteristics over operating free-air temperature range (see Figure 1)

PARAMETER

FROM TO CY54FCT374T CY54FCT374AT CY54FCT374CT

UNIT

PARAMETER

(INPUT) (OUTPUT) MIN MAX MIN MAX MIN MAX

UNIT

tPLH

211 2 7.2 2 6.2

tPHL

211 2 7.2 2 6.2

tPZH

1.5 14 1.5 7.5 1.5 6.2

tPZL

1.5 14 1.5 7.5 1.5 6.2

tPHZ

1.5 8 1.5 6.5 1.5 5.7

tPLZ

1.5 8 1.5 6.5 1.5 5.7

switching characteristics over operating free-air temperature range (see Figure 1)

PARAMETER

FROM TO CY74FCT374T CY74FCT374AT CY74FCT374CT

UNIT

PARAMETER

(INPUT) (OUTPUT) MIN MAX MIN MAX MIN MAX

UNIT

tPLH

2 10 2 6.5 2 5.2

tPHL

2 10 2 6.5 2 5.2

tPZH

1.5 12.5 1.5 6.5 1.5 5.5

tPZL

1.5 12.5 1.5 6.5 1.5 5.5

tPHZ

1.5 8 1.5 5.5 1.5 5

tPLZ

1.5 8 1.5 5.5 1.5 5

CY54FCT374T, CY74FCT374T

8-BIT REGISTERS

WITH 3-STATE OUTPUTS

SCCS022A – MA Y 1994 – REVISED OCT OBER 2001

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

PARAMETER MEASUREMENT INFORMATION

3 V

0 V

tsu

VOLTAGE WAVEFORMS

SETUP AND HOLD TIMES

Data Input

tPLH

tPHL

tPLH

VOH

VOL

3 V

0 V

Input

Out-of-Phase

Output

In-Phase

Output

Timing Input

VOLTAGE WAVEFORMS

PROPAGATION DELAY TIMES

INVERTING AND NONINVERTING OUTPUTS

Output

Control

Output

W aveform 1

(see Note B)

Output

W aveform 2

(see Note B)

VOL

VOH

tPZL

tPZH

tPLZ

tPHZ

≈3.5 V

0 V

VOL + 0.3 V

≈0 V

3 V

VOLTAGE WAVEFORMS

ENABLE AND DISABLE TIMES

LOW- AND HIGH-LEVEL ENABLING

tPLH/tPHL

tPLZ/tPZL

tPHZ/tPZH

Open

7 V

Open

TEST S1

3 V

0 V

VOLTAGE WAVEFORMS

PULSE DURATION

Input

NOTES: A. CL includes probe and jig capacitance.

B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.

W aveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.

C. The outputs are measured one at a time with one input transition per measurement.

From Output

Under Test

CL = 50 pF

(see Note A)

LOAD CIRCUIT FOR

3-STATE OUTPUTS

S1 7 V

500 ΩGND

From Output

Under Test

CL = 50 pF

(see Note A)

Test

Point

LOAD CIRCUIT FOR

TOTEM-POLE OUTPUTS

Open

VOH – 0.3 V

500 Ω

1.5 V1.5 V

1.5 V 1.5 V

1.5 V

1.5 V1.5 V

1.5 V 1.5 V

1.5 V

Figure 1. Load Circuit and Voltage Waveforms

PACKAGE OPTION ADDENDUM

www.ti.com 25-Sep-2013

Addendum-Page 1

PACKAGING INFORMATION

Orderable Device Status

(1)

Package Type Package

Drawing Pins Package

Qty Eco Plan

(2)

Lead/Ball Finish MSL Peak Temp

(3)

Op Temp (°C) Device Marking

(4/5)

Samples

5962-9221802M2A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 5962-

9221802M2A

CY54FCT

374TLMB

5962-9221802MRA ACTIVE CDIP J 20 1 TBD A42 N / A for Pkg Type -55 to 125 5962-9221802MR

CY54FCT374TDMB

5962-9221804M2A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 5962-

9221804M2A

CY54FCT

374ATLMB

5962-9221804MRA ACTIVE CDIP J 20 1 TBD A42 N / A for Pkg Type -55 to 125 5962-9221804MR

CY54FCT374ATDM

5962-9221806M2A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 5962-

9221806M2A

CY54FCT

374CTLMB

5962-9221806MRA ACTIVE CDIP J 20 1 TBD A42 N / A for Pkg Type -55 to 125 5962-9221806MR

5962-9222203M2A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 5962-

9222203M2A

CY54FCT

574ATLMB

5962-9222203MRA ACTIVE CDIP J 20 1 TBD A42 N / A for Pkg Type -55 to 125 5962-9222203MR

5962-9222205MRA ACTIVE CDIP J 20 1 TBD A42 N / A for Pkg Type -55 to 125 5962-9222205MR

CY54FCT374ATDMB ACTIVE CDIP J 20 1 TBD A42 N / A for Pkg Type -55 to 125 5962-9221804MR

CY54FCT374ATDM

CY54FCT374ATLMB ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type 5962-

9221804M2A

CY54FCT

374ATLMB

PACKAGE OPTION ADDENDUM

www.ti.com 25-Sep-2013

Addendum-Page 2

Orderable Device Status

(1)

Package Type Package

Drawing Pins Package

Qty Eco Plan

(2)

Lead/Ball Finish MSL Peak Temp

(3)

Op Temp (°C) Device Marking

(4/5)

Samples

CY54FCT374CTLMB ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 5962-

9221806M2A

CY54FCT

374CTLMB

CY54FCT374TDMB ACTIVE CDIP J 20 1 TBD A42 N / A for Pkg Type -55 to 125 5962-9221802MR

CY54FCT374TDMB

CY54FCT374TLMB ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 5962-

9221802M2A

CY54FCT

374TLMB

CY54FCT574ATLMB ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 5962-

9222203M2A

CY54FCT

574ATLMB

CY74FCT374ATPC ACTIVE PDIP N 20 20 Pb-Free

(RoHS) CU NIPDAU N / A for Pkg Type -40 to 85 CY74FCT374ATPC

CY74FCT374ATPCE4 ACTIVE PDIP N 20 20 Pb-Free

(RoHS) CU NIPDAU N / A for Pkg Type -40 to 85 CY74FCT374ATPC

CY74FCT374ATQCT ACTIVE SSOP DBQ 20 2500 Green (RoHS

& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 FCT374A

CY74FCT374ATQCTE4 ACTIVE SSOP DBQ 20 2500 Green (RoHS

& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 FCT374A

CY74FCT374ATQCTG4 ACTIVE SSOP DBQ 20 2500 Green (RoHS

& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 FCT374A

CY74FCT374ATSOC ACTIVE SOIC DW 20 25 Green (RoHS

& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 FCT374A

CY74FCT374ATSOCE4 ACTIVE SOIC DW 20 25 Green (RoHS

& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 FCT374A

CY74FCT374ATSOCG4 ACTIVE SOIC DW 20 25 Green (RoHS

& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 FCT374A

CY74FCT374ATSOCT ACTIVE SOIC DW 20 2000 Green (RoHS

& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 FCT374A

CY74FCT374ATSOCTE4 ACTIVE SOIC DW 20 2000 Green (RoHS

& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 FCT374A

CY74FCT374ATSOCTG4 ACTIVE SOIC DW 20 2000 Green (RoHS

& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 FCT374A

PACKAGE OPTION ADDENDUM

www.ti.com 25-Sep-2013

Addendum-Page 3

Orderable Device Status

(1)

Package Type Package

Drawing Pins Package

Qty Eco Plan

(2)

Lead/Ball Finish MSL Peak Temp

(3)

Op Temp (°C) Device Marking

(4/5)

Samples

CY74FCT374CTQCT ACTIVE SSOP DBQ 20 2500 Green (RoHS

& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 FCT374C

CY74FCT374CTQCTE4 ACTIVE SSOP DBQ 20 2500 Green (RoHS

& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 FCT374C

CY74FCT374CTQCTG4 ACTIVE SSOP DBQ 20 2500 Green (RoHS

& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 FCT374C

CY74FCT374CTSOC ACTIVE SOIC DW 20 25 Green (RoHS

& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 FCT374C

CY74FCT374CTSOCE4 ACTIVE SOIC DW 20 25 Green (RoHS

& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 FCT374C

CY74FCT374CTSOCG4 ACTIVE SOIC DW 20 25 Green (RoHS

& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 FCT374C

CY74FCT374TQCT ACTIVE SSOP DBQ 20 2500 Green (RoHS

& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 FCT374

CY74FCT374TQCTE4 ACTIVE SSOP DBQ 20 2500 Green (RoHS

& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 FCT374

CY74FCT374TQCTG4 ACTIVE SSOP DBQ 20 2500 Green (RoHS

& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 FCT374

CY74FCT374TSOC ACTIVE SOIC DW 20 25 Green (RoHS

& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 FCT374

CY74FCT374TSOCE4 ACTIVE SOIC DW 20 25 Green (RoHS

& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 FCT374

CY74FCT374TSOCG4 ACTIVE SOIC DW 20 25 Green (RoHS

& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 FCT374

CY74FCT374TSOCT ACTIVE SOIC DW 20 2000 Green (RoHS

& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 FCT374

CY74FCT374TSOCTE4 ACTIVE SOIC DW 20 2000 Green (RoHS

& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 FCT374

CY74FCT374TSOCTG4 ACTIVE SOIC DW 20 2000 Green (RoHS

& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 FCT374

CY74FCT574ATQCT ACTIVE SSOP DBQ 20 2500 Green (RoHS

& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 FCT574A

CY74FCT574ATQCTE4 ACTIVE SSOP DBQ 20 2500 Green (RoHS

& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 FCT574A

CY74FCT574ATQCTG4 ACTIVE SSOP DBQ 20 2500 Green (RoHS

& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 FCT574A

PACKAGE OPTION ADDENDUM

www.ti.com 25-Sep-2013

Addendum-Page 4

Orderable Device Status

(1)

Package Type Package

Drawing Pins Package

Qty Eco Plan

(2)

Lead/Ball Finish MSL Peak Temp

(3)

Op Temp (°C) Device Marking

(4/5)

Samples

CY74FCT574ATSOC ACTIVE SOIC DW 20 25 Green (RoHS

& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 FCT574A

CY74FCT574ATSOCE4 ACTIVE SOIC DW 20 25 Green (RoHS

& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 FCT574A

CY74FCT574ATSOCG4 ACTIVE SOIC DW 20 25 Green (RoHS

& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 FCT574A

CY74FCT574ATSOCT ACTIVE SOIC DW 20 2000 Green (RoHS

& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 FCT574A

CY74FCT574ATSOCTE4 ACTIVE SOIC DW 20 2000 Green (RoHS

& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 FCT574A

CY74FCT574ATSOCTG4 ACTIVE SOIC DW 20 2000 Green (RoHS

& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 FCT574A

CY74FCT574CTQCT ACTIVE SSOP DBQ 20 2500 Green (RoHS

& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 FCT574C

CY74FCT574CTQCTE4 ACTIVE SSOP DBQ 20 2500 Green (RoHS

& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 FCT574C

CY74FCT574CTQCTG4 ACTIVE SSOP DBQ 20 2500 Green (RoHS

& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 FCT574C

CY74FCT574CTSOC ACTIVE SOIC DW 20 25 Green (RoHS

& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 FCT574C

CY74FCT574CTSOCE4 ACTIVE SOIC DW 20 25 Green (RoHS

& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 FCT574C

CY74FCT574CTSOCG4 ACTIVE SOIC DW 20 25 Green (RoHS

& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 FCT574C

CY74FCT574CTSOCT ACTIVE SOIC DW 20 2000 Green (RoHS

& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 FCT574C

CY74FCT574CTSOCTE4 ACTIVE SOIC DW 20 2000 Green (RoHS

& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 FCT574C

CY74FCT574CTSOCTG4 ACTIVE SOIC DW 20 2000 Green (RoHS

& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 FCT574C

CY74FCT574TQCT ACTIVE SSOP DBQ 20 2500 Green (RoHS

& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 FCT574

CY74FCT574TQCTE4 ACTIVE SSOP DBQ 20 2500 Green (RoHS

& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 FCT574

CY74FCT574TQCTG4 ACTIVE SSOP DBQ 20 2500 Green (RoHS

& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 FCT574

PACKAGE OPTION ADDENDUM

www.ti.com 25-Sep-2013

Addendum-Page 5

Orderable Device Status

(1)

Package Type Package

Drawing Pins Package

Qty Eco Plan

(2)

Lead/Ball Finish MSL Peak Temp

(3)

Op Temp (°C) Device Marking

(4/5)

Samples

CY74FCT574TSOC ACTIVE SOIC DW 20 25 Green (RoHS

& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 FCT574

CY74FCT574TSOCE4 ACTIVE SOIC DW 20 25 Green (RoHS

& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 FCT574

CY74FCT574TSOCG4 ACTIVE SOIC DW 20 25 Green (RoHS

& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 FCT574

(1) The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs.

LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.

NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.

PREVIEW: Device has been announced but is not in production. Samples may or may not be available.

OBSOLETE: TI has discontinued the production of the device.

(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability

information and additional product content details.

TBD: The Pb-Free/Green conversion plan has not been defined.

Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that

lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.

Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between

the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.

Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight

in homogeneous material)

(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.

(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation

of the previous line and the two combined represent the entire Device Marking for that device.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information

provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and

continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.

TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

TAPE AND REEL INFORMATION

*All dimensions are nominal

Device Package

Type Package

Drawing Pins SPQ Reel

Diameter

(mm)

Reel

Width

W1 (mm)

(mm) B0

(mm) K0

(mm) P1

(mm) W

(mm) Pin1

Quadrant

CY74FCT374ATQCT SSOP DBQ 20 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1

CY74FCT374ATSOCT SOIC DW 20 2000 330.0 24.4 10.8 13.0 2.7 12.0 24.0 Q1

CY74FCT374CTQCT SSOP DBQ 20 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1

CY74FCT374TQCT SSOP DBQ 20 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1

CY74FCT374TSOCT SOIC DW 20 2000 330.0 24.4 10.8 13.0 2.7 12.0 24.0 Q1

CY74FCT574ATQCT SSOP DBQ 20 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1

CY74FCT574ATSOCT SOIC DW 20 2000 330.0 24.4 10.8 13.0 2.7 12.0 24.0 Q1

CY74FCT574CTQCT SSOP DBQ 20 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1

CY74FCT574CTSOCT SOIC DW 20 2000 330.0 24.4 10.8 13.0 2.7 12.0 24.0 Q1

CY74FCT574TQCT SSOP DBQ 20 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1

PACKAGE MATERIALS INFORMATION

www.ti.com 16-Aug-2012

Pack Materials-Page 1

*All dimensions are nominal

Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)

CY74FCT374ATQCT SSOP DBQ 20 2500 367.0 367.0 38.0

CY74FCT374ATSOCT SOIC DW 20 2000 367.0 367.0 45.0

CY74FCT374CTQCT SSOP DBQ 20 2500 367.0 367.0 38.0

CY74FCT374TQCT SSOP DBQ 20 2500 367.0 367.0 38.0

CY74FCT374TSOCT SOIC DW 20 2000 367.0 367.0 45.0

CY74FCT574ATQCT SSOP DBQ 20 2500 367.0 367.0 38.0

CY74FCT574ATSOCT SOIC DW 20 2000 367.0 367.0 45.0

CY74FCT574CTQCT SSOP DBQ 20 2500 367.0 367.0 38.0

CY74FCT574CTSOCT SOIC DW 20 2000 367.0 367.0 45.0

CY74FCT574TQCT SSOP DBQ 20 2500 367.0 367.0 38.0

PACKAGE MATERIALS INFORMATION

www.ti.com 16-Aug-2012

Pack Materials-Page 2

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