SN54ABTH245, SN74ABTH245
OCTAL BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCBS663D – APRIL 1996 – REVISED SEPTEMBER 1999
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
D
State-of-the-Art
EPIC-
ΙΙ
B
BiCMOS Design
Significantly Reduces Power Dissipation
D
Latch-Up Performance Exceeds 500 mA Per
JESD 17
D
Typical VOLP (Output Ground Bounce) < 1 V
at VCC = 5 V, TA = 25°C
D
Ioff and Power-Up 3-State Support Hot
Insertion
D
High-Drive Outputs (–32-mA IOH, 64-mA IOL)
D
Bus Hold on Data Inputs Eliminates the
Need for External Pullup/Pulldown
Resistors
D
Package Options Include Plastic
Small-Outline (DW), Shrink Small-Outline
(DB), Thin Shrink Small-Outline (PW), and
Thin Very Small-Outline (DGV) Packages,
Ceramic Chip Carriers (FK), Plastic (N) and
Ceramic (J) DIPs, and Ceramic Flat (W)
Package
description
These octal bus transceivers are designed for
asynchronous communication between data
buses. The devices transmit data from the A bus
to the B bus or from the B bus to the A bus,
depending on the logic level at the
direction-control (DIR) input. The output-enable
(OE) input can be used to disable the device so
the buses are effectively isolated.
When VCC is between 0 and 2.1 V, the device is in the high-impedance state during power up or power down.
However , to ensure the high-impedance state above 2.1 V, OE should be tied to VCC through a pullup resistor;
the minimum value of the resistor is determined by the current-sinking capability of the driver.
This device is fully specified for hot-insertion applications using Ioff and power-up 3-state. The Ioff circuitry
disables the outputs, preventing damaging current backflow through the device when it is powered down. The
power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down,
which prevents driver conflict.
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.
The SN54ABTH245 is characterized for operation over the full military temperature range of –55°C to 125°C.
The SN74ABTH245 is characterized for operation from –40°C to 85°C.
Copyright 1999, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC-ΙΙB is a trademark of Texas Instruments Incorporated.
SN54ABTH245 ...J OR W PACKAGE
SN74ABTH245 . . . DB, DGV, DW, N, OR PW PACKAGE
(TOP VIEW)
SN54ABTH245 . . . FK PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
DIR
A1
A2
A3
A4
A5
A6
A7
A8
GND
VCC
OE
B1
B2
B3
B4
B5
B6
B7
B8
3212019
910 11 12 13
4
5
6
7
8
18
17
16
15
14
B1
B2
B3
B4
B5
A3
A4
A5
A6
A7
A2
A1
DIR
B7
B6 OE
A8
GND
B8 VCC
SN54ABTH245, SN74ABTH245
OCTAL BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCBS663D – APRIL 1996 – REVISED SEPTEMBER 1999
2POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
FUNCTION TABLE
INPUTS
OPERATION
OE DIR
OPERATION
L L B data to A bus
LH A data to B bus
H X Isolation
logic symbol†
†This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
B2
17
B3
16
B4
15
A5 6
A6 7
A7 8
A8 9
A2 3
A3 4
A4 5
OE
A1 2
G3
19
3 EN2 [AB]
B5
14
B6
13
B7
12
B8
11
B1
18
3 EN1 [BA]
1
DIR
1
2
logic diagram (positive logic)
DIR
OE
A1
B1
To Seven Other Channels
1
2
19
18
SN54ABTH245, SN74ABTH245
OCTAL BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCBS663D – APRIL 1996 – REVISED SEPTEMBER 1999
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage range, VCC –0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range, VI (except I/O ports) (see Note 1) –0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Voltage range applied to any output in the high or power-off state, VO –0.5 V to 5.5 V. . . . . . . . . . . . . . . . . . .
Current into any output in the low state, IO: SN54ABTH245 96 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SN74ABTH245 128 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input clamp current, IIK (VI < 0) –18 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output clamp current, IOK (VO < 0) –50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Package thermal impedance, θJA (see Note 2): DB package 70°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DGV package 92°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DW package 58°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
N package 69°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PW package 83°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, Tstg –65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
†Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only , and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may af fect device reliability.
NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51.
recommended operating conditions (see Note 3)
SN54ABTH245 SN74ABTH245
UNIT
MIN MAX MIN MAX
UNIT
VCC Supply voltage 4.5 5.5 4.5 5.5 V
VIH High-level input voltage 2 2 V
VIL Low-level input voltage 0.8 0.8 V
VIInput voltage 0 VCC 0 VCC V
IOH High-level output current –24 –32 mA
IOL Low-level output current 48 64 mA
∆t/∆vInput transition rise or fall rate 5 5 ns/V
∆t/∆VCC Power-up ramp rate 200 µs/V
TAOperating free-air temperature –55 125 –40 85 °C
NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs
, literature number SCBA004.
SN54ABTH245, SN74ABTH245
OCTAL BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCBS663D – APRIL 1996 – REVISED SEPTEMBER 1999
4POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
TA = 25°C SN54ABTH245 SN74ABTH245
UNIT
PARAMETER
TEST
CONDITIONS
MIN TYP†MAX MIN MAX MIN MAX
UNIT
VIK VCC = 4.5 V, II = –18 mA –1.2 –1.2 –1.2 V
VCC = 4.5 V, IOH = –3 mA 2.5 2.5 2.5
VOH
VCC = 5 V, IOH = –3 mA 3 3 3
V
V
OH
VCC =45V
IOH = –24 mA 2 2
V
V
CC =
4
.
5
V
IOH = –32 mA 2* 2
VOL
VCC =45V
IOL = 48 mA 0.55 0.55
V
V
OL
V
CC =
4
.
5
V
IOL = 64 mA 0.55* 0.55
V
Vhys 100 mV
I
I
Control
inputs VCC = 0 to 5.5 V, VI = VCC or GND ±1±1±1
µ
A
I
A or B ports VCC = 2.1 V to 5.5 V, VI = VCC or GND ±20 ±100 ±20
µ
II(h ld)
VCC =45V
VI = 0.8 V 100 100 100
µA
I
I(hold)
V
CC =
4
.
5
V
VI = 2 V –100 –100 –100 µ
A
IOZPU VCC = 0 to 2.1 V,
VO = 0.5 V to 2.7 V, OE = X ±50** ±50** ±50 µA
IOZPD VCC = 2.1 V to 0,
VO = 0.5 V to 2.7 V, OE = X ±50** ±50** ±50 µA
Ioff VCC = 0, VI or VO ≤ 4.5 V ±100 ±100 µA
ICEX VCC = 5.5 V,
VO = 5.5 V Outputs high 50 50 50 µA
IO‡VCC = 5.5 V, VO = 2.5 V –50 –140 –180 –50 –180 –50 –180 mA
VCC
=
5.5 V,
Outputs high 5 250 250 250 µA
ICC A or B ports
VCC
=
5
.
5
V
,
IO = 0, Outputs low 22 30 30 30 mA
VI = VCC or GND Outputs disabled 1 250 250 250 µA
§
Data inp ts
VCC = 5.5 V,
One input at 3.4 V, Outputs enabled 1.5 1.5 1.5 mA
∆ICC
§
D
ata
i
nputs
,
Other inputs at
VCC or GND Outputs disabled 1.5 1.5 1.5 mA
Control
inputs VCC = 5.5 V, One input at 3.4 V,
Other inputs at VCC or GND 1.5 1.5 1.5 mA
CiControl
inputs VI = 2.5 V or 0.5 V 4 pF
Cio A or B ports VO = 2.5 V or 0.5 V 8 pF
* On products compliant to MIL-PRF-38535, this parameter does not apply.
** On products compliant to MIL-PRF-38535, this parameter is not production tested.
†All typical values are at VCC = 5 V.
‡Not more than one output should be tested at a time, and the duration of the test should not exceed one second.
§This is the increase in supply current for each input that is at the specified TTL voltage level rather than VCC or GND.
SN54ABTH245, SN74ABTH245
OCTAL BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCBS663D – APRIL 1996 – REVISED SEPTEMBER 1999
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
switching characteristics over recommended ranges of supply voltage and operating free-air
temperature, CL = 50 pF (unless otherwise noted) (see Figure 1)
PARAMETER FROM
(INPUT)
TO
(OUTPUT)
VCC = 5 V,
TA = 25°CSN54ABTH245 SN74ABTH245 UNIT
(INPUT)
(OUTPUT)
MIN TYP MAX MIN MAX MIN MAX
tPLH
AorB
BorA
1 2 3.2 0.8 3.8 1 3.6
ns
tPHL
A
or
B
B
or
A
1 2.6 3.5 0.8 4.2 1 3.9
ns
tPZH
OE
AorB
2 3.5 4.5 1.2 6.2 2 5.6
ns
tPZL
OE
A
or
B
1.9 4 5.3 1.3 7 1.9 6.2
ns
tPHZ
OE
AorB
2.2 4.4 5.4 2.2 6.1 2.2 5.9
ns
tPLZ
OE
A
or
B
1.5 3 4 1 4.9 1.5 4.5
ns
tsk(o) 0.5 0.5 ns
SN54ABTH245, SN74ABTH245
OCTAL BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCBS663D – APRIL 1996 – REVISED SEPTEMBER 1999
6POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
1.5 V
th
tsu
From Output
Under Test
CL = 50 pF
(see Note A)
LOAD CIRCUIT
S1
7 V
Open
GND
500 Ω
500 Ω
Data Input
Timing Input 1.5 V 3 V
0 V
1.5 V 1.5 V 3 V
0 V
3 V
0 V
1.5 V
tw
Input
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
VOLTAGE WAVEFORMS
PULSE DURATION
tPLH
tPHL
tPHL
tPLH
VOH
VOH
VOL
VOL
1.5 V 1.5 V 3 V
0 V
1.5 V1.5 V
Input
1.5 V
Output
Control
Output
W aveform 1
S1 at 7 V
(see Note B)
Output
W aveform 2
S1 at Open
(see Note B)
VOL
VOH
tPZL
tPZH
tPLZ
tPHZ
1.5 V1.5 V
3.5 V
0 V
1.5 V VOL + 0.3 V
1.5 V VOH – 0.3 V
≈ 0 V
3 V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
Output
Output
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
Open
7 V
Open
TEST S1
NOTES: A. CL includes probe and jig capacitance.
B. W aveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
W aveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2 . 5 n s, t f≤ 2.5 ns.
D. The outputs are measured one at a time with one transition per measurement.
1.5 V
Figure 1. Load Circuit and Voltage Waveforms
PACKAGE OPTION ADDENDUM
www.ti.com 25-Sep-2013
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead/Ball Finish MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
5962-9762301Q2A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 5962-
9762301Q2A
SNJ54ABTH
245FK
5962-9762301QRA ACTIVE CDIP J 20 1 TBD A42 N / A for Pkg Type -55 to 125 5962-9762301QR
A
SNJ54ABTH245J
5962-9762301QSA ACTIVE CFP W 20 1 TBD Call TI N / A for Pkg Type -55 to 125 5962-9762301QS
A
SNJ54ABTH245W
SN74ABTH245DBLE OBSOLETE SSOP DB 20 TBD Call TI Call TI -40 to 85
SN74ABTH245DBR ACTIVE SSOP DB 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 ABH245
SN74ABTH245DBRE4 ACTIVE SSOP DB 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 ABH245
SN74ABTH245DBRG4 ACTIVE SSOP DB 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 ABH245
SN74ABTH245DGVR OBSOLETE TVSOP DGV 20 TBD Call TI Call TI -40 to 85 AK245
SN74ABTH245DGVRE4 ACTIVE TVSOP DGV 20 TBD Call TI Call TI -40 to 85
SN74ABTH245DGVRG4 OBSOLETE TVSOP DGV 20 TBD Call TI Call TI -40 to 85
SN74ABTH245DW ACTIVE SOIC DW 20 25 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 ABTH245
SN74ABTH245DWE4 ACTIVE SOIC DW 20 25 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 ABTH245
SN74ABTH245DWG4 ACTIVE SOIC DW 20 25 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 ABTH245
SN74ABTH245DWR ACTIVE SOIC DW 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 ABTH245
SN74ABTH245DWRE4 ACTIVE SOIC DW 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 ABTH245
SN74ABTH245DWRG4 ACTIVE SOIC DW 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 ABTH245
SN74ABTH245N ACTIVE PDIP N 20 20 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type -40 to 85 SN74ABTH245N
PACKAGE OPTION ADDENDUM
www.ti.com 25-Sep-2013
Addendum-Page 2
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead/Ball Finish MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
SN74ABTH245NE4 ACTIVE PDIP N 20 20 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type -40 to 85 SN74ABTH245N
SN74ABTH245PWLE OBSOLETE TSSOP PW 20 TBD Call TI Call TI -40 to 85
SN74ABTH245PWR ACTIVE TSSOP PW 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 ABH245
SN74ABTH245PWRE4 ACTIVE TSSOP PW 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 ABH245
SN74ABTH245PWRG4 ACTIVE TSSOP PW 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 ABH245
SNJ54ABTH245FK ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 5962-
9762301Q2A
SNJ54ABTH
245FK
SNJ54ABTH245J ACTIVE CDIP J 20 1 TBD A42 N / A for Pkg Type -55 to 125 5962-9762301QR
A
SNJ54ABTH245J
SNJ54ABTH245W ACTIVE CFP W 20 1 TBD Call TI N / A for Pkg Type -55 to 125 5962-9762301QS
A
SNJ54ABTH245W
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
PACKAGE OPTION ADDENDUM
www.ti.com 25-Sep-2013
Addendum-Page 3
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF SN54ABTH245, SN74ABTH245 :
•Catalog: SN74ABTH245
•Military: SN54ABTH245
NOTE: Qualified Version Definitions:
•Catalog - TI's standard catalog product
•Military - QML certified for Military and Defense Applications
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
SN74ABTH245DBR SSOP DB 20 2000 330.0 16.4 8.2 7.5 2.5 12.0 16.0 Q1
SN74ABTH245DWR SOIC DW 20 2000 330.0 24.4 10.8 13.0 2.7 12.0 24.0 Q1
SN74ABTH245PWR TSSOP PW 20 2000 330.0 16.4 6.95 7.1 1.6 8.0 16.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 17-Aug-2012
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
SN74ABTH245DBR SSOP DB 20 2000 367.0 367.0 38.0
SN74ABTH245DWR SOIC DW 20 2000 367.0 367.0 45.0
SN74ABTH245PWR TSSOP PW 20 2000 367.0 367.0 38.0
PACKAGE MATERIALS INFORMATION
www.ti.com 17-Aug-2012
Pack Materials-Page 2
MECHANICAL DATA
MPDS006C – FEBRUAR Y 1996 – REVISED AUGUST 2000
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
DGV (R-PDSO-G**) PLASTIC SMALL-OUTLINE
24 PINS SHOWN
14
3,70
3,50 4,90
5,10
20
DIM
PINS **
4073251/E 08/00
1,20 MAX
Seating Plane
0,05
0,15
0,25
0,50
0,75
0,23
0,13
112
24 13
4,30
4,50
0,16 NOM
Gage Plane
A
7,90
7,70
382416
4,90
5,103,70
3,50
A MAX
A MIN
6,60
6,20
11,20
11,40
56
9,60
9,80
48
0,08
M
0,07
0,40
0°–8°
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion, not to exceed 0,15 per side.
D. Falls within JEDEC: 24/48 Pins – MO-153
14/16/20/56 Pins – MO-194
MECHANICAL DATA
MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
DB (R-PDSO-G**) PLASTIC SMALL-OUTLINE
4040065 /E 12/01
28 PINS SHOWN
Gage Plane
8,20
7,40
0,55
0,95
0,25
38
12,90
12,30
28
10,50
24
8,50
Seating Plane
9,907,90
30
10,50
9,90
0,38
5,60
5,00
15
0,22
14
A
28
1
2016
6,50
6,50
14
0,05 MIN
5,905,90
DIM
A MAX
A MIN
PINS **
2,00 MAX
6,90
7,50
0,65 M
0,15
0°–ā8°
0,10
0,09
0,25
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-150
IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other
changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest
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