Error Amplifier
An Error Amplifier with access to the inverting input and
output is provided. The amplifier is atransconductance type,
—meaning that it has high output impedance with controlled
voltage-to-current gain. The amplifier features atypical gm
—of 100 pmhos (Figure 5). The noninvefling input is internally
biased at 2.5 V+2.070 and is not pinned out. The output
voltage of the power factor convetier is typically divided down
and monitored by the invetiing input. The maximum input
bias current is –0.5 wA, which can cause an output voltage
error that is equal to the product of the input bias current
and the value of the upper divider resistor R2. The Error Amp
output is internally connected to the Multiplier and is pinned
out (Pin 2) for external loop compensation. Typically, the
bandwidth is set below 20 Hz, so that the amplifier’s output
voltage is relatively constant over agiven AC line cycle. In
effect, the error amp monitors the average output voltage
of the converter over several line cycles. The Error Amp
output stage was designed to have arelatively constant
transconductance over temperature. This allows the
designer to define the compensated bandwidth over the
intended operating temperature range. The output stage can
sink and source 10 WAof current and is capable of swinging
from 1.7 Vto 6.4 V, assuring that the Multiplier can be driven
over its entire dynamic range.
Akey feature to using atransconductance type amplifier,
is that the input is allowed to move independently with
respect to the output, since the compensation capacitor is
connected to ground. This allows dual usage of of the Voltage
monitored with respect to the Voltage Feedback Input
threshold. The Multiplier is designed to have an extremely
linear transfer curve over awide dynamic range, OVto 3.2 V
for Pin 3, and 2.0 Vto 3.75 Vfor Pin 2, Figure 1. The Multiplier
output controls the Current Sense Comparator threshold as
the AC voltage traverses sinusoidally from zero to peak line,
Figure 18. This has the effect of forcing the MOSFET on-time
to track the input line voltage, resulting in afixed Drive Output
on-time, thus making the preconvetier load appear,?,~o be
resistive to the AC line. An approximation of thaj:@&qnt
Sense Comparator threshold can be calculat~,$~~m the
following equation. This equation is accurate .Wj%@er the
given test condition stated in the elect:c~:~$,
,.
Asignificant reduction in line “~r@t” distortion can be
attained by forcing the preco~~r t~ switch as the AC line
voltage crosses through g$~Yhe forced switching is
achieved by adding a,@~trb%d amount of offset to the
Multiplier and Curren%+~.N#e Comparator circuits, The
.... .>:* ~$“
equation shown belW’a&ounts for the built-in offsets and
is accurate to ,Wn t~h percent. Let Vth(M) =1.991 V
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Z@Cur&nt Detector
~F$~~& MC34262 operates as acritical conduction current
%wo:~e controller, whereby output switch conduction is
Feedback Input pin by the Error Amplifier and by the
Overvoltage Comparator. ‘:q$~~”~ated by the Zero Current Detector and terminated when
~li:3)y\;!.,,\alN>
Overvoltage Comparator “::% \he peak inductor current reaches the threshold level
—,,%
,., established by the Multiplier output. The Zero Current
An overvoltage Comparator is incorporated to e~~~inate
the possibility of runaway output voltage. This con~[;o~~an
—occur during initial startup, sudden load remoy~:~!@uring
output arcing and is the result of the low ban@~@h~~at must
be used in the Error Amplifier control loop:{~~&t@emoltage
Comparator monitors the peak ou~~~~~dltage of the
converter, and when exceeded, iqwmtely terminates
MOSFET switching. The compa~~r~~shold is internally
set to 1.08 Vref. In order to,lQN~&:,# false triPPin9 during
normal operation, the value ~~ t~ “output filter capacitor C3
must be large enough tqW~p#e peak-to-peak ripple less
than 16% of the aver~~q~:~C output. The Overvoltage
Comparator input t~~$jve ~utput turn-off propagation delay
is typically 400 ns$$W:@arison of startup overshoot without
and with the ~Xohage Comparator circuit is shown in
Figure 23. $i:$~~~‘
~u,tip~*S~*J‘:*...
Aslpgl$’~uadrant, two input multiplier is the critical
el@-$~~lRat enables this device to control power factor. The
.,#&~~~tiave rectified haversines are monitored at Pin 3with
“~xt to ground while the Error Amp output at pin 2is
..:$
—
—
Detector initiates the next” on-time by setting the RS Latch
at the instant the inductor current reaches zero. This critical
conduction mode of operation has two significant benefits,
First, since the MOSFET cannot turn-on until the inductor
current reaches zero, the output rectifier reverse recovery
time becomes less critical, allowing the use of an inexpensive
rectifier. Second, since there are no deadtime gaps between
cycles, the AC line current is continuous, thus limiting the
peak switch to twice the average input current.
The Zero Current Detector indirectly senses the inductor
current by monitoring when the auxiliary winding voltage
falls below 1.4 V. To prevent false tripping, 200 mV of
hysteresis is provided. Hgure 9shows that the thresholds
are well-defined over temperature. The Zero Current
Detector input is internally protected by two clamps. The
upper 6.7 Vclamp prevents input overvoltage breakdown
while the lower 0.7 Vclamp prevents substrate injection.
Current limit protection of the lower clamp transistor is
provided in the event that the input pin is accidentally
shorted to ground. The Zero Current Detector input to Drive
Output turn-on propagation delay is typically 320 ns.
MC34262 ●MC33262 MOTOROLA
7