Philips Semiconductors Product data
74ABT16821A
74ABTH16821A
20-bit bus-interface D-type flip-flop;
positive-edge trigger (3-State)
2
2002 Dec 13
FEATURES
•20-bit positive-edge triggered register
•Multiple VCC and GND pins minimize switching noise
•Live insertion/extraction permitted
•Power-up reset
•Power-up 3-State
•74ABTH16821A incorporates bus-hold data inputs which
eliminate the need for external pull-up resistors to hold unused
inputs
•Output capability: +64 mA / –32 mA
•Latch-up protection exceeds 500mA per JEDEC Std 17
•ESD protection exceeds 2000V per MIL STD 883 Method 3015
and 200V per Machine Model
DESCRIPTION
The 74ABT16821A high-performance BiCMOS device combines
low static and dynamic power dissipation with high speed and high
output drive.
The 74ABT16821A has two 10-bit, edge triggered registers, with
each register coupled to a 3-State output buffer. The two sections of
each register are controlled independently by the clock (nCP) and
Output Enable (nOE) control gates.
Each register is fully edge triggered. The state of each D input, one
set-up time before the LOW-to-HIGH clock transition, is transferred
to the corresponding flip-flop’s Q output.
The 3-State output buffers are designed to drive heavily loaded
3-State buses, MOS memories, or MOS microprocessors.
The active-LOW Output Enable (nOE) controls all ten 3-State
buffers independent of the register operation. When nOE is LOW,
the data in the register appears at the outputs. When nOE is HIGH,
the outputs are in high impedance “off” state, which means they will
neither drive nor load the bus.
Two options are available, 74ABT16821A which does not have the
bus-hold feature and 74ABTH16821A which incorporates the
bus-hold feature.
QUICK REFERENCE DATA
SYMBOL PARAMETER CONDITIONS
Tamb = 25 °C; GND = 0 V TYPICAL UNIT
tPLH
tPHL Propagation delay
nCP to nQx CL = 50 pF; VCC = 5 V 2.4
2.0 ns
CIN Input capacitance VI = 0 V or VCC 3 pF
COUT Output capacitance VO = 0 V or VCC; 3-State 7 pF
ICCZ
pp
Outputs disabled; VCC = 5.5 V 500 µA
ICCL
u
u
y
u
Outputs LOW; VCC = 5.5 V 10 mA
ORDERING INFORMATION
PACKAGES TEMPERATURE RANGE PART NUMBER DWG NUMBER
56-Pin Plastic SSOP T ype III –40 °C to +85 °C 74ABT16821ADL SOT371-1
56-Pin Plastic TSSOP Type II –40 °C to +85 °C 74ABT16821ADGG SOT364-1
56-Pin Plastic TSSOP Type II –40 °C to +85 °C 74ABTH16821ADGG SOT364-1
PIN DESCRIPTION
PIN NUMBER SYMBOL FUNCTION
55, 54, 52, 51, 49, 48, 47, 45, 44, 43,
42, 41, 40, 38, 37, 36, 34, 33, 31, 30 1D0 – 1D9
2D0 – 2D9 Data inputs
2, 3, 5, 6, 8, 9, 10, 12, 13, 14,
15, 16, 17, 19, 20, 21, 23, 24, 26, 27 1Q0 – 1Q9
2Q0 – 2Q9 Data outputs
1, 28 1OE, 2OE Output enable inputs (active-LOW)
56, 29 1CP, 2CP Clock pulse inputs (active rising edge)
4, 11, 18, 25, 32, 39, 46, 53 GND Ground (0 V)
7, 22, 35, 50 VCC Positive supply voltage