MAAL/VI CMOS RF/Video Multiplexers General Description Maxims MAX310 and MAX311 are CMOS monolithic analog multiplexer/demultiplexers designed for use with signal frequencies ranging from DC through video. The MAX310 is a 1-of-8 multiplexer while the MAX311 is for 2-of-8 (4 channel differential) applications. A key feature of the MAX310/311 is extremely high off isolation at high frequencies. The isolation of each off channel to the output is guaranteed to be -66dB at 5MHz. The input signal range is +12V to -15V with +15V power supplies while power con- sumption is typically 1.4mW. All control inputs are fully compatible with TTL and CMOS logic. Decoding is in standard BCD format and an Enable input is also provided to simplify Features @ -76dB Typical Oft Isolation at SMHz @ -63dB Typical All Channel Off Isolation at SMHz @ Phase Shift Match Between Channels, <1 at 5MHz @ Break-Before-Make Switching @ Wide Supply Range, +4.5V to +16.5V and Single Supply @ Symmetrical, Bi-directional Operation @ Latch-Up Proof Construction Ordering Information cascading of devices. The MAX310 and MAX311 will PART TEMP. RANGE PACKAGE operate with nearly any power supply combination MAX310C/D OCto + 70C Dice which totals less than 36V (Vt - V-) including single 3 3 ; supply operation at +12V, +15V, and +28V with V- MAX310CPE OCto+70C 16 Lead Plastic DIP connected to GND. MAX310CWN oCto-70C 18 Lead Wide SO li . MAX310EPE 40Cto +85C 16 Lead Plastic DIP Applications MAX310EWN 40Cto+85C 18 Lead Wide SO Video Switching and Crosspoint Systems MAX310EJE _a0Cto +85C 16 Lead CERDIP Automatic Test Equipment MAX310MJE 55Cto +125C 16 Lead CERDIP Medical Ultrasound Phased Array Systems MAX311C/D oCto +70C _ Dice Data Logging of High Frequency Signals MAX311 CPE 0Cto +70C _16 Lead Plastic DIP Digital Signal Processing MAX311CWN OCto-70C 18 Lead Wide SO MAX311 EPE -40Cto+85C 16 Lead Plastic DIP Pin Configuration MAX311EWN 40Cto +85C 18 Lead Wide SO MAX311 EJE 40C to +85C 16 Lead CERDIP Top View MAX311MJE 55C to +125C 16 Lead CERDIP 8,4] ~ 16] Oy tyr vat Cc io Blend 8,0 75) GND Typical Operating Circuit 8, [2] [15] Ay 8S 2] ri7] A yP 9 83 G] maxim 74] Ay 83 B] maxim Fe] A, 3,7 MAX31I0 FS) Ay Sq 4] MAX3I0 5] Ag 8; 2] [72] EN ; Ce] 74] EN 5; V+ 85 CY [13] v+ 8,7 oj} ouT 8,7] [72] OUT Ss [E] rV- SY [1] v- 4 n/c C2] Fig] N/C ie INPUT } [4] CHANNELS ) [Bf NA VS Gy 84 [16] OUT, $1, ie] OUT, ea So CEL is] GND Sy (24 Fiz] GND ey S43] maxim [77] A, Sy] axim ie] A, Sa CZ] 9 MAX317- A] Ag Sy Ca] MAXBIT. FB] Ay Sig EI nZ]EN Sig [34 ria] EN Seg [5] T+ So [6] ria] V+ oss Eo 10] OUT, S_ 7] [iz] QUT, Ty v- - : 8 a we EH = We No Insertion Loss, 8 Channel Mux MAAXLWVI Maxim Integrated Products 1 maxim is a registered trademark of Maxim Integrated Products. LLE/OLEXVWNMAX310/311 CMOS RF/Video Multiplexers ABSOLUTE MAXIMUM RATINGS Voltage referenced to V- yet Digital Inputs 2.0... ccc eee eet ete eee Input Current Sand COMMON OUT ......... cece cece eee eee All pins except S and COM. OUT eee te etter nes +300C -65C to +150C Lead Temperature Storage Temperature ............. Operating Temperature Range +36V MAX310C, MAX311C 20. een eee ee +24V MAX310E, MAX311E ...........2.-0005 V- to vt MAX310M, MAX311M_ ......-....000 eee Power Dissipation (16-Pin packages) +50mA CERDIP (derate 10mW/C above +75C) +30mA Plastic DIP (derate 7.35mW/C above +75C) Small Outline (derate 9mMW/C above +75C) 0C to +70C tenes -40C to +85C vere 55C to +125C Stresses listed under Absolute Maximum Ratings may be appiied (one at a time} to devices without resulting in permanent damage. These are stress ratings only, and functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum ratings conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (Over Temperature. Vt = +15V, V- -15V, GND = OV unless otherwise indicated) PARAMETER SYMBOL CONDITIONS MIN. TYP. MAX. UNITS : Vt Vo = +15V -15 +12 Analog Signal Range vil yo =+5V 5 42 v Vin = +5V, lout = 10mMA Channel ON Resistance Ron Ta = +25C 150 250 a Over Temp. 300 ON Resistance Match ARon Vin = +5V, lout = 10mA 6 % Figure 10, Ta = +25C 0.4 10 OFF Input Leakage Current IS(OFF) Over Temp 3 100 nA Figure 11, Ta = +25C 0.8 10 Peet ont lovorr) MAX310 Over Temp. 20 100 nA 9 MAX311 Over Temp. 10 50 Figure 12, Ta = +25C 1 10 eens ont IDon) MAX310 Over Temp. 30 200 nA 9 MAX311 Over Temp. 15 100 Input Low Threshold VaL Vt/V- = +15V, +5V 0.8 Vv Input High Threshold VaH Vt/V~ = +15V, +5V 2.4 Vv Input Current (Logic) la Va = OV or 5V +10 pA : Figure 7; Ta = +25C 0.6 1.5 Access Time tacc Over Temp. 2.0 HS Figure 8; Ta = +25C 0.3 1.0 Enable Delay ON or OFF tenoworry) | 2 Over Temp. 20 us Break-Before-Make Delay ton- torr Figure 9 30 100 ns OFF Isolation, Single - Th = - Channel to OUT ISOsc Figure 3; Ta = +25C -66 76 dB : Figure 4, 5, Ta = +25C Chen OUT ISOac MUX Disabled, EN = +0.8V -63 dB MUX Enabled, EN = +2.4V -58 Adjacent Channel Crosstalk ISOx Figure 6, Ta = +25C -72 dB Channel Input Capacitance Ta = +25C, Vin = 10MVams 10 MHz OFF State Csiorr) 5 pF ON State SiON) 45 Channel Output Capacitance Ta = +26C; OFF State Covorr) EN = +0.8V, MAX310 38 MAX311 20 pF ON State Cpiorr) EN = +2.4V, MAX310 57 MAX311 40 Charge Injection Q Figure 13, Ta = +25C 110 pc Supply Current: Vt rr _ 75 200 y- \- EN, AO, A1, A2 = OV or +5V 0.4 100 nA Supply Voltage Range Ta = +25C +45 +16.5 Vv SWUAXAL/VICMOS RF/Video Multiplexers | i t Jj yt DECODE LOGIC AND LEVEL TRANSLATORS GND Ap Ay Az EN Detailed Description MAX310 MAX311 $1 I> Sia s 82 _ San _" +t ss _____ {| sa t+ OUT, $+ ly _7 4_+ se ~iot > OUT Sa | J 85 i +4 -F Sip + + : Lt 3 | a | ! aut, * | om IT San 711+ 83 t Sag F + + l )} DECODE LOGIC AND LEVEL TRANSLATORS Ag At EN Figure 1. Functional Block Diagrams The Maxim MAX310 and MAX311 contain 8 video switches combined with an address decoder and level translators (Figure 1). Each of the 8 video switches consists of 3 N-channel FETs configured as shown in Figure 2. This T configuration provides the high frequency OFF isolation required when switching wide-band video, audio, or digital signals. N-channel FETs are used in the MAX310/311s T switches because of their low capacitance and con- sequently superior isolation characteristics. A side effect is that the N-channel ON resistance varies somewhat with the voltage difference between the analog input signal and V*. This effect is shown in the Typical Operating Characteristics section. Losic 4f>o FE Figure 2. N-channel T Switch Channel selection is performed by applying a binary input to the address inputs Ao, A; and Ag (Ag and Ay only for MAX311). The address decoder selects chan- nels as shown in the truth tables (Table 1). All digital inputs are compatible with TTL and CMOS logic levels. Break-before-make switch timing is guaranteed for both multiplexers. This prevents momentary short- ing of inputs when changing multiplexer channels. SMAXAILSVI The MAX310 and MAX311 are also fully bilateral and so can be used backwards, as demultiplexers, with no loss in performance. Specifically, one input signal can be routed to one of several outputs. TABLE 1. CHANNEL SELECTION INPUT CODES MAX310 MAX311 A, A; Ao EN ONChannel | A; A, EN ON Channel 000 4 1 oo 1 1A+1B 0 01 1 2 o 114 2A +2B o 1 0 1 3 1 0 1 3A +3B o 114 1 4 1 9141 4A+ 4B 1 0 0 1 5 Xx X 0 ALLOFF 104 41 6 1 $1 0 1 7 1 41 41 1 8 X xX X 0 ALLOFF Application Hints Maximizing Isolation With all high frequency circuits, careful printed cir- cuit board layout is essential for optimum perform- ance. To maintain the high frequency isolation of the MAX310/311, signal paths should be of minimum length and ground plane should be used where pos- sible, including between adjacent input pins. A ground or power supply trace between adjacent inputs will markedly improve isolation between channels. Both Vt and V- should be bypassed to ground with 0.1uF ceramic capacitors. The leads of the capaci- tors should be kept as short as possible to minimize LE/OLEXVWMAX310/311 CMOS RF/Video Multiplexers series inductance. The bypass capacitors should also be located as physically close to the multiplexer as possible. Input Capacitance The capacitance of an input channel changes from about 5pF in the OFF state to around 45pF when ON. To minimize bandwidth reduction due to input capacitance, the inputs should be driven from a low impedance source. A 759 source impedance results in a 3dB frequency response of 47MHz when loaded with 45pF. Charge Injection With +15V supplies, injected charge from the inter- nal switch drive circuitry to the analog signal path is typically 110 picocoulombs. As shown in the Typical Characteristics graph, charge injection is relatively independent of the analog signal voltage. Insertion Loss With +15V supplies and +2V video signals, the 1209 typical ON resistance of the MAX310/311 results in -8.3dB insertion loss when used with a 750 output load. This insertion loss is virtually constant from DC to over 20MHz. TABLE 2. PHASE SHIFT AT 10MHz INPUT CHANNEL | OUTPUT - INPUT PHASE SHIFT MAX311 R, = 10k Ri = 750 Si -22 -12 Se 21 -11.5 Ss -20 -11,5 Ss -20 -11.2 Ss -20 -11.2 Se -20.5 -11.4 S7 -20.7 -11,5 Ss -20.4 -11.5 Test Conditions: Vt = +15V, V7 = -15V, Vin = 1.25Vamg at 10MHz, OFF inputs terminated with 750. Operation with Power Supplies Other Than +15V Table 3 shows how different power supply voltages affect the MAX310/311s analog signal range and channel ON resistance (Ron). This data is also shown graphically in the Typical Operating Charac- teristics section. Since N-channel FETs are used in the switches, Ron is determined by the voltage differ- ence between V+ and the input voltage. For lowest Ron, use a negative power supply (V-) equal to the most negative input voltage, and a positive power supply (V+) 30V above the negative supply. For example, if only positive signals need to be switched, use OV for V- and +30V for Vt to achieve minimum Ron. This also reduces ON resistance variation with analog signal level and input voltage dependent changes in insertion loss, which minimizes differen- tial gain errors. The digital input thresholds are nearly independent of V+, remaining near +1.4V over the entire operating supply voltage range of +4.5V to +18V (9V to 36V single supply). The MAX310/311 switching delay times vary some- what with power supply voltage. Access time (see Figure 2) increases from typically 600ns with +15V supplies to 3us with +5V supplies. Other switching times are also proportionately longer with +5V power supplies. Propagation Delay and Phase Shift In Table 2, the typical phase shift for each channel is shown. Note that both the phase shift and the phase shift difference between channels are reduced with a 750, output load. At 10MHz, the channel-to-channel match is better than 1 with a 750 load and improves as the frequency is reduced. Phase shift measurements for the MAX311 are sim- ilar to those in Table 2. The data for the MAX310 channels 1 to 4 corresponds to MAX311 channels 1A to 4A, Channels 5 to 8 correspond to MAX311 chan- nels 1B to 4B. TABLE 3. SIGNAL RANGE AND Ron vs SUPPLY VOLTAGE SUPPLY VOLTAGE TYPICAL Ron AT Vin SIGNAL RANGE Vv ve NEGATIVE POSITIVE -15 +15V -15V to +12V 1040 at -10V 2652 at +10V -5V to +5V 1152 at -5V 1502 at +5V GND +15V OV to +12V 12020 at OV 1502 at +5V GND +30V OV to +27V 902 at OV 1000 at +5V -5V +5V -5V to +2V 2400 at -2V 4800 at +2V -10V +10V -10V to +7V 1400 at -5V 2200 at +5V -5V +15V -5V to +12V 1150 at -5V 1502 at +5V MAAIL/VICMOS RF/Video Multiplexers OFF Isolation Measurements Figure 3 is used to test and specify the MAX310/311s single channel OFF isolation. In the case illustrated, channel Sj has signal applied while all other inputs are grounded through 750 except for the ON chan- nel (So in Figure 3). This is shorted directly to ground to prevent pickup from external wiring. Each channel meets this test to an isolation limit of -66dB at 5MHz. mn) $1 GN0 -_ = coq s&s Az |}$< = INPUT CODE pa 853 Al [- > WHICH TURNS S2 ON* LAA ] 5, WIAKIZVL ay pp MAX310 AVA S5 EN Fo #24 AW 86 vw Fe +15V cto 87 OUT =i Oak = bLoiwa v 1V Your ~ 75a ALL 750 SE Wet * Circuit shown for S, isolation with Sz ON. The ON channel is shorted to GND. Other channels are measured in a similar fashion. Figure 3. Singie Channel OFF Isolation ({SOgc) Test Circuit Figure 4 shows the test circuit for OFF isolation with all channels driven. The impedance of the source connected to the selected channel (in this case, Sa) significantly affects feedthrough. With a 750, source impedance the typical measured OFF isolation is -58dB at 5MHz. This increases to -63dB if the source impedance is reduced to 100 or less. OFF isolation also increases with decreasing frequency. For exam- ple, when the frequency is reduced from 10MHz to 1MHz the isolation improvement is typically -20dB. Figure 5 shows a similar circuit for testing all-channel isolation with the multiplexer disabled (EN low). $1 ND -_ Sz Ae > 3.2Vams ) SMH 750 83 Ay at (1.8 $4 WAXKIM Ao MAX310 $6 Sa Figure 4. All Channel OFF Isolation (ISO,c) Test Circuit (MUX Disabled) 3) GND -_ S2 Ao |}__< INPUT CODE $3 Ay -< > WHICH TURNS . Sa0N** i Sa AVIAXI/WE Ag -< ' 0 85 MAX310 gy --24v 1 a 36 ve fp}< eV 87 Vout Se 3.2Vams sMHz CD 3 750 *Grounding ON channel improves isolation by -5dB. "Other channels are measured in a similar fashion. Figure 5. All Channel OFF Isolation (ISO,c) Test Circuit (MUX Enabled) Ron vs. SUPPLY VOLTAGE AND INPUT VOLTAGE CHARGE INJECTION vs. ANALOG INPUT VOLTAGE Typical Operating Characteristics OFF ISOLATION vs. FREQUENCY 500 130 0 Ta = +28C yoy = +28? a , wv Th = +25C 80 400 120 70 2 = o 300 yr = +15 2 110 2 FIGURE 3 S Wo = -15V = > 5 Zz & = FIGURE 4 < vt = +10V 2 100 = 4 a nN a 2 FIGURE 5 2 0 ve = +15V ~ n 100 " = GND 90 vt = +30 0 v- = GNO 0 80 0 -15 -10 -5 0 +5 +100 +15 -i0 -5 0 +5 +10 oO 1 10 100 Vin () ANALOG INPUT (V] FREQUENCY [MHz] MAXI/VI FLE/OLEXVNMAX310/311 CMOS RF/Video Multiplexers i 10n $1 GND -}_ Gy 82 Ay - 5 5 INPUT CODE 3 mi ( FoR Se ] 5, MAXIM 4 aane" Wa max31i0 [| 8 EN P-2.4y - oF 86 v/v uF ss out = ou Vout Js5 - - 3 v 15v 15 OluF Vin r ISO, =20LOG = = Vi ors Figure 6. Adjacent Channel Crosstalk (1SOx) Test Circuit -W 3) GND = & Az 1 +W 8&3 Al << TTLIN Vout = Slew 4 5, MIAXIM 4, MAX310 4 55 EN -- +2.4V 10% TTLIN | 13 Ol uF w 87 out i +5V Ss y- rT i Ol ar "ta is defined as the longest of ta, and tag. Figure 7. Access Time (t,) Test Circuit. 90% 90% +5V ] GND |- 2 ' = Vout 2 A2 3: Al +0.8 TTLIN: +3V 1|s, MAKIM Ay vw! | Li __ MAX310 +3 $5 wn fe ~ TTLIN ov Your 8 ye Ht *15V wn 0, Ol uF i H 87 OUT = Vout ten(oK)* . { 8s Vo aa -15N ko (ON) ~~ tENIOFF) OlaF . ; ; / L + ten(on/orF} is defined as the longest of +5V and -5V input case. Figure 8. Enable Delay (ten;on;orr)) Test Circuit. 5 MAXIMCMOS RF/Video Multiplexers +8 | GNo -}_ Ag = 33 Al 4 $s, MAXIM Ag +l s5 MAX310 EN 55 ve 37 ouT S83 v- =o || Tun a | Lit V}. [VL ton-tore* mth Vv ton - torr is defined as the shortest of +5V and -5V input case. Figure 9. Break-Before-Make Delay (ton-tore) Test Circuit. Is(aFF) > +5v (1}__ 81 6ND -}_ Sz Ag _ INPUT CODE +5V 83 Ay --* > WHICH TURNS $y OFF* 84 VIAKIAV Ay MAX310 85 EN +2.4y 86 vr - tv Ol uF $7 our } PEN T 8a v- mae fp Mak *Shown for S;. Other channels are measured in a similar fashion. $1 GND F-_ Se Ap b< INPUT CODE 5V 83 Ay J4} WHICH TURNS $1 ON* Sa AMAXKIZK Ao bP sp MAXS10 ey +2.AV 86 ve +18V Ino O1uF 81 out oc PLS, o5v Sa V- rr pout * shown for S,. Other channels are measured in a similar fashion. Figure 10. OFF input Leakage Current Test Circuit. Figure 12. ON Output Leakage Current Test Circuit. 8 6NO 82 Ae 7 83 Al O.ay $4 MIAKIMVI Ay MAX310 $5 EN 56 vt p}\_t- 150 =5v 81 OUT HEM EO -sv _ 38 V- nae rsa Olue Lt 8 GND 82 Ag |e INPUT CODE 83 Ai FOR EACH CHANNEL Sq MMIAXKISHL Ag MAX310 +5Y }~ 5 EN wv 86 ve Sr QUT tue Vour 83 ve iv 1000nF O1uF oy 750 Q=C1(AVouT) = Figure 11. OFF Output Leakage Current Test Circuit. MMAXAIL/VI Figure 13. Charge Injection (Q) Test Circuit KEE/OLFEXVW