FEATURES
••
••
•12-bit resolution
••
••
•8 or 20 microsecond conversion times
••
••
•5 input voltage ranges
••
••
•Internal high Z input buffer
••
••
•Short-cycle operation
••
••
•MIL-STD-883 models available
GENERAL DESCRIPTION
The ADC-HX and ADC-HZ Series are self-contained, high-
performance, 12-bit A/D converters manufactured with thick
and thin-film hybrid technology. They use the successive
approximation conversion technique to achieve a 12-bit
conversion in 20 and 8 microseconds, respectively. Five input
voltage ranges are programmable by external pin connection.
An internal buffer amplifier is also provided for applications in
which 50 megohm input impedance is required.
These converters utilize a fast 12-bit monolithic DAC which
includes a precision zener reference source. The circuit also
contains a fast monolithic comparator, a monolithic 12-bit
successive approximation register, a clock and a monolithic
buffer amplifier. Nonlinearity is specified at ±1/2LSB maximum.
Both models have identical operation except for conversion
speed. They can be short-cycled to give faster conversions in
lower-resolution applications. Use of the internal buffer
amplifier increases conversion time by 3 microseconds, the
settling time of the amplifier. Output coding is complementary
binary, complementary offset binary, or complementary two’s
complement. Serial data is also brought out. The p ackage is a
32-pin ceramic TDIP. Models are available for use in either
commercial (0 to +70°C) or military (–55 to +125°C) operating
Figure 1. Functional Block Diagram
temperature ranges. MIL-STD-883 and DESC Standard
Military Drawing models are also available.
PIN FUNCTION PIN FUNCTION
1 BIT 12 (LSB) 32 SERIAL DATA OUTPUT
2 BIT 11 31 –15V POWER
3 BIT 10 30 BUFFER INPUT
4 BIT 9 29 BUFFER OUTPUT
5 BIT 8 28 +15V POWER
6 BIT 7 27 GAIN ADJUST
7 BIT 6 26 ANALOG COMMON
8 BIT 5 25 20V INPUT RANGE
9 BIT 4 24 10V INPUT RANGE
10 BIT 3 23 BIPOLAR OFFSET
11 BIT 2 22 COMPARATOR INPUT
12 BIT 1 (MSB) 21 START CONVERT
13 BIT 1 (MSB) 20 E.O.C. (ST ATUS)
14 SHORT CYCLE 19 CLOCK OUT
15 DIGITAL COMMON 18 REFERENCE OUT
16 +5V POWER 17 CLOCK RATE
PRECISION
REF (+6.3V)
CLOCK
SUCCESSIVE
APPROXIMATION
REGISTER
12-BIT DAC
COMPARATOR
6.3k
5k
REF. OUT
18
+5V POWER
16
27 GAIN
ADJUST
15
14
20
30
BUFFER
INPUT
29
23
BIPOLAR
OFFSET
22
COMPARATOR
INPUT
24
25
26
32
SERIAL
DATA
OUT
13
1
MSB
12
1
MSB
11
2
10
3
9
4
8
5
7
6
6
7
5
8
4
9
3
10
2
11
1
12
LSB.
21 19
17
CLOCK
RATE
PARALLEL DATA OUT
BIT NO.
+
5k
BUFFER
OUTPUT
10V
INPUT
20V
INPUT
ANALOG
COMMON
BUFFER
AMPLIFIER
CLOCK
OUT START
CONV.
DIGITAL
COMMON
SHORT
CYCLE
E.O.C.
STATUS
–15V POWER
31
+15V POWER
28
ADC-HX, ADC-HZ SeriesADC-HX, ADC-HZ Series
ADC-HX, ADC-HZ SeriesADC-HX, ADC-HZ Series
ADC-HX, ADC-HZ Series
12-Bit, 8 and 20µsec
Analog-to-Digital Converters
INNOVATION and EX C ELL E N C E
®®
2-1 D ATEL, Inc., 1 1 Cabot Boulevard, Mansfield, MA 02048-1 194 (U.S.A.) Tel: 508-339-3000 Fax: 508-339-6356 • For immediate assistance 800-233-2765
INPUT/OUTPUT CONNECTIONS
D ATEL, Inc., 1 1 Cabot Boulevard, Mansfield, MA 02048-1 194 (U.S.A.) Tel: 508-339-3000 Fax: 508-339-6356 • For immediate assistance 800-233-2765
ADC-HX, ADC-HZ
®
®
TECHNICAL NOTES
1. It is recommended that the ±15V power input pins both be
bypassed to ground with a 0.01µF ceramic capacitor in
parallel with a 1µF electrolytic capacitor and the +5V power
input pin be bypassed to ground with a 10µF electrolytic
capacitor as shown in the connection diagrams. In addition,
GAIN ADJUST (pin 27) should be bypassed to ground with
a 0.01µF ceramic capacitor. These precautions will assure
noise free operation of the converter.
2. DIGITAL COMMON (pin 15) and ANALOG COMMON
(pin 26) are not connected together internally, and therefore
must be connected as directly as possible externally. It is
recommended that a ground plane be run underneath the
case between the two commons. Analog ground and ±15V
power ground should be run to pin 26 whereas digital
ground and +5V ground should be run to pin 15.
3. External adjustment of zero or offset and gain are made by
using trimming potentiometers connected as shown in the
connection diagrams. The potentiometer values can be
between 10k and 100k Ohms and should be 100ppm/°C
cermet types. The trimming pots should be located as close
as possible to the converter to avoid noise pickup. In some
cases, for example 8-bit short-cycled operation, external
adjustment may not be necessary.
4.
Short-cycled operation results in shorter conversion times
when the conversion is truncated to less than 12 bits. This
is done by connecting SHORT CYCLE (pin 14) to the
output bit following the last bit desired. For example, for an
8-bit conversion, pin 14 is connected to the bit 9 output.
Maximum conversion times are given for short-cycled
conversions of 8 or 10 bits. In these two cases, the clock
rate is accelerated by connecting the CLOCK RATE adjust
(pin 17) to +5V (10 bits) or +15V (8 bit s). The clock rate
should not be arbitrarily speeded up to exceed the
maximum conversion rate at a given resolution, as missing
codes will result.
ABSOLUTE MAXIMUM RATINGS
PARAMETERS LIMITS UNITS
+15V Supply, Pin 28 +18 Volts
–15V Supply, Pin 31 –18 Volts
+5V Supply, Pin 16 +7 Volts
Digital Inputs, Pins 14, 21 ±5.5 Volts
Analog Inputs, Pins 24, 25 ±25 Volts
Buffer Input, Pin 30 ±15 Volts
Lead T emperature (10 seconds) 300 °C
FUNCTIONAL SPECIFICATIONS
(T ypical at +25°C and ±15V and +5V supplies unless otherwise noted)
INPUTS ADC-HX12B ADC-HZ12B
Analog Input Ranges
Unipolar 0 to +5V, 0 to +10V
Bipolar ±2.5V, ±5V, ±10V
Input Impedance 2.5k (0 to +5V, ±2.5V)
5k (0 to +10V, ±5V)
10k (±10V)
Input Impedance with Buffer 50 megohms
Input Bias Current of Buffer 125nA typical, 250nA max.
Start Conver sion
+2V min. to +5.5V max. positive pulse with dur-
ation
of 100ns min. Rise and fall times <30ns.
Logic "1" to "0" transition resets converter and
initiates next conversion. Loading: 2 TTL loads.
PERFORMANCE
Resolution 12 bits
Nonlinearity ±1/2LSB max.
Differential Nonlinearity ±3/4LSB max.
Accuracy Error
➀
Gain (before adjustment) ±0.2%
Zero, Unipolar (before adj.) ±0.1% of FSR
➁
Offset, Bipolar (before adj.) ±0.2% of FSR
➁
Temperature Coefficient
Gain ±20ppm/°C max.
Zero, Unipolar ±5ppm/°C of FSR max.
➁
Offset, Bipolar ±10ppm/°C of FSR max.
➁
Diff. Nonlinearity Tempco ±2ppm/°C of FSR max.
➁
No Missing Codes Over opererating temperature range
Conversion Time
➂
12 Bits 20µs max. 8µs max.
10 Bits
➃
15µs max. 6µs max.
8 Bits
➃
10µs max. 4µs max.
Buffer Settling Time (10V step) 3µs to ±0.01%
Power Supply Rejection ±0.004%/% supply max.
OUTPUTS ➄
Parallel Output Data 12 parallel lines of data held until next
conversion command.
VOUT ("0")
≤
+0.4V
VOUT ("1")
≥
+2.4V
Unipolar Coding Complementary binary
Bipolar Coding Complementary offset binary
Complementary two’s complement
Serial Output Data NRZ successive decision pulses out, MSB first.
Compl. binary or compl. offset binary coding.
End of Conversion (Status) Conversion status signal. Output is logic "1"
during reset and conversion and logic "0"
when conversion complete.
Clock Output Train of positive going +5V 100ns pulses.
600kHz for ADC-HX and 1.5MHz for
ADC-HZ (pin 17 grounded).
Internal Reference +6.3V
Reference Tempco ±20ppm/°C max.
External Reference Current 2.5mA max.
POWER REQUIREMENTS
Power Supply Voltages +15V ±0.5V at +20mA
–15V ±0.5V at –25mA
+5V ±0.25V at +85mA
PHYSICAL/ENVIRONMENTAL
Operating Temp. Range, Case 0 to +70°C or –55 to +125°C
Storage T emperature Range –65 to +150°C
Package Type 32-pin ceramic TDIP
Weight 0.5 ounces (14 grams)
Thermal Impedance
θ
JC 6°C/W
θ
JA 30°C/W
Footnotes:
➀
Adjustable to zero.
➁
FSR is full scale range and is 10V for 0 to +10V or ±5V inputs and 20V for
±10V input, etc.
➂
Without buffer amplifier used. ADC-HZ may require external adjustment
of clock rate.
➃
Short cycled operation.
➄
All digital outputs can drive 2 TTL loads.
®
®
ADC-HX, ADC-HZ
Analog-to-Digital Converters
5. Note that output coding is complementary coding. For
unipolar operation it is complementary binary, and for
bipolar operation it is complementary offset binary or
complementary two’s complement. In cases in which
bipolar coding of offset binary or two’s complement is
required, this can be achieved by inverting the analog input
to the converter (using an op amp connected for gain of –1).
The converter is then calibrated so that –FS analog input
gives an output code of 0000 0000 0000, and +FS – 1LSB
gives 1111 1111 1111.
6. These converters can be operated with an external clock.
To accomplish this, a negative pulse train is applied to
START CONVERT (pin 21). The rate of the external clock
must be lower than the rate of the internal clock as adjusted
(see Short Cycle Operation tables) for the converter
resolution selected. The pulse width of the external clock
should be between 100 and 300 nanoseconds. Each N-bit
conversion cycle requires a pulse train of N + 1 clock pulses
for completion, e.g., an 8-bit conversion requires 9 clock
pulses for completion. A continuous pulse train may be
used for consecutive conversions, resulting in an N-bit
conversion every N + 1 pulses, or the E.O.C. output may be
used to gate a continuous pulse train for single conversions.
7.
When the input buffer amplifier is used, a delay equal to its
settling time must be allowed between the input level change,
such as a multiplexer channel change, and the negative-
going edge of the START CONVERT pulse. If the buffer is
not required, BUFFER INPUT (pin 30) should be tied to
ANALOG COMMON (pin 26). This prevents the unused
amplifier from introducing noise into the converter. For
applications not using the buffer, the converter must be driven
from a source with an extremely low output impedance.
CODING T ABLE
UNIPOLAR OPERATION CODING T ABLE
BIPOLAR OPERATION
COMP.
INPUT RANGE BINARY CODING
0 to +10V 0 to +5V MSB LSB
+9.9976V +4.9988V 0000 0000 0000
+8.7500 +4.3750 0001 1111 1111
+7.5000 +3.7500 0011 1111 1111
+5.0000 +2.5000 0111 1111 1111
+2.5000 +1.2500 1011 1111 1111
+1.2500 +0.6250 1101 1111 1111
+0.0024 +0.0012 1111 1111 1110
0.0000 0.0000 1111 1111 1111
SHORT CYCLE OPERATION
Refer to Technical Note 4 for methods of reducing the ADC-HX or ADC-HZ conversion times.
COMP. COMP . TWO’S
INPUT VOL T AGE RANGE OFFSET BINARY COMPLEMENT
±10V ±5V ±2.5V MSB LSB MSB LSB
+9.9951V +4.9976V +2.4988V 0000 0000 0000 1000 0000 0000
+7.5000 +3.7500 +1.8750 0001 1111 1111 1001 1111 1111
+5.0000 +2.5000 +1.2500 0011 1111 1111 1011 1111 1111
0.0000 0.0000 0.0000 0111 1111 1111 1111 1111 1111
–5.0000 –2.5000 –1.2500 1011 1111 1111 0011 1111 1111
–7.5000 –3.7500 –1.8750 1101 1111 1111 0101 1111 1111
–9.9951 –4.9976 –2.4988 1111 1111 1110 0111 1111 1110
–10.0000 –5.0000 –2.5000 1111 1111 1111 0111 1111 1111
8, 10 & 12-BIT CONVERSION TIMES
RESOLUTION 12 BITS 10 BITS 8 BITS
ADC-HX Conversion T ime 20µs 15µs 10µs
ADC-HZ Conversion T ime 8µs 6µs 4µs
Connect These 17 & 15 17 & 16 17 & 28
Pins Together 14 & 16 14 & 2 14 & 4
PIN 17 CLOCK RATE
VOLTAGE ADC-HX ADC-HZ
0V 600kHZ 1.5MHZ
+5V 720kHZ 1.8MHz
+15V 880kHz 2.2MHz
CLOCK RA TE VS. VOL T AGE
PIN 14 CONNECTION
RES. (BITS) PIN 14 TO
1 PIN 11
2 PIN 10
3 PIN 9
4 PIN 8
5 PIN 7
6 PIN 6
RES. (BITS) PIN 14 TO
7 PIN 5
8 PIN 4
9 PIN 3
10 PIN 2
11 PIN 1
12 PIN 16
CONNECTIONS
D ATEL, Inc., 1 1 Cabot Boulevard, Mansfield, MA 02048-1 194 (U.S.A.) Tel: 508-339-3000 Fax: 508-339-6356 • For immediate assistance 800-233-2765
ADC-HX, ADC-HZ
®
®
Figure 2. Bipolar Operation, –5 to +5V
INPUT CONNECTIONS
WITHOUT BUFFER WITH BUFFER
INPUT VOL TAGE INPUT CONNECT THESE INPUT CONNECT THESE
RANGE PIN PINS T OGETHER PIN PINS TOGETHER
0 to +5V 24 22 & 25 23 & 26 30 22 & 25 23 & 26 29 & 24
0 to +10V 24 — 23 & 26 30 — 23 & 26 29 & 24
±2.5V 24 22& 25 23 & 22 30 22 & 25 23 & 22 29 & 24
±5V 24 — 23 & 22 30 — 23 & 22 29 & 24
±10V 25 — 23 & 2 2 30 — 23 & 22 29 & 25
Figure 3. Unipolar Operation, 0 to +10V
CONNECTIONS AND CALIBRA TION
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
17
START
CONVERT IN
2.2M
+5V
–15V
+5V COMMON
0.01µF CAPS ARE CERAMIC TYPES
DATA
OUTPUTS
1µF
CAP
0.01
µF
10µF
0.01µF 2.8M
0.01
µF
15V
10k
TO
100kANALOG INPUT
(0 TO +10V)
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
10k
TO
100k
+15V
+
+
+
OFFSET
ADJUST
GAIN
ADJUST
ADC-HX
OR
ADC-HZ
COMMON
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
17
START
CONVERT IN
ADC-HX
OR
ADC-HZ
2.2M
+5V
–15V
+5V COMMON
0.01µF CAPS ARE CERAMIC TYPES
DATA
OUTPUTS
1µF
CAP
0.01
µF
10µF
0.01µF 2.8M
0.01
µF
15V
COMMON
10k
TO
100k
ANALOG INPUT
(–5 TO +5V)
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
10k
TO
100k
+15V
+
+
+
ZERO
ADJUST
GAIN
ADJUST
®
®
ADC-HX, ADC-HZ
Analog-to-Digital Converters
CALIBRA TION PROCEDURE
1. Connect the converter for bipolar or unipolar operation.
Use the input connection table for the desired input voltage
range and input impedance. Apply START CONVERT
pulses of 100 nanoseconds minimum duration to pin 21.
The spacing of the pulses should be no less than the
maximum conversion time.
2. Zero and Offset Adjustments
Apply a precision voltage reference source between the
selected analog input and ground. Adjust the output of the
reference source to the value shown in the Calibration Table
for the unipolar zero adjustment (zero + 1/2LSB) or the
bipolar offset adjustment (–FS + 1/2LSB). Adjust the
trimming potentiometer so that the output code flickers
equally between 1111 1111 1111 and 1111 1111 1110.
3. Full Scale Adjustment
Change the output of the precision voltage reference source
to the value shown in the Calibration Table for the unipolar
CALIBRA TION T ABLE
RANGE ADJUST. INPUT VOL TAGE
UNIPOLAR 0 to +5V Zero +0.6mV
Gain +4.9982V
0 to +10V Zero +1.2mV
Gain +9.9963V
BIPOLAR ±2.5V Offset –2.4994V
Gain +2.4982V
±5V Offset –4.9988V
Gain +4.9963V
±10V Offset –9.9976V
Gain +9.9927V
or bipolar gain adjustment (+FS – 1.5LSB). Adjust the gain
trimming potentiometer so that the output code flickers
equally between 0000 0000 0001 and 0000 0000 0000.
TIMING DIAGRAM FOR
ADC-HX, ADC-HZ OUTPUT: 101010101010
ADC-HX ADC-HZ
T120µs 8µs
T21.56µs 0.56µs
TIMING DIAGRAM
OPERATING PERIODS
1 2 3 4 5 6 7 8 9
10 11 12 13
START
CONVERT
E.O.C.
(STATUS)
CLOCK
OUT
SERIAL
DATA OUT
BIT 1
(MSB)
BIT 2 BIT 4
BIT 12
(LSB)
T1
T2
100ns min.
60ns
40ns
100ns
40ns
40ns
BIT 1
(MSB) BIT 3 BIT 5 BIT 6 BIT 7 BIT 8 BIT 9 BIT 10 BIT 11 BIT 12
(LSB)
50ns
PARALLEL DATA
NOW VALID
1
BIT 2
BIT 3
0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
D ATEL, Inc., 1 1 Cabot Boulevard, Mansfield, MA 02048-1 194 (U.S.A.) Tel: 508-339-3000 Fax: 508-339-6356 • For immediate assistance 800-233-2765
ADC-HX, ADC-HZ
®
®
MECHANICAL DIMENSIONS
INCHES (mm)
ORDERING INFORMATION
MODEL TEMP. RANGE
ADC-HX12BGC 0 to +70°C
ADC-HX12BMC 0 to +70°C
ADC-HX12BMM –55 to +125°C
ADC-HX12BMM-QL –55 to +125°C
ADC-HX/883 –55 to +125°C
ADC-HZ12BGC 0 to +70°C
ADC-HZ12BMC 0 to +70°C
ADC-HZ12BMM –55 to +125°C
ADC-HZ12BMM-QL –55 to +125°C
ADC-HZ/883 –55 to +125°C
MIL-STD-883B units are available under DESC Drawing Number
5962-88508. Contact DATEL for 883 product specification.
0.040
(1.016)
SEATING
PLANE
0.025
(0.635)
0.200 MAX.
(5.080)
0.235 MAX.
(5.969)
0.190 MAX.
(4.826) 0.900 ±0.010
(22.860)
1.11 MAX.
(28.19)
0.100 TYP.
(2.540)
1.72 MAX.
(43.69)
116
17
32
1.500
(38.100)
0.100
(2.540) 0.100
(2.540)
0.018 ±0.002
(0.457)
0.010 ±0.002
(0.254)
Dimension Tolerances
(unless otherwise indicated):
2 place decimal (.XX) ±0.010 (±0.254)
3 place decimal (.XXX) ±0.005 (±0.127)
Lead Material:
Kovar alloy
Lead Finish:
50 microinches (minimum) gold plating
over 100 microinches (nominal) nickel plating
