1
FEATURES APPLICATIONS
SEE ALSO
DESCRIPTION
APPLICATION CIRCUIT
_
+
IN-
IN+
PWM H-
Bridge
VO+
VO-
Internal
Oscillator CS
ToBattery
VDD
GND
Bias
Circuitry
RI
RI
+
-
Differential
Input
TPA2036D1
SHUTDOWN
A1 A2 A3
B1 B2 B3
C1 C2 C3
IN+ GND VO-
VDD VDD GND
IN- SHUTDOWN VO+
9-BALL
WAFERCHIPSCALE
YZFPACKAGE
TPA2036D1DIMENSIONS
(TOPVIEWOFPCB)
1,45mm
1,45mm
TPA2036D1
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.............................................................................................................................................................................................. SLOS589 – OCTOBER 2008
2.5-W MONO CLASS-D AUDIO AMPLIFIER WITH AUTO-RECOVERY
•Wireless or Cellular Handsets and PDAs2
•Pin-to-pin compatibility with TPA2010D1
•Personal Navigation Devices•Short Circuit Auto-recovery
•General Portable Audio Devices•Maximum Battery Life and Minimum Heat
•Linear Vibrator Drivers– Efficiency With an 8- ΩSpeaker:– 88% at 400 mW– 80% at 100 mW
•TPA2031D1 ,TPA2032D1 ,TPA2033D1 ,– 2.8-mA Quiescent Current
TPA2034D1 ,TPA2035D1– 0.5- µA Shutdown Current•Only Three External Components
The TPA2036D1 is a 2.5-W high efficiency filter-free– Optimized PWM Output Stage Eliminates
class-D audio power amplifier (class-D amp) in a 1,45LC Output Filter
mm × 1,45 mm wafer chip scale package (WCSP)– High PSRR ( – 75 dB) and Wide Supply
that requires only three external components.Voltage (2.5 V to 5.5 V)
Features such as 88% efficiency, – 75-dB PSRR,– Fully Differential Design Reduces RF
improved RF immunity, and 8 mm
2
total PCB areaRectification and Eliminates Bypass
make TPA2036D1 ideal for cellular handsets. A fastCapacitor
start-up time of 1 ms with minimal pop makes– Improved CMRR Eliminates Two Input
TPA2036D1 ideal for portable applications.Coupling Capacitors
In cellular handsets, TPA2036D1 is capable of driving•1,45mm × 1,45 mm 9-Ball WCSP
the earpiece, speaker phone, and melody ringer.– NanoFree™ Lead-Free (YZF) TPA2036D1 allows independent gain while summingsignals from separate sources, and has a low 36µV
RMS
noise floor, A-weighted.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of TexasInstruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2NanoFree is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Copyright © 2008, Texas Instruments IncorporatedProducts conform to specifications per the terms of the TexasInstruments standard warranty. Production processing does notnecessarily include testing of all parameters.
ORDERING INFORMATION
ABSOLUTE MAXIMUM RATINGS
RECOMMENDED OPERATING CONDITIONS
PACKAGE DISSIPATION RATINGS
TPA2036D1
SLOS589 – OCTOBER 2008 ..............................................................................................................................................................................................
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These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foamduring storage or handling to prevent electrostatic damage to the MOS gates.
T
A
PACKAGE PART NUMBER SYMBOL
9 ball, 1.45mm × 1.45mm WCSP TPA2036D1YZF
(1)
CVV– 40 ° C to 85 ° C
(+0,1 mm/-0,05 mm tolerance)
(1) The YZF package is only available taped and reeled. To order add the suffix Rto the end of the part number for a reel of 3000, or addthe suffix Tto the end of the part number for a reel of 250 (e.g. TPA2036D1YZFR).
over operating free-air temperature range unless otherwise noted
(1)
TPA2036D1
In active mode – 0.3 V to 6 VV
DD
Supply voltage
In SHUTDOWN mode – 0.3 V to 7 VV
I
Input voltage – 0.3 V to V
DD
+ 0.3 VContinuous total power dissipation See Dissipation Rating TableT
A
Operating free-air temperature – 40 ° C to 85 ° CT
J
Operating junction temperature – 40 ° C to 150 ° CT
stg
Storage temperature – 65 ° C to 150 ° CLead temperature 1,6 mm (1/16 inch) from case for 10 seconds YZF 260 ° C
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratingsonly, and functional operation of the device at these or any other conditions beyond those indicated under recommended operatingconditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
MIN NOM MAX UNIT
V
DD
Supply voltage 2.5 5.5 VV
IH
High-level input voltage SHUTDOWN 1.3 V
DD
VV
IL
Low-level input voltage SHUTDOWN 0 0.35 VR
I
Input resistor Gain ≤20 V/V (26 dB) 15 k Ω
V
IC
Common mode input voltage range V
DD
= 2.5 V, 5.5 V, CMRR ≤– 49 dB 0.5 V
DD
– 0.8 VT
A
Operating free-air temperature – 40 85 ° C
T
A
≤25 ° C T
A
= 70 ° C T
A
= 85 ° CPACKAGE DERATING FACTOR
(1)
POWER RATING POWER RATING POWER RATING
YZF 7.8 mW/ ° C 975 mW 624 mW 507 mW
(1) Derating factor measure with JEDEC High K board. 1S2P - One signal layer and two plane layers. Please see JEDEC Standard 51-7 forHigh-K board, and JEDEC Standard 51-12 for using package thermal information. Please see JEDEC document page for downloadablecopies: http://www.jedec.org/download/default.cfm.
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Product Folder Link(s): TPA2036D1
ELECTRICAL CHARACTERISTICS
V
V
285 kW
RI
300 kW
RI
315 kW
RI
OPERATING CHARACTERISTICS
TPA2036D1
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.............................................................................................................................................................................................. SLOS589 – OCTOBER 2008
T
A
= 25 ° C (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Output offset voltage|V
OS
| V
I
= 0 V, A
V
= 2 V/V, V
DD
= 2.5 V to 5.5 V 1 25 mV(measured differentially)PSRR Power supply rejection ratio V
DD
= 2.5 V to 5.5 V – 75 – 55 dBV
DD
= 2.5 V to 5.5 V, V
IC
= V
DD
/2 to 0.5 V,CMRR Common mode rejection ratio – 68 – 49 dBV
IC
= V
DD
/2 to V
DD
– 0.8 V|I
IH
| High-level input current V
DD
= 5.5 V, V
I
= 5.8 V, SHUTDOWN 100 µA|I
IL
| Low-level input current V
DD
= 5.5 V, V
I
= – 0.3 V, SHUTDOWN 5 µAV
DD
= 5.5 V, no load 3.4 4.9I
(Q)
Quiescent current V
DD
= 3.6 V, no load 2.8 mAV
DD
= 2.5 V, no load 2.2 3.2I
(SD)
Shutdown current V
( SHUTDOWN)
= 0.35 V, V
DD
= 2.5 V to 5.5 V 0.5 2 µAV
DD
= 2.5 V 700Static drain-source on-stater
DS(on)
V
DD
= 3.6 V 500 m Ωresistance
V
DD
= 5.5 V 400Output impedance in SHUTDOWN V
( SHUTDOWN)
= 0.35 V 2 k Ω
Short circuit detection threshold 2.3 Af
(sw)
Switching frequency V
DD
= 2.5 V to 5.5 V 200 250 300 kHz
Gain V
DD
= 2.5 V to 5.5 V
Resistance from SHUTDOWN to GND 300 k Ω
T
A
= 25 ° C, Gain = 2 V/V, R
L
= 8 Ω(unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
V
DD
= 5 V 2.5THD + N = 10%, f = 1 kHz, R
L
= 4 ΩV
DD
= 3.6 V 1.3 WV
DD
= 2.5 V 0.52V
DD
= 5 V 2.08THD + N = 1%, f = 1 kHz, R
L
= 4 ΩV
DD
= 3.6 V 1.06 WV
DD
= 2.5 V 0.42P
O
Output power
V
DD
= 5 V 1.45THD + N = 10%, f = 1 kHz, R
L
= 8 ΩV
DD
= 3.6 V 0.73 WV
DD
= 2.5 V 0.33V
DD
= 5 V 1.19THD + N = 1%, f = 1 kHz, R
L
= 8 ΩV
DD
= 3.6 V 0.59 WV
DD
= 2.5 V 0.26V
DD
= 5 V, P
O
= 1 W, R
L
= 8 Ω, f = 1 kHz 0.18%Total harmonic distortion plusTHD+N V
DD
= 3.6 V, P
O
= 0.5 W, R
L
= 8 Ω, f = 1 kHz 0.19%noise
V
DD
= 2.5 V, P
O
= 200 mW, R
L
= 8 Ω, f = 1 kHz 0.20%V
DD
= 3.6 V, Inputs ac-grounded f = 217 Hz,k
SVR
Supply ripple rejection ratio – 67 dBwith C
I
= 2 µF V
(RIPPLE)
= 200 mV
pp
SNR Signal-to-noise ratio V
DD
= 5 V, P
O
= 1 W, R
L
= 8 Ω97 dBNo weighting 48V
DD
= 3.6 V, f = 20 Hz to 20 kHz,V
n
Output voltage noise µV
RMSInputs ac-grounded with C
I
= 2 µF
A weighting 36CMRR Common mode rejection ratio V
DD
= 3.6 V, V
IC
= 1 V
pp
f = 217 Hz – 63 dBZ
I
Input impedance 142 150 158 k Ω
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FUNCTIONAL BLOCK DIAGRAM
Ω
Ω
Ω
Ω
Ω
SC
TPA2036D1
SLOS589 – OCTOBER 2008 ..............................................................................................................................................................................................
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OPERATING CHARACTERISTICS (continued)T
A
= 25 ° C, Gain = 2 V/V, R
L
= 8 Ω(unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Start-up time from shutdown V
DD
= 3.6 V 1 ms
Terminal Functions
TERMINAL
I/O DESCRIPTIONNAME YZF
IN – C1 I Negative differential inputIN+ A1 I Positive differential inputV
DD
B1, B2 I Power supplyV
O+
C3 O Positive BTL outputGND A2, B3 I High-current groundV
O-
A3 O Negative BTL outputSHUTDOWN C2 I Shutdown terminal (active low logic)
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TYPICAL CHARACTERISTICS
TABLE OF GRAPHS
TEST SET-UP FOR GRAPHS
TPA2036D1
IN+
IN-
OUT+
OUT-
VDD GND
CI
CI
RI
RI
Measurement
Output
+
-
1μF
+
-
VDD
Load
30kHz
LowPass
Filter
Measurement
Input
+
-
Notes:
(1)CIwasShortedforanyCommon-Modeinputvoltagemeasurement
(2) A33- μHinductorwasplacedinserieswiththeloadresistortoemulateasmallspeakerforefficiencymeasurements.
(3)The30-kHzlow-passfilterisrequiredeveniftheanalyzerhasaninternallow-passfilter. AnRClowpassfilter(100 Ω,47nF)is
usedoneachoutputforthedatasheetgraphs.
TPA2036D1
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.............................................................................................................................................................................................. SLOS589 – OCTOBER 2008
FIGURE
Efficiency vs Output power 1, 2P
D
Power dissipation vs Output power 3, 4Supply current vs Output power 5, 6I
(Q)
Quiescent current vs Supply voltage 7I
(SD)
Shutdown current vs Shutdown voltage 8vs Supply voltage 9P
O
Output power
vs Load resistance 10, 11vs Output power 12, 13THD+N Total harmonic distortion plus noise vs Frequency 14, 15, 16, 17vs Common-mode input voltage 18K
SVR
Supply voltage rejection ratio vs Frequency 19, 20, 21vs Time 22GSM power supply rejection
vs Frequency 23K
SVR
Supply voltage rejection ratio vs Common-mode input voltage 24vs Frequency 25CMRR Common-mode rejection ratio
vs Common-mode input voltage 26
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0
10
20
30
40
50
60
70
80
90
00.2 0.4 0.6 0.8 11.2 1.4 1.6 1.8 2
VDD = 2.5 V,
RL = 4 Ω, 33 µH
Class AB.
VDD = 5 V,
RL = 4 Ω
PO − Output Power − W
Efficiency − %
VDD = 3.6 V,
RL = 4 Ω, 33 µH
VDD = 5 V,
RL = 4 Ω,
33 µH
0
10
20
30
40
50
60
70
80
90
100
00.2 0.4 0.6 0.8 1
VDD = 2.5 V,
RL = 8 Ω, 33 µH
VDD = 5 V,
RL = 8 Ω, 33 µH
Class AB.
VDD = 5 V,
RL = 8 Ω
PO − Output Power − W
Efficiency − %
1.2
0
0.2
0.4
0.6
0.8
1
1.2
1.4
0 0.5 1 1.5 2 2.5
− Power Dissipation − W
PD
PO − Output Power − W
Class-AB 5 V, 8 Ω
VDD = 5 V, RL = 8 Ω
Class-AB 5 V, 4 Ω
VDD = 5 V, RL = 4 Ω,
− Power Dissipation − W
PD
PO − Output Power − W
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0 0.2 0.4 0.6 0.8 1 1.2
Class-AB 3.6 V, 4 Ω
Class-AB 3.6 V, 8 Ω
VDD = 3.6 V,
RL = 8 Ω, 33 µH
VDD = 3.6 V, RL = 4 Ω
0
100
200
300
400
500
600
0 0.5 1 1.5 2 2.5
− Supply Current − mA
PO − Output Power − W
IDD
VDD = 5 V,
VDD = 3.6 V
RL = 4 Ω, 33 µH
VDD = 2.5 V
0
0.5
1
1.5
2
0 0.1 0.2 0.3 0.4 0.5
Shutdown Voltage − V
− Shutdown Current −
I(SD) Aµ
VDD = 5 V
VDD = 3.6 V
VDD = 2.5 V
0
0.5
1
1.5
2
2.5
3
4 8 12 16 20 24 28 32
VDD = 2.5 V
VDD = 3.6 V
VDD = 5 V
RL − Load Resistance − Ω
− Output Power − WPO
PO at 10% THD
Gain = 2 V/V
f = 1 kHz
TPA2036D1
SLOS589 – OCTOBER 2008 ..............................................................................................................................................................................................
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EFFICIENCY EFFICIENCY POWER DISSIPATIONvs vs vsOUTPUT POWER OUTPUT POWER OUTPUT POWER
Figure 1. Figure 2. Figure 3.
POWER DISSIPATION SUPPLY CURRENT SUPPLY CURRENTvs vs vsOUTPUT POWER OUTPUT POWER OUTPUT POWER
Figure 4. Figure 5. Figure 6.
SUPPLY CURRENT SUPPLY CURRENT OUTPUT POWERvs vs vsSUPPLY VOLTAGE SHUTDOWN VOLTAGE LOAD RESISTANCE
Figure 7. Figure 8. Figure 9.
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0
0.5
1
1.5
2
2.5
4 8 12 16 20 24 28 32
RL − Load Resistance − Ω
− Output Power − WPO
VDD = 2.5 V
VDD = 3.6 V
VDD = 5 V
PO at 1% THD
Gain = 2 V/V
f = 1 kHz
0
0.5
1
1.5
2
2.5
2.5 3 3.5 4 4.5 5
VCC − Supply Voltage − V
− Output Power − WPO
Gain = 2 V/V
f = 1 kHz
3
RL = 4 Ω, 10% THD
RL = 4 Ω, 1% THD
RL = 8 Ω,10% THD
RL = 8 Ω,1% THD
0.1
20
0.2
0.5
1
2
5
10
20m 350m 100m 200m 500m 1 2
3 V
5 V
3.6 V
PO − Output Power − W
THD+N − Total Harmonic Distortion + Noise − %
RL = 4 Ω,
f = 1 kHz,
Gain = 2 V/V
2.5 V
0.1
20
0.2
0.5
1
2
5
10
5m 210m 20m 50m100m 200m 500m 1
2.5 V
3.6 V
3 V
PO − Output Power − W
THD+N − Total Harmonic Distortion + Noise − %
RL = 8 Ω,
f = 1 kHz,
Gain = 2 V/V
5 V
0.005
10
0.01
0.02
0.05
0.1
0.2
0.5
1
2
5
20 20k50 100 200 500 1k 2k 5k 10k
f − Frequency − Hz
THD+N − Total Harmonic Distortion + Noise − %
VDD = 3.6 V
CI = 2 µF
RL = 8 Ω
Gain = 2 V/V
PO = 25 mW
PO = 125 mW
PO = 500 mW
0.01
10
0.02
0.05
0.1
0.2
0.5
1
2
5
20 20k50 100 200 500 1k 2k 5k 10k
PO = 50 mW
PO = 250 mW
PO = 1W
f − Frequency − Hz
THD+N − Total Harmonic Distortion + Noise − %
VDD = 5 V
CI = 2 µF
RL = 8 Ω
Gain = 2 V/V
0.01
10
0.02
0.05
0.1
0.2
0.5
1
2
5
20 20k50 100 200 500 1k 2k 5k 10k
f − Frequency − Hz
THD+N − Total Harmonic Distortion + Noise − %
PO = 15 mW
VDD = 2.5 V
CI = 2 µF
RL = 8 Ω
Gain = 2 V/V
PO = 75 mW
PO = 200 mW
0.01
10
0.02
0.05
0.1
0.2
0.5
1
2
5
20 20k50 100 200 500 1k 2k 5k 10k
PO = 250 mW
CI = 2 µF
RL = 4 Ω
Gain = 2 V/V
f − Frequency − Hz
THD+N − Total Harmonic Distortion + Noise − %
VDD = 2.5 V
VDD = 3 V
VDD = 3.6 V
VDD = 4 V VDD = 5 V
0.1
1
10
0 0.5 1 1.5 2 2.5
f = 1 kHz
PO = 200 mW
VIC − Common Mode Input Voltage − V
THD+N − Total Harmonic Distortion + Noise − %
3 3.5 4 4.5 5
VDD = 2.5 V
VDD = 5 V
VDD = 3.6 V
TPA2036D1
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.............................................................................................................................................................................................. SLOS589 – OCTOBER 2008
TOTAL HARMONIC DISTORTION +OUTPUT POWER OUTPUT POWER NOISEvs vs vsLOAD RESISTANCE SUPPLY VOLTAGE OUTPUT POWER
Figure 10. Figure 11. Figure 12.
TOTAL HARMONIC DISTORTION + TOTAL HARMONIC DISTORTION + TOTAL HARMONIC DISTORTION +NOISE NOISE NOISEvs vs vsOUTPUT POWER FREQUENCY FREQUENCY
Figure 13. Figure 14. Figure 15.
TOTAL HARMONIC DISTORTION + TOTAL HARMONIC DISTORTION + TOTAL HARMONIC DISTORTION +NOISE NOISE NOISEvs vs vsFREQUENCY FREQUENCY COMMON MODE INPUT VOLTAGE
Figure 16. Figure 17. Figure 18.
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−90
−80
−70
−60
−50
−40
−30
20 100 1 k 10 k
VDD = 2.5 V
VDD = 5 V
f − Frequency − Hz
Sopply Ripple Rejection Ratio − dB
Inputs floating
RL = 8 Ω
VDD = 3.6 V
20 k
−90
−80
−70
−60
−50
−40
−30
20 100 1 k 20 k
VDD = 2.5 V
VDD = 3.6 V
f − Frequency − Hz
Sopply Ripple Rejection Ratio − dB
Inputs ac-grounded
CI = 2 µF
RL = 4 Ω
Gain = 2 V/V
VDD = 5 V
10 k
−90
−80
−70
−60
−50
−40
−30
20 100 1 k 20 k
f − Frequency − Hz
Sopply Ripple Rejection Ratio − dB
VDD = 2. 5 V
VDD = 3.6 V
VDD = 5 V
Inputs ac-grounded
CI = 2 µF
RL = 8 Ω
Gain = 2 V/V
10 k
C1 − High
3.6 V
C1 − Amp
512 mV
C1 − Duty
12%
t − Time − 2 ms/div
VDD
200 mV/div
VOUT
20 mV/div
−150
−100
−50
0 400 800 1200 1600 2000
−150
−100
−50
0
0
f − Frequency − Hz
− Output Voltage − dBVVO
− Supply Voltage − dBVVDD
VDD Shown in Figure 22
CI = 2 µF,
Inputs ac-grounded
Gain = 2V/V
−100
−90
−80
−70
−60
−50
−40
−30
−20
−10
0
012345
VIC − Common Mode Input Voltage − V
CMRR − Common Mode Rejection Ratio − dB
VDD = 5 V,
Gain = 2
VDD = 2.5 V VDD = 3.6 V
−75
−70
−65
−60
−55
−50
20 100 1 k 20 k
VDD = 3.6 V
f − Frequency − Hz
CMRR − Common Mode Rejection Ratio − dB
VIC = 200 mVPP
RL = 8 Ω
Gain = 2 V/V
10 k
−80
−70
−60
−50
−40
−30
−20
−10
0
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5
DC Common Mode Voltage − V
Sopply Ripple Rejection Ratio − dB
VDD = 2. 5 V VDD = 3.6 V
VDD = 5 V
TPA2036D1
SLOS589 – OCTOBER 2008 ..............................................................................................................................................................................................
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SUPPLY RIPPLE REJECTION RATIO SUPPLY RIPPLE REJECTION RATIO SUPPLY RIPPLE REJECTION RATIOvs vs vsFREQUENCY FREQUENCY FREQUENCY
Figure 19. Figure 20.
GSM POWER SUPPLY REJECTION GSM POWER SUPPLY REJECTIONvs vsTIME FREQUENCY
Figure 22. Figure 23.
SUPPLY RIPPLE REJECTION RATIO COMMON-MODE REJECTION RATIO COMMON-MODE REJECTION RATIOvs vs vsDC COMMON MODE VOLTAGE FREQUENCY COMMON-MODE INPUT VOLTAGE
Figure 24. Figure 25. Figure 26.
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APPLICATION INFORMATION
FULLY DIFFERENTIAL AMPLIFIER
Advantages of Fully Differential Amplifiers
SHORT CIRCUIT AUTO-RECOVERY
SHUTDOWN BEHAVIOR
COMPONENT SELECTION
TPA2036D1
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.............................................................................................................................................................................................. SLOS589 – OCTOBER 2008
The TPA2036D1 is a fully differential amplifier with differential inputs and outputs. The fully differential amplifierconsists of a differential amplifier and a common-mode amplifier. The differential amplifier ensures that theamplifier outputs a differential voltage on the output that is equal to the differential input times the gain. Thecommon-mode feedback ensures that the common-mode voltage at the output is biased around V
DD
/2 regardlessof the common-mode voltage at the input. The fully differential TPA2036D1 can still be used with a single-endedinput; however, the TPA2036D1 should be used with differential inputs when in a noisy environment, like awireless handset, to ensure maximum noise rejection.
•Input-coupling capacitors not required:– The fully differential amplifier allows the inputs to be biased at voltage other than mid-supply. For example,if a codec has a midsupply lower than the midsupply of the TPA2036D1, the common-mode feedbackcircuit will adjust, and the TPA2036D1 outputs will still be biased at midsupply of the TPA2036D1. Theinputs of the TPA2036D1 can be biased from 0.5 V to V
DD
– 0.8 V. If the inputs are biased outside of thatrange, input-coupling capacitors are required.•Midsupply bypass capacitor, C
(BYPASS)
, not required:– The fully differential amplifier does not require a bypass capacitor. This is because any shift in themidsupply affects both positive and negative channels equally and cancels at the differential output.•Better RF-immunity:
– GSM handsets save power by turning on and shutting off the RF transmitter at a rate of 217 Hz. Thetransmitted signal is picked-up on input and output traces. The fully differential amplifier cancels the signalmuch better than the typical audio amplifier.
When a short circuit event happens, the TPA2036D1 goes to shutdown mode and tries to reactivate itself after40 µs. This auto-recovery will continue until the short circuit event is removed. With the recommended PCBlayout, this feature can protect the device without affecting the device's long term reliability.
The input of TPA2036D1 has ESD protection circuitry. During shutdown, the maximum allowed voltage at inputand output pins is -0.3 V to V
DD
+0.3 V.
Figure 27 shows the TPA2036D1 typical schematic with differential inputs and Figure 28 shows the TPA2036D1with differential inputs and input capacitors, and Figure 29 shows the TPA2036D1 with single-ended inputs.Differential inputs should be used whenever possible because the single-ended inputs are much moresusceptible to noise. X5R or X7R with ± 10% or better dielectric material is required.
Table 1. Typical Component Values
REF DES VALUE EIA SIZE MANUFACTURER PART NUMBER
R
I
150 k Ω( ± 1%) 0402 Panasonic ERJ-2RKF1503XC
S
1µF (X5R, ± 10%) 0402 Murata GRM155R61A105KE
15DC
I
(1)
3.3 nF (X5R, ± 10%) 0201 Murata GRM033R61A332KA
01D
(1) C
I
is only needed for single-ended input or if V
ICM
is not between 0.5 V and V
DD
– 0.8 V. C
I
= 3.3 nF(with R
I
= 150 k Ω) gives a high-pass corner frequency of 321 Hz.
Copyright © 2008, Texas Instruments Incorporated Submit Documentation Feedback 9
Product Folder Link(s): TPA2036D1
Input Resistors
I
)
Gain +2 x 150 kW
RIǒV
VǓ
(1)
Decoupling Capacitor
S
)
Input Capacitors
I
)
fc+1
ǒ2pRICIǓ
(2)
CI+1
ǒ2pRIfcǓ
(3)
TPA2036D1
SLOS589 – OCTOBER 2008 ..............................................................................................................................................................................................
www.ti.com
The input resistors
I
) set the gain of the amplifier according to Equation 1 .
Resistor matching is very important in fully differential amplifiers. The balance of the output on the referencevoltage depends on matched ratios of the resistors. CMRR, PSRR, and cancellation of the second harmonicdistortion diminish if resistor mismatch occurs. Therefore, it is recommended to use 1% tolerance resistors orbetter to keep the performance optimized. Matching is more important than overall tolerance. Resistor arrays with1% matching can be used with a tolerance greater than 1%.
Place the input resistors very close to the input of TPA2036D1 to limit noise injection on the high-impedancenodes.
For optimal performance the gain should be set to 2 V/V or lower. Lower gain allows the TPA2036D1 to operateat its best, and keeps a high voltage at the input making the inputs less susceptible to noise.
The TPA2036D1 is a high-performance class-D audio amplifier that requires adequate power supply decouplingto ensure the efficiency is high and total harmonic distortion (THD) is low. For higher frequency transients,spikes, or digital hash on the line, a good low equivalent-series-resistance (ESR) ceramic capacitor, typically 1µF (X5R or X7R dielectric), placed as close as possible (less than 1 mm) to the device V
DD
lead works best.Placing this decoupling capacitor close to the TPA2036D1 is very important for the efficiency of the class-Damplifier, because any resistance or inductance in the trace between the device and the capacitor can cause aloss in efficiency. For filtering lower-frequency noise signals, a 10 µF or greater capacitor placed near the audiopower amplifier would also help, but it is not required in most applications because of the high PSRR of thisdevice.
The TPA2036D1 does not require input coupling capacitors if the design uses a differential source that is biasedfrom 0.5 V to V
DD
– 0.8 V (shown in Figure 27 ). If the input signal is not biased within the recommendedcommon-mode input range, if needing to use the input as a high pass filter (shown in Figure 28 ), or if using asingle-ended source (shown in Figure 29 ), input coupling capacitors are required.
The input capacitors and input resistors form a high-pass filter with the corner frequency, f
c
, determined inEquation 2 .
The value of the input capacitor is important to consider as it directly affects the bass (low frequency)performance of the circuit. Speakers in wireless phones cannot usually respond well to low frequencies, so thecorner frequency can be set to block low frequencies in this application.
Equation 3 is reconfigured to solve for the input coupling capacitance.
If the corner frequency is within the audio band, the capacitors should have a tolerance of ± 10% or better,because any mismatch in capacitance causes an impedance mismatch at the corner frequency and below.
For a flat low-frequency response, use large input coupling capacitors (1 µF). In a GSM phone application, thereis a possibility of the 217 Hz "camping" signal being summed into the audio signal. This signal can be minimizedby reducing the RF impedance of the power supply connection through good grounding technique anddecoupling. Keeping the inputs trace length of TPA2036D1 balanced will also minimize the GSM noise both inthe RF and audio domain.
10 Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated
Product Folder Link(s): TPA2036D1
_
+
IN-
IN+
PWM H-
Bridge
VO+
VO-
Internal
Oscillator CS
ToBattery
VDD
GND
Bias
Circuitry
RI
RI
+
-
Differential
Input
TPA2036D1
Filter-FreeClassD
SHUTDOWN
_
+
IN-
IN+
PWM H-
Bridge
VO+
VO-
Internal
Oscillator CS
ToBattery
VDD
GND
Bias
Circuitry
RI
RI
Differential
Input
TPA2036D1
Filter-FreeClassD
SHUTDOWN
CI
CI
TPA2036D1
TPA2036D1
www.ti.com
.............................................................................................................................................................................................. SLOS589 – OCTOBER 2008
Figure 27. Typical TPA2036D1 Application Schematic With Differential Input for a Wireless Phone
Figure 28. TPA2036D1 Application Schematic With Differential Input and Input Capacitors
Figure 29. TPA2036D1 Application Schematic With Single-Ended Input
Copyright © 2008, Texas Instruments Incorporated Submit Documentation Feedback 11
Product Folder Link(s): TPA2036D1
SUMMING INPUT SIGNALS WITH THE TPA2036D1
Summing Two Differential Input Signals
Gain 1 +VO
VI1 +2 x 150 kW
RI1 ǒV
VǓ
(4)
Gain 2 +VO
VI2 +2 x 150 kW
RI2 ǒV
VǓ
(5)
_
+
IN-
IN+
PWM H-
Bridge
VO+
VO-
Internal
Oscillator CS
To Battery
VDD
GND
Bias
Circuitry
RI2
RI2
+
-
Differential
Input 1
SHUTDOWN
RI1
RI1
+
-
Differential
Input 2
Filter-Free Class D
Summing a Differential Input Signal and a Single-Ended Input Signal
TPA2036D1
SLOS589 – OCTOBER 2008 ..............................................................................................................................................................................................
www.ti.com
Most wireless phones or PDAs need to sum signals at the audio power amplifier or just have two signal sourcesthat need separate gain. The TPA2036D1 makes it easy to sum signals or use separate signal sources withdifferent gains. Many phones now use the same speaker for the earpiece and ringer, where the wireless phonewould require a much lower gain for the phone earpiece than for the ringer. PDAs and phones that have stereoheadphones require summing of the right and left channels to output the stereo signal to the mono speaker.
Two extra resistors are needed for summing differential signals (a total of 5 components). The gain for each inputsource can be set independently (see Equation 4 and Equation 5 , and Figure 30 ).
If summing left and right inputs with a gain of 1 V/V, use R
I1
= R
I2
= 300 k Ω.
If summing a ring tone and a phone signal, set the ring-tone gain to Gain 2 = 2 V/V, and the phone gain to gain 1= 0.1 V/V. The resistor values would be. . .R
I1
= 3 M Ω, and = R
I2
= 150 k Ω.
Figure 30. Application Schematic With TPA2036D1 Summing Two Differential Inputs
Figure 31 shows how to sum a differential input signal and a single-ended input signal. Ground noise can couplein through IN+ with this method. It is better to use differential inputs. The corner frequency of the single-endedinput is set by C
I2
, shown in Equation 8 . To assure that each input is balanced, the single-ended input must bedriven by a low-impedance source even if the input is not in use.
12 Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated
Product Folder Link(s): TPA2036D1
Gain 1 +VO
VI1 +2 x 150 kW
RI1 ǒV
VǓ
(6)
Gain 2 +VO
VI2 +2 x 150 kW
RI2 ǒV
VǓ
(7)
CI2 +1
ǒ2pRI2 fc2Ǔ
(8)
CI2 u1
ǒ2p150kW20HzǓ
(9)
CI2 u53nF
(10)
_
+
IN-
IN+
PWM H-
Bridge
VO+
VO-
Internal
Oscillator CS
To Battery
VDD
GND
Bias
Circuitry
RI2
RI2
Differential
Input 1
Filter-Free Class D
SHUTDOWN
RI1
RI1
Single-Ended
Input 2
CI2
CI2
TPA2036D1
www.ti.com
.............................................................................................................................................................................................. SLOS589 – OCTOBER 2008
If summing a ring tone and a phone signal, the phone signal should use a differential input signal while the ringtone might be limited to a single-ended signal. Phone gain is set at gain 1 = 0.1 V/V, and the ring-tone gain is setto gain 2 = 2 V/V, the resistor values would be …R
I1
= 3 M Ω, and = R
I2
= 150 k Ω.
The high pass corner frequency of the single-ended input is set by C
I2
. If the desired corner frequency is lessthan 20 Hz...
Figure 31. Application Schematic With TPA2036D1 Summing Differential Input and Single-Ended InputSignals
Copyright © 2008, Texas Instruments Incorporated Submit Documentation Feedback 13
Product Folder Link(s): TPA2036D1
Summing Two Single-Ended Input Signals
Gain 1 +VO
VI1 +2 x 150 kW
RI1 ǒV
VǓ
(11)
Gain 2 +VO
VI2 +2 x 150 kW
RI2 ǒV
VǓ
(12)
CI1 +1
ǒ2pRI1 fc1Ǔ
(13)
CI2 +1
ǒ2pRI2 fc2Ǔ
(14)
CP+CI1 )CI2
(15)
RP+RI1 RI2
ǒRI1 )RI2Ǔ
(16)
TPA2036D1
SLOS589 – OCTOBER 2008 ..............................................................................................................................................................................................
www.ti.com
Four resistors and three capacitors are needed for summing single-ended input signals. The gain and cornerfrequencies (f
c1
and f
c2
) for each input source can be set independently (see Equation 11 through Equation 14 ,and Figure 32 ). Resistor, R
P
, and capacitor, C
P
, are needed on the IN+ terminal to match the impedance on theIN – terminal. The single-ended inputs must be driven by low impedance sources even if one of the inputs is notoutputting an ac signal.
14 Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated
Product Folder Link(s): TPA2036D1
_
+
IN-
IN+
PWM H-
Bridge
VO+
VO-
Internal
Oscillator CS
To Battery
VDD
GND
Bias
Circuitry
RI2
RP
Filter-Free Class D
SHUTDOWN
RI1
Single-Ended
Input 2
CI2
CP
Single-Ended
Input 1
CI1
BOARD LAYOUT
Copper
Trace Width
Solder Mask
Thickness
Solder
Pad Width
Solder Mask
Opening
Copper Trace
Thickness
TPA2036D1
www.ti.com
.............................................................................................................................................................................................. SLOS589 – OCTOBER 2008
Figure 32. Application Schematic With TPA2036D1 Summing Two Single-Ended Inputs
In making the pad size for the WCSP balls, it is recommended that the layout use nonsolder mask defined(NSMD) land. With this method, the solder mask opening is made larger than the desired land area, and theopening size is defined by the copper pad width. Figure 33 and Table 2 show the appropriate diameters for aWCSP layout. The TPA2036D1 evaluation module (EVM) layout is shown in the next section as a layoutexample.
Figure 33. Land Pattern Dimensions
Copyright © 2008, Texas Instruments Incorporated Submit Documentation Feedback 15
Product Folder Link(s): TPA2036D1
Component Location
Trace Width
TPA2036D1
SLOS589 – OCTOBER 2008 ..............................................................................................................................................................................................
www.ti.com
Table 2. Land Pattern Dimensions
SOLDER PAD SOLDER MASK COPPER STENCIL STENCILCOPPER PADDEFINITIONS OPENING THICKNESS OPENING THICKNESS
Nonsolder mask 275 µm 375 µm 1 oz max (32 µm) 275 µm x 275 µm Sq. 125 µm thickdefined (NSMD) (+0.0, – 25 µm) (+0.0, – 25 µm) (rounded corners)
NOTES:
1. Circuit traces from NSMD defined PWB lands should be 75 µm to 100 µm wide in the exposed area insidethe solder mask opening. Wider trace widths reduce device stand off and impact reliability.2. Recommend solder paste is Type 3 or Type 4.3. Best reliability results are achieved when the PWB laminate glass transition temperature is above theoperating the range of the intended application.4. For a PWB using a Ni/Au surface finish, the gold thickness should be less 0.5 µm to avoid a reduction inthermal fatigue performance.5. Solder mask thickness should be less than 20 µm on top of the copper circuit pattern.6. Best solder stencil performance is achieved using laser cut stencils with electro polishing. Use of chemicallyetched stencils results in inferior solder paste volume control.7. Trace routing away from WCSP device should be balanced in X and Y directions to avoid unintentionalcomponent movement due to solder wetting forces.
Place all the external components very close to the TPA2036D1. The input resistors need to be very close to theTPA2036D1 input pins so noise does not couple on the high impedance nodes between the input resistors andthe input amplifier of the TPA2036D1. Placing the decoupling capacitor, CS, close to the TPA2036D1 isimportant for the efficiency of the class-D amplifier. Any resistance or inductance in the trace between the deviceand the capacitor can cause a loss in efficiency.
Recommended trace width at the solder balls is 75 µm to 100 µm to prevent solder wicking onto wider PCBtraces. Figure 34 shows the layout of the TPA2036D1 evaluation module (EVM).
For high current pins (V
DD
, GND V
O+
, and V
O –
) of the TPA2036D1, use 100- µm trace widths at the solder ballsand at least 500- µm PCB traces to ensure proper performance and output power for the device.
For input pins (IN – , IN+, and SHUTDOWN) of the TPA2036D1, use 75- µm to 100- µm trace widths at the solderballs. IN – and IN+ pins need to run side-by-side to maximize common-mode noise cancellation. Placing inputresistors, R
IN
, as close to the TPA2036D1 as possible is recommended.
16 Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated
Product Folder Link(s): TPA2036D1
375 mm
(+0, -25 mm) 275 mm
(+0, -25 mm)
Circular Solder Mask Opening
Paste Mask (Stencil)
= Copper Pad Size
75 mm
100 mm
100 mm
100 mm
100 mm
100 mm
75 mm
75 mm
EFFICIENCY AND THERMAL INFORMATION
qJA +1
Derating Factor +1
0.0078 +128.2°CńW
(17)
TAMax +TJMax *qJAPDmax +150 *128.2 (0.4) +98.72°C
(18)
ELIMINATING THE OUTPUT FILTER WITH THE TPA2036D1
TPA2036D1
www.ti.com
.............................................................................................................................................................................................. SLOS589 – OCTOBER 2008
Figure 34. Close Up of TPA2036D1 Land Pattern From TPA2036D1 EVM
The maximum ambient temperature depends on the heat-sinking ability of the PCB system. The derating factorfor the YZF package is shown in the dissipation rating table. Converting this to θ
JA
:
Given θ
JA
of 128.2 ° C/W, the maximum allowable junction temperature of 150 ° C, and the maximum internaldissipation of 0.4 W (2.25 W, 4- Ωload, 5-V supply, from Figure 3 ), the maximum ambient temperature can becalculated with the following equation.
Equation 18 shows that the calculated maximum ambient temperature is 98.72 ° C at maximum power dissipationwith a 5-V supply and 4- Ωa load, see Figure 3 . The TPA2036D1 is designed with thermal protection that turnsthe device off when the junction temperature surpasses 165 ° C ~ 190 ° C to prevent damage to the IC. Also, usingspeakers more resistive than 4- Ωdramatically increases the thermal performance by reducing the output currentand increasing the efficiency of the amplifier.
This section focuses on why the user can eliminate the output filter with the TPA2036D1.
Copyright © 2008, Texas Instruments Incorporated Submit Documentation Feedback 17
Product Folder Link(s): TPA2036D1
Effect on Audio
Traditional Class-D Modulation Scheme
0 V
-5 V
+5 V
Current
OUT+
Differential Voltage
Across Load
OUT-
TPA2036D1 Modulation Scheme
TPA2036D1
SLOS589 – OCTOBER 2008 ..............................................................................................................................................................................................
www.ti.com
The class-D amplifier outputs a pulse-width modulated (PWM) square wave, which is the sum of the switchingwaveform and the amplified input audio signal. The human ear acts as a band-pass filter such that only thefrequencies between approximately 20 Hz and 20 kHz are passed. The switching frequency components aremuch greater than 20 kHz, so the only signal heard is the amplified input audio signal.
The traditional class-D modulation scheme, which is used in the TPA005Dxx family, has a differential outputwhere each output is 180 degrees out of phase and changes from ground to the supply voltage, V
DD
. Therefore,the differential pre-filtered output varies between positive and negative V
DD
, where filtered 50% duty cycle yields0 volts across the load. The traditional class-D modulation scheme with voltage and current waveforms is shownin Figure 35 . Note that even at an average of 0 volts across the load (50% duty cycle), the current to the load ishigh causing a high loss and thus causing a high supply current.
Figure 35. Traditional Class-D Modulation Scheme's Output Voltage and Current Waveforms Into anInductive Load With no Input
The TPA2036D1 uses a modulation scheme that still has each output switching from 0 to the supply voltage.However, OUT+ and OUT – are now in phase with each other with no input. The duty cycle of OUT+ is greaterthan 50% and OUT – is less than 50% for positive voltages. The duty cycle of OUT+ is less than 50% and OUT –is greater than 50% for negative voltages. The voltage across the load sits at 0 volts throughout most of theswitching period greatly reducing the switching current, which reduces any I
2
R losses in the load.
18 Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated
Product Folder Link(s): TPA2036D1
0 V
-5 V
+5 V
Current
OUT+
OUT-
Differential
Voltage
Across
Load
0 V
-5 V
+5 V
Current
OUT+
OUT-
Differential
Voltage
Across
Load
Output = 0 V
Output > 0 V
Efficiency: Why You Must Use a Filter With the Traditional Class-D Modulation Scheme
Effects of Applying a Square Wave Into a Speaker
TPA2036D1
www.ti.com
.............................................................................................................................................................................................. SLOS589 – OCTOBER 2008
Figure 36. The TPA2036D1 Output Voltage and Current Waveforms Into an Inductive Load
The main reason that the traditional class-D amplifier needs an output filter is that the switching waveform resultsin maximum current flow. This causes more loss in the load, which causes lower efficiency. The ripple current islarge for the traditional modulation scheme because the ripple current is proportional to voltage multiplied by thetime at that voltage. The differential voltage swing is 2 × V
DD
and the time at each voltage is half the period forthe traditional modulation scheme. An ideal LC filter is needed to store the ripple current from each half cycle forthe next half cycle, while any resistance causes power dissipation. The speaker is both resistive and reactive,whereas an LC filter is almost purely reactive.
The TPA2036D1 modulation scheme has very little loss in the load without a filter because the pulses are veryshort and the change in voltage is V
DD
instead of 2 × V
DD
. As the output power increases, the pulses widenmaking the ripple current larger. Ripple current could be filtered with an LC filter for increased efficiency, but formost applications the filter is not needed.
An LC filter with a cutoff frequency less than the class-D switching frequency allows the switching current to flowthrough the filter instead of the load. The filter has less resistance than the speaker that results in less powerdissipated, which increases efficiency.
If the amplitude of a square wave is high enough and the frequency of the square wave is within the bandwidthof the speaker, a square wave could cause the voice coil to jump out of the air gap and/or scar the voice coil. A250-kHz switching frequency, however, is not significant because the speaker cone movement is proportional to1/f
2
for frequencies beyond the audio band. Therefore, the amount of cone movement at the switching frequencyis very small. However, damage could occur to the speaker if the voice coil is not designed to handle theadditional power. To size the speaker for added power, the ripple current dissipated in the load needs to becalculated by subtracting the theoretical supplied power, P
SUP THEORETICAL
, from the actual supply power, P
SUP
, atmaximum output power, P
OUT
. The switching power dissipated in the speaker is the inverse of the measuredefficiency, η
MEASURED
, minus the theoretical efficiency, η
THEORETICAL
.
Copyright © 2008, Texas Instruments Incorporated Submit Documentation Feedback 19
Product Folder Link(s): TPA2036D1
PSPKR +PSUP–PSUP THEORETICAL (at max output power)
(19)
PSPKR +
PSUP
POUT–PSUP THEORETICAL
POUT (at max output power)
(20)
PSPKR +POUT ǒ1
hMEASURED *1
hTHEORETICALǓ(at max output power)
(21)
hTHEORETICAL +RL
RL)2rDS(on) (at max output power)
(22)
When to Use an Output Filter
1 nF
Ferrite
Chip Bead
OUTP
OUTN
Ferrite
Chip Bead
1 nF
1 µF
1 µF
33 µH
33 µH
OUTP
OUTN
TPA2036D1
SLOS589 – OCTOBER 2008 ..............................................................................................................................................................................................
www.ti.com
The maximum efficiency of the TPA2036D1 with a 3.6 V supply and an 8- Ωload is 86% from Equation 22 . Usingequation Equation 21 with the efficiency at maximum power (84%), we see that there is an additional 17 mWdissipated in the speaker. The added power dissipated in the speaker is not an issue as long as it is taken intoaccount when choosing the speaker.
Design the TPA2036D1 without an output filter if the traces from amplifier to speaker are short. The TPA2036D1passed FCC and CE radiated emissions with no shielding with speaker trace wires 100 mm long or less.Wireless handsets and PDAs are great applications for class-D without a filter.
A ferrite bead filter can often be used if the design is failing radiated emissions without an LC filter, and thefrequency sensitive circuit is greater than 1 MHz. This is good for circuits that just have to pass FCC and CEbecause FCC and CE only test radiated emissions greater than 30 MHz. If choosing a ferrite bead, choose onewith high impedance at high frequencies, but very low impedance at low frequencies.
Use an LC output filter if there are low frequency ( < 1 MHz) EMI sensitive circuits and/or there are long leadsfrom amplifier to speaker.
Figure 37 and Figure 38 show typical ferrite bead and LC output filters.
Figure 37. Typical Ferrite Chip Bead Filter (Chip bead example: TDK: MPZ1608S221A)
Figure 38. Typical LC Output Filter, Cutoff Frequency of 27 kHz
20 Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated
Product Folder Link(s): TPA2036D1
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
TPA2036D1YZFR DSBGA YZF 9 3000 180.0 8.4 1.65 1.65 0.81 4.0 8.0 Q1
TPA2036D1YZFT DSBGA YZF 9 250 180.0 8.4 1.65 1.65 0.81 4.0 8.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 19-Aug-2011
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
TPA2036D1YZFR DSBGA YZF 9 3000 210.0 185.0 35.0
TPA2036D1YZFT DSBGA YZF 9 250 210.0 185.0 35.0
PACKAGE MATERIALS INFORMATION
www.ti.com 19-Aug-2011
Pack Materials-Page 2
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