BCM8130 FEATURES
ORX
OTX
OTX
ORX
BCM8130
BCM8131
BCM8131
BCM8130
Network Interface
Processor
Network Interface
Processor
Application Block Diagram
•Compliant with Optical Internetworking Forum
(OIF), Telcordia, ITU-T, and IEEE 802.3ae industry
standards.
•Reduces design cycle and time to market.
•High level of integration allows for higher port density
solutions.
•CMOS-based device uses the most effective silicon
economy of scale.
•Low-power consumption eliminates the need for
external cooling sources.
•Target applications:
• Ethernet transmission equipment
• Optical modules
• ADD/DR OP multiplex ers
• Digital cross-connects
• ATM switch backbones
• Test equipment
• Switch router backbones
• Hubs and repeaters
• Network Interface Cards (NIC)
SUMMARY OF BENEFITS
MULTI-RATE 10 Gbps 16:1 MUX WITH CLOCK GENERATION
PRODUCT
Brief
BCM8130
•Fully integrated multi-rate clock multiplication unit
(CMU) and multiplexer (MUX)
•Support for multiple rates — OC-192: 9.953 Gbps,
OC-192 FEC: 10.664 and 10.709 Gbps, 10G Ethernet:
10.3125 Gbps
•16:1 multiplexer with LVDS parallel data and clock
inputs
•On-chip 16 x 10 FIFO eliminates system timing issues
•Lock detect
•Core power supply: 1.8V
•I/O power supply: CML, LVDS and LVPECL at 1.8V
and CMOS at 1.8 or 3.3V
•Power consumption: 580 mW typical @ 1.8V
•Standard CMOS fabrication process
•15 x 15 mm, 120-pin BGA package
The BCM8130 is a fully integrated multi-rate
SONET/SDH/10GE transmitter operating at OC-192/STM-64
(9.953 Gbps), 10-Gigabit Ethernet (10.3125 Gbps), and FEC
(Forward Error Correction) data rates (10.664 and 10.790 Gbps)
with serializer, and CMU. The low-jitter LVDS interface and the
onboard low-jitter PLL meets Optical Internetworking Forum
(OIF), IEEE 802.3ae, Telcordia, ANSI, and ITU-T jitter
standards.
The BCM8130 reference clock input frequency is user -selectable
to the line rate divided by either 16 or 64. A 10-word FIFO
decouples the parallel input timing domain from the serial output
timing domain. The BCM8130 provides a CML serial output
clock to retime the data at the optical interface.
The major transmitter functions are:
• Configurable multi-rate CMU and data rates
• CML transmit serial data output
• 16-bit parallel LVDS input
• Selectable reference clock frequencies
• Parallel-to-serial conversion
• Elastic buffering FIFO with overflow indicator
• Lock detect
BCM8130 OVERVIEW
RESET
SELFECB
SEL10GED
IFSEL
VCP
VCN
REF155EN
REFCLKP
REFCLKN
CLK16IP
CLK16IN
CLK16OP
CLK16ON
LCKDET
DI0P
DI0N
DI15P
DI15N
TSDP
OVF
TSDN
TSCKP
TSCKN
RB_LD
Output
Retime
Read
Pointer
Write
Pointer
DIVIDE-BY-16
16 X 10 FIFO
16:1 MUX
INPUT REGISTER
FIFO
Control
Multi-rate
CMU
LVDS
Reference Clock Output
CML
Serial Outputs
LVDS Parallel
Input Bus
LVPECL
Reference Clock
LVPECL
Reference Clock
Block Diagram
Phone: 949-450-8700
FAX: 949-450-8710
Email: info@broadcom.com
Web: www.broadcom.com
Broadcom®, the pulse logo®and Connecting EverythingTM are trademarks of
Broadcom Corporation and/or its subsidiaries in the United States and certain other countries.
All other trademarks are the property of their respective owners.
BROADCOM CORPORATION
16215 Alton Parkway, P.O. Box 57013
Irvine, California 92619-7013
© 2002 by BROADCOM CORPORATION. All rights reser ved.
8130-PB02-R-4.1.02
