TLC2934
3.3 V 130 MHZ VCO, PHASE FREQUENCY DETECTOR
SLAS306 – NOVEMBER 2000
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
D
Voltage-Controlled Oscillator (VCO)
– Ring Oscillator Using Only One
External Biasing Resistor (RBIAS)
D
Recommended Lock Frequency
– 100 MHz to 130 MHz
– (VDD = 3.3 V + 5%, TA = –20°C to 75°C)
D
Phase-Frequency Detector (PFD)
Includes a High-Speed Edge-Triggered
Detector With Internal Charge Pump
D
Independent VCO, PFD Power-Down
Mode
D
Thin Small-Outline Package (14
Terminal)
D
Compatible Pin Assignment to
TLC2932, TLC2933
description
The TLC2934, a mixed signal IC designed for phase-locked-loop (PLL) systems, is composed of a
voltage-controlled oscillator (VCO) and an edge-triggered-type phase frequency detector (PFD).
The internal VCO is based on the TLC2932 and TLC2933s ring oscillator . It oscillates in wider frequency with
lower supply voltage, and it has stable oscillating performance. The oscillation function, provided by only one
external resistor connection, supplies bias to the VCI internal circuit. Oscillator range is covered from 10 MHz
to 130 MHz with a 3.3-V supply voltage. The VCO has an inhibit function to stop oscillation and for the
power-down mode.
The internal PFD, a high-speed rising edge triggered type, has an internal charge pump with a high-impedance
output buffer. The PFD detects phase difference between the reference frequency input and the signal
frequency input from the VCO output through an external counter device. This functions the same as TLC2932
and TLC2933. The PFD also has the inhibit function for stop phase comparison and for power-down mode.
block diagram
Through
or 1/2 Ring
Oscillator Bias
Control
VCO
PFD
Ring
Oscillator
TLC29341PW
f(OSC)
PFD OUT
Bias Supply
Control Voltage
VCO INHIBIT
Reference Input
Comparison Input
PFD INHIBIT
Copyright 2000, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
1
2
3
4
5
6
7
14
13
12
11
10
9
8
LOGIC VDD
SELECT
VCO OUT
FIN-A
FIN-B
PFD OUT
LOGIC GND
VCO VDD
RBIAS
VCO IN
VCO GND
VCO INHIBIT
PFD INHIBIT
TEST
PW PACKAGE
(TOP VIEW)
TLC2934
3.3 V 130 MHZ VCO, PHASE FREQUENCY DETECTOR
SLAS306 – NOVEMBER 2000
2POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Terminal Functions
TERMINAL
I/O
DESCRIPTION
NAME NO.
I/O
DESCRIPTION
FIN-A,
FIN-B 4
5IFrequency signal inputs for PFD. The reference frequency signal (fREF-IN) and the VCO output signal
through the external counter device are applied to these terminals. When the LPF design is the lag-lead filter
(passive filter and noninverting), f(REF-IN) is input to FIN-A, and the VCO output signal is to FIN-B.
LOGIC GND 7GND terminal for the internal logic circuit
LOGIC VDD 1Power supply terminal for the internal logic circuit. This power supply terminal separates from VCO VDD to
reduce cross-coupling between supplies.
PFD INHIBIT 9 I PFD INHIBIT (power-down) control signal input terminal
PFD OUT 6 O PFD output terminal. When PFD INHIBIT is high, PFD OUT is in the high-impedance state.
RBIAS 13 I Bias resistor (RBIAS) terminal. Connect a resistor between VCO GND and this terminal to supply bias to
internal VCO circuit. TLC2934 bias resistor connection is different from TLC2932 and TLC2933, where bias
resistor RBIAS is connected to VCO VDD.
SELECT 2 I 1/2 divider select terminal. L=through output, H=1/2 output.
TEST 8Test terminal. Use for production test. Tie to GND when in normal use.
VCO GND 11 GND terminal for internal VCO
VCO OUT 3 O VCO output terminal. When VCO INHIBIT = high, VCO OUT is low.
VCO INHIBIT 10 IVCO INHIBIT (power-down) control signal input terminal
VCO IN 12 I VCO control voltage input terminal. Normally, The external LPF is connected to this terminal.
VCO VDD 14 Power supply terminal for the internal VCO circuit. This power supply terminal should be separate from
LOGIC VDD to reduce cross-coupling between supplies.
absolute maximum ratings over operating free-air temperature (unless otherwise noted)†
Supply voltage (each supply), VDD (see Note 1) –0.5 V to 4 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range (each input), VI (see Note 1) –0.5 V to VDD + 0.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input current (each input), II ±20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output current (each output), IO ±20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous total power dissipation at (or below) TA = 25
_
C (see Note 2), PD 700 mW. . . . . . . . . . . . . . . . . . .
Operating free-air temperature range. TA –20°C to 75°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, Tstg –65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds 260°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
†Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only , and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may af fect device reliability.
NOTES: 1. All voltage values are with respect to network ground terminal.
2. For operation above 25°C free–air temperature, derate linearly at the rate of 5.6 mW/°C
TLC2934
3.3 V 130 MHZ VCO, PHASE FREQUENCY DETECTOR
SLAS306 – NOVEMBER 2000
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
recommended operating conditions
MIN TYP MAX UNIT
Supply voltage (each supply, VDD (see Notes 3 and 4) 3.15 3.3 3.45 V
Input voltage (each input except for VCO IN, VI0 VDD V
Output current (each output), IO0±2 mA
VCO control voltage, VCO IN 0.5 VDD V
RBIAS = 1 kΩ36 130 MHz
Lock frequency (through out
p
ut)
RBIAS = 1.8 kΩ28 90
Lock
freq
u
enc
y
(thro
u
gh
o
u
tp
u
t)
RBIAS = 2.4 kΩ26 80
RBIAS = 3.3 kΩ20 60
RBIAS = 1 kΩ18 65 MHz
Lock frequency (1/2 out
p
ut)
RBIAS = 1.8 kΩ14 45
Lock
freq
u
enc
y
(1/2
o
u
tp
u
t)
RBIAS = 2.4 kΩ13 40
RBIAS = 3.3 kΩ10 30
Bias resistor, RBIAS 1.0 3.3 KΩ
Operating temperature range, TA–20 75
_
C
VCO IN voltage at VCO INHIBIT↓, V(CINH) (see Note 5) 0 0.5 V
NOTES: 3. It is recommended that the logic supply terminal (LOGIC VDD) and the VCO supply terminal (VCO VDD) be at the same voltage and
separated from each other.
4. A bypass capacitor is placed as close as possible to each supply terminal.
5. For stable restart of VCO, VCOIN is 0 V when VCO INHIBIT is pulled down to GND level to disable the VCO INHIBIT function. And
also, VCO IN should be 0 V when the operation will be started by supplying the power.
electrical characteristics over recommended operating free-air temperature range, VDD=3.3 V
(unless otherwise noted)
VCO
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VOH High-level output voltage IOH = –2 mA 3.1 V
VOL Low-level output voltage IOL= 2 mA 0.2 V
VIH High-level input voltage Logic signal input 2.3 V
VIL Low-level input voltage Logic signal input 1.0 V
IIInput current at TEST, VCO INHIBIT VI = VDD or GND ±1µA
ZV(CO IN) Input impedance at VCOIN VCOIN = 1/2 VDD 10 MΩ
IDD(INH) VCO supply current (inhibit) See Note 6 0.01 1µA
IDD(VCO) VCO supply current See Note 7 10 15 mA
NOTES: 6. Current into VCO VDD, when VCO INHIBIT = VDD, PFD is inhibited.
7. Current into VCO VDD, when VCOIN = 1/2 VDD, RBIAS = 1 kΩ, VCO INHIBIT = GND, PFD is inhibited.
TLC2934
3.3 V 130 MHZ VCO, PHASE FREQUENCY DETECTOR
SLAS306 – NOVEMBER 2000
4POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
electrical characteristics over recommended operating free-air temperature range, VDD=3.3 V
(unless otherwise noted) (continued)
VCO
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VOH High-level output voltage IOH = –2 mA 3.1 V
VOL Low-level output voltage IOL = 2 mA 0.2 V
IOZ High-impedance state output current PFD INHIBIT = high,
VO = VDD or GND ±1µA
VIH High-level input voltage at FIN–A,B 2.3 V
VIL Low-level input voltage at FIN–A,B 1.0 V
V(TO) Positive input threshold voltage at PFD INHIBIT 1.0 1.65 2.3 V
CIInput capacitance at FIN-A,B 5 pF
Z(IN) Input impedance at FIN-A,B 10 MΩ
IDD(PFD) PFD supply current See Note 8 1.5 6.0 mA
NOTE 8: Current into LOGIC VDD, when FIN-A, FIN-B=50 MHz (VI(pp) = 3.3V , rectangular wave), T est=GND, no load, and VCO OUT is inhibited.
VCO
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
f(OSC) Operating oscillation frequency RBIAS = 1 kΩ67 90 113 MHz
t(STB) T ime to stable oscillation See Note 9 0.7 10 µs
trRise time CL = 15 pF, See Figure 3 1.7 5 ns
tfFall time CL = 15 pF, See Figure 3 1.1 4 ns
f(duty) Duty cycle at VCO OUT RBIAS = 1.0 kΩ, VCO IN = 1/2 VDD 45% 50% 55%
Temperature coefficient of oscillation frequency RBIAS=1.0kΩ, VCO IN = 1/2 VDD,
TA = –20°C to 75°C0.03 %/°C
Supply voltage coefficient of oscillation frequency RBIAS = 1 kΩ, VCO IN = 1.65 V,
VDD = 3.15 V to 3.45 V 0.02 %/mV
Jitter absolute RBIAS = 1 kΩ, VCO IN = 1/2 VDD 50 ps
NOTE 9: Current into VCO VDD, when VCO INHIBIT = VDD, PFD is inhibited.
PFD AC
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
fMAX Maximum operating frequency 50 MHz
tPLZ PFD output disable time from low level See Figures 4 and 5 and Table 6 15.3 40 ns
tPHZ PFD output disable time from high level 15.5 40 ns
tPZL PFD output enable time from low level 2.4 10 ns
tPZH PFD output enable time from high level 2.5 10 ns
trRise time CL=15 pF (see Figure 3) 1.2 5 ns
tfFall time CL=15 pF (see Figure 3) 0.7 5 ns
TLC2934
3.3 V 130 MHZ VCO, PHASE FREQUENCY DETECTOR
SLAS306 – NOVEMBER 2000
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
trtf
90%
10%
90%
10%
VCO OUT
Figure 1. VCO Output Voltage Waveform
50%
90%
10% 10% 50%
50%
tPHZ
trtftPLZ
VDD
GND
VDD
GND
VDD
GND
VDD
GND
VDD
GND
VDD
GND
FIN–A†
FIN–B†
PFD INHIBIT
PFD OUT
(a) OUTPUT PULLDOWN (b) OUTPUT PULLUP
†FIN-A and FIN-B are for reference phase only , not for timing.
90%
tPZL
tPZH
GND
VOH
50%
50% 50% VDD
VOL
(see Figure 3 and PFD Output Test Conditions Table)
Figure 2. PFD Output Voltage Waveform
S1
S2
RL
CL
Test Point
PFD OUT
DUT
VDD
PARAMETER RL
1 kΩ15 pF
Open Close
OpenClose
CLSLS2
tPZH
tPHZ
tr
tPZL
tPLZ
tf
PFD Output Test Conditions
Figure 3. PFD Output Test Condition
TLC2934
3.3 V 130 MHZ VCO, PHASE FREQUENCY DETECTOR
SLAS306 – NOVEMBER 2000
6POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Figure 4
0
20
40
60
80
100
120
140
160
180
200
0 0.5 1 1.5 2 2.5 3
–20 °C
– VCO Oscillation Frequency – MHz
VCO IN – VCO Control Voltage – V
VCO OSCILLATION FREQUENCY
vs
VCO CONTROL VOLTAGE
VDD = 3.3 V,
RBIAS = 1 kΩ,25 °C
75 °C
fosc
Figure 5
0
20
40
60
80
100
120
0 0.5 1 1.5 2 2.5 3
–20 °C
– VCO Oscillation Frequency – MHz
VCO IN – VCO Control Voltage – V
VCO OSCILLATION FREQUENCY
vs
VCO CONTROL VOLTAGE
VDD = 3.3 V,
RBIAS = 2.4 kΩ,25 °C
75 °C
fosc
Figure 6
0
20
40
60
80
100
0 0.5 1 1.5 2 2.5 3
–20 °C
– VCO Oscillation Frequency – MHz
VCO IN – VCO Control Voltage – V
VCO OSCILLATION FREQUENCY
vs
VCO CONTROL VOLTAGE
VDD = 3.3 V,
RBIAS = 3.3 kΩ,25 °C
75 °C
fosc
Figure 7
85
87.5
90
92.5
95
3.15 3.30 3.45
VCO OSCILLATION FREQUENCY
vs
VCO SUPPLY VOLTAGE
VDD – VCO Supply Voltage – V
RBIAS = 1 kΩ
VCOIN = 1.65 V,
TA = 25 °C
– VCO Oscillation Frequency – MHz
fosc
PACKAGE OPTION ADDENDUM
www.ti.com 2-Sep-2011
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status (1) Package Type Package
Drawing Pins Package Qty Eco Plan (2) Lead/
Ball Finish MSL Peak Temp (3) Samples
(Requires Login)
TLC2934IPW NRND TSSOP PW 14 90 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TLC2934IPWG4 NRND TSSOP PW 14 90 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TLC2934IPWR NRND TSSOP PW 14 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
TLC2934IPWR TSSOP PW 14 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
TLC2934IPWR TSSOP PW 14 2000 367.0 367.0 35.0
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 2
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