LT3756/LT3756-1/LT3756-2
1
375612fb
Typical applicaTion
FeaTures
applicaTions
DescripTion
100VIN, 100VOUT
LED Controller
The LT
®
3756, LT3756-1 and LT3756-2 are DC/DC control-
lers designed to operate as a constant-current source for
driving high current LEDs. They drive a low side external
N-channel power MOSFET from an internal regulated 7.15V
supply. The fixed frequency, current-mode architecture
results in stable operation over a wide range of supply
and output voltages. A ground referenced voltage FB pin
serves as the input for several LED protection features,
and also makes it possible for the converter to operate
as a constant-voltage source. A frequency adjust pin
allows the user to program the frequency from 100kHz
to 1MHz to optimize efficiency, performance or external
component size.
The LT3756/LT3756-1/LT3756-2 sense output current at
the high side of the LED string. High side current sensing
is the most flexible scheme for driving LEDs, allowing
boost, buck mode or buck-boost mode configuration.
The PWM input provides LED dimming ratios of up to
3000:1, and the CTRL input provides additional analog
dimming capability.
94% Efficient 30W White LED Headlamp Driver
n 3000:1 True Color PWM™ Dimming
n Wide Input Voltage Range: 6V to 100V
n Output Voltage Up to 100V
n Constant-Current and Constant-Voltage Regulation
n 100mV High Side Current Sense
n Drives LEDs in Boost, Buck Mode, Buck-Boost Mode,
SEPIC or Flyback Topology
n Adjustable Frequency: 100kHz to 1MHz
n Open LED Protection
n Programmable Undervoltage Lockout with Hysteresis
n Improved Open LED Status Pin (LT3756-2)
n Frequency Synchronization (LT3756-1)
n PWM Disconnect Switch Driver
n CTRL Pin Provides Analog Dimming
n Low Shutdown Current: <1µA
n Programmable Soft-Start
n Thermally Enhanced 16-Lead QFN (3mm × 3mm)
and MSOP Packages
n High Power LED Applications
n Current Limited Constant Voltage Applications
n Battery Charging
VIN
LT3756-2
22µH
GNDVCINTVCC
SHDN/UVLO FB
VREF ISP
332k
100k
INTVCC
1M
4.7µF
0.001µF
0.01µF
VIN
8V TO 60V
(100V TRANSIENT)
185k
10k
28.7k
375kHz
1%
4.7µF
INTVCC
40.2k
CTRL
0.018Ω
0.27Ω
1M
14k
370mA
4.7µF
30W
LED
STRING
375612 TA01a
OPENLED
PWM
SS
RT
ISN
GATE
SENSE
PWMOUT
Efficiency vs VIN
VIN (V)
0 20
80
EFFICIENCY (%)
84
88
92
96
100
40 60 80
375612 TA01b
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. True Color PWM is a trademark of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
Protected by U.S. Patents, including 7199560 and 7321203.
LT3756/LT3756-1/LT3756-2
2
375612fb
absoluTe MaxiMuM raTings
VIN ..........................................................................100V
SHDN/UVLO ............................................................100V
ISP, ISN ...................................................................100V
INTVCC ...................................................... VIN + 0.3V, 8V
GATE, PWMOUT (Note 4) ..........................INTVCC + 0.3V
CTRL, PWM, OPENLED .............................................12V
VC, VREF
, SS, FB .........................................................3V
SYNC ..........................................................................8V
(Note 1)
orDer inForMaTion
LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE
LT3756EMSE#PBF LT3756EMSE#TRPBF 3756 16-Lead Plastic MSOP –40°C to 125°C
LT3756IMSE#PBF LT3756IMSE#TRPBF 3756 16-Lead Plastic MSOP –40°C to 125°C
LT3756EMSE-1#PBF LT3756EMSE-1#TRPBF 37561 16-Lead Plastic MSOP –40°C to 125°C
LT3756IMSE-1#PBF LT3756IMSE-1#TRPBF 37561 16-Lead Plastic MSOP –40°C to 125°C
LT3756EMSE-2#PBF LT3756EMSE-2#TRPBF 37562 16-Lead Plastic MSOP –40°C to 125°C
LT3756IMSE-2#PBF LT3756IMSE-2#TRPBF 37562 16-Lead Plastic MSOP –40°C to 125°C
LT3756HMSE-2#PBF LT3756HMSE-2#TRPBF 37562 16-Lead Plastic MSOP –40°C to 150°C
LT3756EUD#PBF LT3756EUD#TRPBF LDMQ 16-Lead (3mm × 3mm) Plastic QFN –40°C to 125°C
LT3756IUD#PBF LT3756IUD#TRPBF LDMQ 16-Lead (3mm × 3mm) Plastic QFN –40°C to 125°C
LT3756EUD-1#PBF LT3756EUD-1#TRPBF LDMR 16-Lead (3mm × 3mm) Plastic QFN –40°C to 125°C
LT3756IUD-1#PBF LT3756IUD-1#TRPBF LDMR 16-Lead (3mm × 3mm) Plastic QFN –40°C to 125°C
LT3756EUD-2#PBF LT3756EUD-2#TRPBF LFKB 16-Lead (3mm × 3mm) Plastic QFN –40°C to 125°C
LT3756IUD-2#PBF LT3756IUD-2#TRPBF LFKB 16-Lead (3mm × 3mm) Plastic QFN –40°C to 125°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
This product is only offered in trays. For more information go to: http://www.linear.com/packaging/
1
2
3
4
5
6
7
8
PWMOUT
FB
ISN
ISP
VC
CTRL
VREF
PWM
16
15
14
13
12
11
10
9
GATE
SENSE
VIN
INTVCC
SHDN/UVLO
RT
SS
SYNC OR OPENLED
TOP VIEW
17
GND
MSE PACKAGE
16-LEAD PLASTIC MSOP
TJMAX = 125°C (E-,I-GRADES), TJMAX = 150°C (H-GRADE), θJA = 43°C/W, θJC = 4°C/W
EXPOSED PAD (PIN 17) IS GND, MUST BE SOLDERED TO PCB
16 15 14 13
5678
TOP VIEW
17
GND
UD PACKAGE
16-LEAD (3mm s 3mm) PLASTIC QFN
9
10
11
12
4
3
2
1VREF
PWM
SYNC OR OPENLED
SS
FB
PWMOUT
GATE
SENSE
CTRL
VC
ISP
ISN
RT
SHDN/UVLO
INTVCC
VIN
TJMAX = 125°C, θJA = 68°C/W, θJC = 4.2°C/W
EXPOSED PAD (PIN 17) IS GND, MUST BE SOLDERED TO PCB
pin conFiguraTion
RT ............................................................................1.5V
SENSE ......................................................................0.5V
Operating Junction Temperature Range (Notes 2, 3)
LT3756E, LT3756I ..............................–40°C to 125°C
LT3756H ............................................ –40°C to 150°C
Storage Temperature Range ...................–65°C to 150°C
Lead Temperature (Soldering, 10 sec)
MSE .................................................................. 300°C
LT3756/LT3756-1/LT3756-2
3
375612fb
elecTrical characTerisTics
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 24V, SHDN/UVLO = 24V, CTRL = 2V, PWM = 5V, unless otherwise
noted.
PARAMETER CONDITIONS MIN TYP MAX UNITS
VIN Minimum Operating Voltage VIN Tied to INTVCC l6 V
VIN Shutdown IQSHDN/UVLO = 0V, PWM = 0V
SHDN/UVLO = 1.15V, PWM = 0V 0.1 1
5µA
µA
VIN Operating IQ (Not Switching) PWM = 0V 1.4 1.7 mA
VREF Voltage 100µA ≤ IVREF ≤ 0µA l1.965 2.00 2.045 V
VREF Line Regulation 6V ≤ VIN ≤ 100V 0.006 %/V
SENSE Current Limit Threshold l98 108 118 mV
SENSE Input Bias Current Current Out of Pin 40 µA
SS Pull-Up Current Current Out of Pin 8 10 13 µA
Error Amplifier
ISP/ISN Full-Scale Current Sense Threshold FB = 0V, ISP = 48V l96 100 103 mV
ISP/ISN Current Sense Threshold at CTRL = 0V CTRL = 0V, FB = 0V, ISP = 48V –12 –9.5 –7 mV
CTRL Pin Range for Current Sense Threshold Adjustment l0 1.1 V
CTRL Input Bias Current Current Out of Pin 50 100 nA
LED Current Sense Amplifier Input Common Mode Range (VISN)l2.9 100 V
ISP/ISN Short-Circuit Threshold ISN = 0V 115 150 200 mV
ISP/ISN Short-Circuit Fault Sensing Common Mode Range (VISN)l0 3 V
ISP/ISN Input Bias Current (Combined) PWM = 5V (Active), ISP = ISN = 48V
PWM = 0V (Standby), ISP = ISN = 48V 55
0
0.1 µA
µA
LED Current Sense Amplifier gmV(ISP – ISN) = 100mV 120 µS
VC Output Impedance 1V < VC < 2V 15000 kΩ
VC Standby Input Bias Current PWM = 0V –20 20 nA
FB Regulation Voltage (VFB)
ISP = ISN
l 1.220
1.232 1.250
1.250 1.270
1.265 V
V
FB Amplifier gmFB = VFB, ISP = ISN 480 µS
FB Pin Input Bias Current Current Out of Pin 40 100 nA
FB Open LED Threshold OPENLED Falling
(LT3756 and LT3756-2) VFB –
65mV VFB –
50mV VFB –
40mV V
FB Overvoltage Threshold PWMOUT Falling VFB +
50mV VFB +
60mV VFB +
75mV V
VC Current Mode Gain – (∆VVC/∆VSENSE)4 V/V
Oscillator
Switching Frequency RT = 100k
RT = 10k
l90
925 100
1000 125
1050 kHz
kHz
Minimum Off-Time 170 ns
Linear Regulator
INTVCC Regulation Voltage 7 7.15 7.3 V
Dropout (VIN – INTVCC) IINTVCC = –10mA, VIN = 7V 1 V
INTVCC Undervoltage Lockout 3.9 4.1 4.3 V
INTVCC Current Limit 14 17 23 mA
INTVCC Current in Shutdown SHDN/UVLO = 0V, INTVCC = 7V 8 12 µA
LT3756/LT3756-1/LT3756-2
4
375612fb
elecTrical characTerisTics
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 24V, SHDN/UVLO = 24V, CTRL = 2V, PWM = 5V, unless otherwise
noted.
PARAMETER CONDITIONS MIN TYP MAX UNITS
Logic Inputs/Outputs
PWM Input High Voltage l1.5 V
PWM Input Low Voltage l0.4 V
PWM Pin Resistance to GND 45 60 kΩ
PWMOUT Output Low (VOL) 0 50 mV
PWMOUT Output High (VOH) INTVCC –
0.05 V
SHDN/UVLO Threshold Voltage Falling E-, I-Grades
H Grade
l
l
1.185
1.175 1.220 1.245
1.245 V
V
SHDN/UVLO Rising Hysteresis 20 mV
SHDN/UVLO Input Low Voltage IVIN Drops Below 1µA 0.4 V
SHDN/UVLO Pin Bias Current Low SHDN/UVLO = 1.15V 1.7 2.05 2.5 µA
SHDN/UVLO Pin Bias Current High SHDN/UVLO = 1.30V 10 100 nA
OPENLED Output Low (VOL) IOPENLED = 0.5mA
(LT3756 and LT3756-2) 200 mV
SYNC Pin Resistance to GND LT3756-1 Only 30 kΩ
SYNC Input High LT3756-1 Only 1.5 V
SYNC Input Low LT3756-1 Only 0.4 V
Gate Driver
tr GATE Driver Output Rise Time CL = 3300pF 35 ns
tf GATE Driver Output Fall Time CL = 3300pF 35 ns
GATE Output Low (VOL) 0.05 V
GATE Output High (VOH) INTVCC –
0.05 V
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LT3756E, LT3756E-1 and LT3756E-2 are guaranteed to meet
performance specifications from 0°C to 125°C junction temperature.
Specifications over the –40°C to 125°C operating junction temperature
range are assured by design, characterization and correlation with
statistical process controls. The LT3756I, LT3756I-1 and LT3756I-2 are
guaranteed to meet performance specifications over the –40°C to 125°C
operating junction temperature range. The LT3756H-2 is guaranteed to
meet performance specifications over the full –40°C to 150°C operating
junction temperature range. High junction temperatures degrade operating
lifetimes. Operating lifetime is derated at junction temperatures greater
than 125°C.
Note 3: The LT3756 includes overtemperature protection that is intended
to protect the device during momentary overload conditions. Junction
temperature will exceed the maximum operating junction temperature
when overtemperature protection is active. Continuous operating above
the specified maximum operating junction temperature may impair device
reliability.
Note 4: GATE and PWMOUT pins are driven either to GND or INTVCC by
internal switches. Do not connect these pins externally to a power supply.
LT3756/LT3756-1/LT3756-2
5
375612fb
Typical perForMance characTerisTics
FB Regulation Voltage
vs Temperature
VREF Voltage vs Temperature
VREF Voltage vs VIN
Switching Frequency vs RT
Switching Frequency
vs Temperature
SHDN/UVLO Hysteresis Current
vs Temperature
V(ISP – ISN) Threshold vs VCTRL
V(ISP – ISN) Threshold vs VISP
V(ISP – ISN) Threshold
vs Temperature
TA = 25°C, unless otherwise noted.
RT (k)
SWITCHING FREQUENCY (kHz)
375612 G07
10000
1000
100
1010 100
VCTRL (V)
0
–20
V(ISP – ISN) THRESHOLD (mV)
20
60
100
0.5 1 1.5
120
0
40
80
2
375612 G01
ISP VOLTAGE (V)
0
97
V(ISP – ISN) THRESHOLD (mV)
99
101
20 40 8060
103
98
100
102
100
375612 G02
VCTRL = 2V
97
99
101
103
98
100
102
375612 G03
V(ISP – ISN) THRESHOLD (mV)
TEMPERATURE (°C)
–50 0 50 75
–25 25 100 150125
VCTRL = 2V
375612 G04
VFB (V)
TEMPERATURE (°C)
–50 0 50 75
–25 25 100 150125
1.20
1.22
1.24
1.26
1.28
1.21
1.23
1.25
1.27
375612 G05
VREF (V)
TEMPERATURE (°C)
–50 0 50 75
–25 25 100 150125
1.96
1.98
2.00
2.02
2.04
1.97
1.99
2.01
2.03
VIN (V)
0
1.96
VREF (V)
1.98
2.00
2.02
20 40 10060 80
2.04
1.97
1.99
2.01
2.03
375612 G06
375612 G08
SWITCHING FREQUENCY (kHz)
TEMPERATURE (°C)
–50 0 50 75
–25 25 100 150125
300
350
400
450
500 RT = 26.7k
375612 G09
TEMPERATURE (°C)
–50 0 50 75
–25 25 100 150125
1.6
ISHDN/UVLO (µA)
2.0
2.4
1.8
2.2
LT3756/LT3756-1/LT3756-2
6
375612fb
Typical perForMance characTerisTics
INTVCC Voltage vs VIN
INTVCC Current Limit
vs Temperature
INTVCC Voltage vs Temperature
Quiescent Current vs VIN
SENSE Current Limit Threshold
vs Temperature
SHDN/UVLO Threshold
vs Temperature
TA = 25°C, unless otherwise noted.
375612 G11
SENSE THRESHOLD (mV)
TEMPERATURE (°C)
90
100
110
95
105
–50 0 50 75
–25 25 100 150125
Gate Rise/Fall Time
vs Capacitance
SENSE Current Limit Threshold
vs Duty Cycle
V(ISP-ISN) Threshold vs FB Voltage
VIN (V)
0
VIN CURRENT (mA)
1.0
2.0
0.5
1.5
375612 G10
0 20 40 8060 100
PWM = 0V
VIN (V)
VINTVCC (V)
375612 G13
0
4
8
2
6
0 20 40 8060 100
375612 G14
INTVCC CURRENT LIMIT (mA)
TEMPERATURE (°C)
10
14
20
12
16
18
–50 0 50 75
–25 25 100 150125
375612 G15
INTVCC (V)
TEMPERATURE (°C)
–50 0 50 75
–25 25 100 150125
7.0
7.2
7.4
7.1
7.3
DUTY CYCLE (%)
90
SENSE THRESHOLD (mV)
100
110
95
105
375612 G16
0 25 50 75 100
FB VOLTAGE (V)
375612 G17
1.2 1.22 1.24 1.26 1.28
0
50
125
25
75
100
V(ISP –ISN) THRESHOLD (mV)
VCTRL = 2V
CAPACITANCE (nF)
375612 G18
0 2 4 6 108
0
40
100
20
60
80
TIME (ns)
GATE RISE
TIME
GATE
FALL TIME
10% TO 90%
LT3756/LT3756-1/LT3756-2
7
375612fb
pin FuncTions
PWMOUT (Pin 1/Pin 11): Buffered Version of PWM Signal
for Driving LED Load Disconnect NMOS or Level Shift.
This pin also serves in a protection function for the FB
overvoltage condition—will toggle if the FB input is greater
than the FB regulation voltage (VFB) plus 60mV (typical).
The PWMOUT pin is driven from INTVCC. Use of a FET with
gate cut-off voltage higher than 1V is recommended.
FB (Pin 2/Pin 12): Voltage Loop Feedback Pin. FB is
intended for constant-voltage regulation or for LED protec-
tion/open LED detection. The internal transconductance
amplifier with output VC will regulate FB to 1.25V (nominal)
through the DC/DC converter. If the FB input is regulating
the loop, the OPENLED pull-down is asserted. This ac-
tion may signal an open LED fault. If FB is driven above
the FB threshold (by an external power supply spike, for
example), the OPENLED pull-down will be de-asserted and
the PWMOUT pin will be driven low to protect the LEDs
from an overcurrent event. Do not leave the FB pin open.
If not used, connect to GND.
ISN (Pin 3/Pin 13): Connection Point for the Negative
Terminal of the Current Feedback Resistor. If ISN is greater
than 2.9V, the LED current can be programmed by ILED =
100mV/RLED when VCTRL > 1.2V or ILED = (VCTRL –100mV)/
(10 • RLED) when VCTRL ≤ 1V. Input bias current is typi-
cally 25µA. Below 3V, ISN is an input to the short-circuit
protection feature that forces GATE to 0V if ISP exceeds
ISN by more than 150mV (typ).
ISP (Pin 4/Pin 14): Connection Point for the Positive
Terminal of the Current Feedback Resistor. Input bias
current is dependent upon CTRL pin voltage as shown
in the TPC. ISP is an input to the short-circuit protection
feature when ISN is less than 3V.
VC (Pin 5/Pin 15): Transconductance Error Amplifier
Output Pin Used to Stabilize the Voltage Loop with an RC
Network. This pin is high impedance when PWM is low, a
feature that stores the demand current state variable for
the next PWM high transition. Connect a capacitor between
this pin and GND; a resistor in series with the capacitor is
recommended for fast transient response.
(MSOP/QFN)
Typical perForMance characTerisTics
TA = 25°C, unless otherwise noted.
ISP/ISN Input Bias Current
vs CTRL Voltage
INTVCC Dropout Voltage
vs Current, Temperature
CTRL (V)
375612 G19
0 0.5 1 1.5 2
0
20
40
10
30
INPUT BIAS CURRENT (µA)
ISP
ISN
LDO CURRENT (mA)
375612 G20
0 3 6 9 12 15
–2.5
–1.0
0
–1.5
–2.0
–0.5
LDO DROPOUT (V)
–45°C
125°C
VIN = 7V
25°C
150°C
LT3756/LT3756-1/LT3756-2
8
375612fb
CTRL (Pin 6/Pin 16): Current Sense Threshold Adjustment
Pin. Regulating threshold V(ISP – ISN) is 1/10th VCTRL plus
an offset for 0V < VCTRL < 1V. For VCTRL > 1.2V the current
sense threshold is constant at the full-scale value of 100mV.
For 1V < VCTRL < 1.2V, the dependence of current sense
threshold upon VCTRL transitions from a linear function
to a constant value, reaching 98% of full-scale value by
VCTRL = 1.1V. Do not leave this pin open.
VREF (Pin 7/Pin 1): Voltage Reference Output Pin, Typically
2V. This pin drives a resistor divider for the CTRL pin, either
for analog dimming or for temperature limit/compensation
of LED load. Can supply up to 100μA.
PWM (Pin 8/Pin 2): A signal low turns off switcher, idles
oscillator and disconnects VC pin from all internal loads.
PWMOUT pin follows PWM pin. PWM has an internal
pull-down resistor. If not used, connect to INTVCC.
OPENLED (Pin 9/Pin 3, LT3756 and LT3756-2): An open-
collector pull-down on OPENLED asserts if the FB input
is greater than the FB regulation threshold minus 50mV
(typical). To function, the pin requires an external pull-up
current less than 1mA. When the PWM input is low and
the DC/DC converter is idle, the OPENLED condition is
latched to the last valid state when the PWM input was
high. When PWM input goes high again, the OPENLED
pin will be updated. This pin may be used to report an
open LED fault.
SYNC (Pin 9/Pin 3, LT3756-1 Only): The SYNC pin is used
to synchronize the internal oscillator to an external logic
level signal. The RT resistor should be chosen to program
an internal switching frequency 20% slower than the SYNC
pulse frequency. Gate turn-on occurs a fixed delay after
the rising edge of SYNC. For best PWM performance, the
PWM rising edge should occur at least 200ns before the
SYNC rising edge. Use a 50% duty cycle waveform to drive
this pin. This pin replaces OPENLED on LT3756-1 option
parts. If not used, tie this pin to GND.
SS (Pin 10/Pin 4): Soft-Start Pin. This pin modulates
oscillator frequency and compensation pin voltage (VC)
clamp. The soft-start interval is set with an external capaci-
tor. The pin has a 10µA (typical) pull-up current source
to an internal 2.5V rail. The soft-start pin is reset to GND
by an undervoltage condition (detected by SHDN/UVLO
pin) or thermal limit.
RT (Pin 11/Pin 5): Switching Frequency Adjustment Pin.
Set the frequency using a resistor to GND (for resistor
values, see the Typical Performance curve or Table 1).
Do not leave the RT pin open.
SHDN/UVLO (Pin 12/Pin 6): Shutdown and Undervoltage
Detect Pin. An accurate 1.22V falling threshold with ex-
ternally programmable hysteresis detects when power is
OK to enable switching. Rising hysteresis is generated
by the external resistor divider and an accurate internal
2.1µA pull-down current. Above the threshold (but below
6V), SHDN/UVLO input bias current is sub-µA. Below the
falling threshold, a 2.1µA pull-down current is enabled so
the user can define the hysteresis with the external resis-
tor selection. An undervoltage condition resets soft-start.
Tie to 0.4V, or less, to disable the device and reduce VIN
quiescent current below 1µA.
INTVCC (Pin 13/Pin 7): Regulated Supply for Internal
Loads, GATE Driver and PWMOUT Driver. Supplied from
VIN and regulates to 7.15V (typical). INTVCC must be
bypassed with a 4.7µF capacitor placed close to the pin.
Connect INTVCC directly to VIN if VIN is always less than
or equal to 8V.
VIN (Pin 14/Pin 8): Input Supply Pin. Must be locally
bypassed with a 0.22µF (or larger) capacitor placed close
to the IC.
SENSE (Pin 15/Pin 9): The current sense input for the
control loop. Kelvin connect this pin to the positive ter-
minal of the switch current sense resistor, RSENSE, in the
source of the NFET. The negative terminal of the current
sense resistor should be connected to the GND plane
close to the IC.
GATE (Pin 16/Pin 10): N-channel FET Gate Driver Output.
Switches between INTVCC and GND. Driven to GND during
shutdown, fault or idle states.
GND (Pin 17/Pin 17): Ground. This pin also serves as
current sense input for control loop, sensing negative
terminal of current sense resistor. Solder the exposed pad
directly to ground plane.
pin FuncTions
LT3756/LT3756-1/LT3756-2
9
375612fb
block DiagraM
+
–
+
–
+
–
+
–
+
–
+
+
–
A1
A3
A6
+
+
–FREQ
PROG
1.25V
SSCLAMP
1.1V
CTRL
VREF
SHDN/UVLO
ISP
ISN
Q2
150mV
50k
170k
140µA
2.1µA
CTRL
BUFFER
gm
EAMP PWM
COMPARATOR
DRIVER
ISENSE
A4
gm
A10
A5
OVFB
COMPARATOR
1.25V
FB
SHORT-CIRCUIT
DETECT
(LT3756
AND
LT3756-2)
SCILMB
SCILMB
5k
PWMOUT PWM
1.25V
VIN
INTVCC
VC
+
–
+
–A2 R Q
S
RAMP
GENERATOR
100kHz TO 1MHz
OSCILLATOR
+
–
+
–
A8 7.15V
LDO
GATE
SENSE
375612 BD
OPENLED
GND
1.2V
FB
+
–
1.22V
+
–
2V
1.3V
RT SYNC (LT3756-1 ONLY)SS
SHDN
A7
10µA
10µA AT
FB = 1.25V
VC
TLIM
165°C
FAULT
LOGIC
10µA
10µA AT
A1+
= A1–
LT3756/LT3756-1/LT3756-2
10
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operaTion
The LT3756 is a constant-frequency, current mode control-
ler with a low side NMOS gate driver. The GATE pin and
PWMOUT pin drivers, and other chip loads, are powered
from INTVCC, which is an internally regulated supply. In
the discussion that follows, it will be helpful to refer to
the Block Diagram of the IC. In normal operation, with the
PWM pin low, the GATE and PWMOUT pins are driven to
GND, the VC pin is high impedance to store the previous
switching state on the external compensation capacitor,
and the ISP and ISN pin bias currents are reduced to
leakage levels. When the PWM pin transitions high, the
PWMOUT pin transitions high after a short delay. At the
same time, the internal oscillator wakes up and gener-
ates a pulse to set the PWM latch, turning on the external
power MOSFET switch (GATE goes high). A voltage input
proportional to the switch current, sensed by an external
current sense resistor between the SENSE and GND input
pins, is added to a stabilizing slope compensation ramp
and the resulting “switch current sense” signal is fed into
the positive terminal of the PWM comparator. The current
in the external inductor increases steadily during the time
the switch is on. When the switch current sense voltage
exceeds the output of the error amplifier, labeled “VC”,
the latch is reset and the switch is turned off. During the
switch off phase, the inductor current decreases. At the
completion of each oscillator cycle, internal signals such
as slope compensation return to their starting points and a
new cycle begins with the set pulse from the oscillator.
Through this repetitive action, the PWM control algorithm
establishes a switch duty cycle to regulate a current or
voltage in the load. The VC signal is integrated over many
switching cycles and is an amplified version of the differ-
ence between the LED current sense voltage, measured
between ISP and ISN, and the target difference voltage
set by the CTRL pin. In this manner, the error amplifier
sets the correct peak switch current level to keep the
LED current in regulation. If the error amplifier output
increases, more current is demanded in the switch; if it
decreases, less current is demanded. The switch current
is monitored during the on-phase and the voltage across
the SENSE pin is not allowed to exceed the current limit
threshold of 108mV (typical). If the SENSE pin exceeds
the current limit threshold, the SR latch is reset regard-
less of the output state of the PWM comparator. Likewise,
at an ISP/ISN common mode voltage less than 3V, the
difference between ISP and ISN is monitored to determine
if the output is in a short-circuit condition. If the difference
between ISP and ISN is greater than 150mV (typical), the
SR latch will be reset regardless of the PWM comparator.
These functions are intended to protect the power switch,
as well as various external components in the power path
of the DC/DC converter.
In voltage feedback mode, the operation is similar to that
described above, except the voltage at the VC pin is set
by the amplified difference of the internal reference of
1.25V (nominal) and the FB pin. If FB is lower than the
reference voltage, the switch current will increase; if FB
is higher than the reference voltage, the switch demand
current will decrease. The LED current sense feedback
interacts with the FB voltage feedback so that FB will not
exceed the internal reference and the voltage between ISP
and ISN will not exceed the threshold set by the CTRL pin.
For accurate current or voltage regulation, it is necessary
to be sure that under normal operating conditions, the
appropriate loop is dominant. To deactivate the voltage
loop entirely, FB can be connected to GND. To deactivate
the LED current loop entirely, the ISP and ISN should be
tied together and the CTRL input tied to VREF
.
Two LED specific functions featured on the LT3756 are
controlled by the voltage feedback pin. First, when the
FB pin exceeds a voltage 50mV lower (–4%) than the FB
regulation voltage, the pull-down driver on the OPENLED
pin is activated (LT3756 and LT3756-2 only). This function
provides a status indicator that the load may be discon-
nected and the constant-voltage feedback loop is taking
control of the switching regulator. When the FB pin exceeds
the FB regulation voltage by 60mV (5% typical), the PWM-
OUT pin is driven low, ignoring the state of the PWM input.
In the case where the PWMOUT pin drives a disconnect
NFET, this action isolates the LED load from GND, prevent-
ing excessive current from damaging the LEDs. If the FB
input exceeds both the open LED and the overvoltage
thresholds, then an externally driven overvoltage event
has caused the FB pin to be too high and the OPENLED
pull-down will be de-asserted. The LT3756-2 will re-assert
the OPENLED signal when FB falls below the overvoltage
threshold and remains above the open LED threshold. The
LT3756 is prevented from re-asserting OPENLED until FB
drops below both thresholds.
LT3756/LT3756-1/LT3756-2
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applicaTions inForMaTion
INTVCC Regulator Bypassing and Operation
The INTVCC pin requires a capacitor for stable operation
and to store the charge for the large GATE switching cur-
rents. Choose a 10V rated low ESR, X7R or X5R ceramic
capacitor for best performance. A 4.7µF capacitor will be
adequate for many applications. Place the capacitor close
to the IC to minimize the trace length to the INTVCC pin
and also to the IC ground.
An internal current limit on the INTVCC output protects
the LT3756 from excessive on-chip power dissipation.
The minimum value of this current should be considered
when choosing the switching NMOS and the operating
frequency.
IINTVCC can be calculated from the following equation:
IINTVCC = QG • fOSC
Careful choice of a lower QG FET will allow higher switch-
ing frequencies, leading to smaller magnetics. The INTVCC
pin has its own undervoltage disable (UVLO) set to 4.1V
(typical) to protect the external FETs from excessive power
dissipation caused by not being fully enhanced. If the
INTVCC pin drops below the UVLO threshold, the GATE
and PWMOUT pins will be forced to 0V and the soft-start
pin will be reset.
If the input voltage, VIN, will not exceed 8V, then the INTVCC
pin could be connected to the input supply. Be aware that
a small current (less than 12μA) will load the INTVCC in
shutdown. If VIN is normally above, but occasionally drops
below the INTVCC regulation voltage, then the minimum
operating VIN will be close to 7V . This value is determined
by the dropout voltage of the linear regulator and the 4.5V
(4.1V typical) INTVCC undervoltage lockout threshold
mentioned above.
Programming the Turn-On and Turn-Off Thresholds
with the SHDN/UVLO Pin
The falling UVLO value can be accurately set by the resistor
divider. A small 2.1µA pull-down current is active when
SHDN/UVLO is below the threshold. The purpose of this
current is to allow the user to program the rising hysteresis.
SHDN/UVLO
LT3756
VIN
R2
375612 F01
R1
Figure 1. Resistor Connection to Set VIN
Undervoltage Shutdown Threshold
The following equations should be used to determine the
values of the resistors:
V
IN,FALLING =1.22 • R1+R2
R2
V
IN,RISING =2.1µA • R1+V
IN,FALLING
LED Current Programming
The LED current is programmed by placing an appropriate
value current sense resistor, RLED, in series with the LED
string. The voltage drop across RLED is (Kelvin) sensed
by the ISP and ISN pins. Typically, sensing of the current
should be done at the top of the LED string. If this option
is not available, then the current may be sensed at the
bottom of the string, but take caution that the minimum
ISN value does not fall below 3V, which is the lower limit of
the LED current regulation function. The CTRL pin should
be tied to a voltage higher than 1.1V to get the full-scale
100mV (typical) threshold across the sense resistor. The
CTRL pin can also be used to dim the LED current to zero,
although relative accuracy decreases with the decreasing
voltage sense threshold. When the CTRL pin voltage is
less than 1.0V, the LED current is:
ILED =VCTRL −100mV
RLED • 10
When the CTRL pin voltage is between 1V and 1.2V the LED
current varies with CTRL, but departs from the equation
above by an increasing amount as CTRL voltage increases.
Ultimately, above CTRL = 1.2V the LED current no longer
varies with CTRL. At CTRL = 1.1V, the actual value of ILED
is ~98% of the equation’s estimate.
LT3756/LT3756-1/LT3756-2
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applicaTions inForMaTion
When VCTRL is higher than 1.2V, the LED current is regu-
lated to:
ILED =100mV
RLED
The LED current programming feature can increase total
dimming range by a factor of 10. The CTRL pin should
not be left open (tie to VREF if not used). The CTRL pin
can also be used in conjunction with a thermistor to
provide overtemperature protection for the LED load, or
with a resistor divider to VIN to reduce output power and
switching current when VIN is low. The presence of a time
varying differential voltage signal (ripple) across ISP and
ISN at the switching frequency is expected. The amplitude
of this signal is increased by high LED load current, low
switching frequency and/or a smaller value output filter
capacitor. Some level of ripple signal is acceptable: the
compensation capacitor on the VC pin filters the signal so
the average difference between ISP and ISN is regulated
to the user-programmed value. Ripple voltage amplitude
(peak-to-peak) in excess of 20mV should not cause mis-
operation, but may lead to noticeable offset between the
average value and the user-programmed value.
Programming Output Voltage (Constant-Voltage
Regulation) or Open LED/Overvoltage Threshold
For a boost or SEPIC application, the output voltage can
be set by selecting the values of R3 and R4 (see Figure 2)
according to the following equation:
VOUT =1.25 • R3 +R4
R4
For a boost type LED driver, set the resistor from the output
to the FB pin such that the expected VFB during normal
FB
LT3756
VIN
R4
375612 F02
R3
Figure 2. Feedback Resistor Connection
for Boost or SEPIC LED Drivers
FB
LT3756 100k
VOUT
R4
375612 F03
R3
LED
ARRAY
RSEN(EXT)
COUT
+
–
Figure 3. Feedback Resistor Connection for
Buck Mode or Buck-Boost Mode LED Driver
operation will not exceed 1.1V. For an LED driver of buck or
a buck-boost configuration, the output voltage is typically
level-shifted to a signal with respect to GND as illustrated
in Figure 3. The output can be expressed as:
VOUT =VBE +1.25 • R3
R4
ISP/ISN Short-Circuit Protection Feature (for SEPIC)
The ISP and ISN pins have a protection feature indepen-
dent of the LED current sense feature that operates at
ISN below 3V. The purpose of this feature is to provide
continuous current sensing when ISN is below the LED
current sense common mode range (during start-up or
an output short-circuit fault) to prevent the development
of excessive switching currents that could damage the
power components in a SEPIC converter. The action
threshold (150mV, typ) is above the default LED current
sense threshold, so that no interference will occur over
the ISN voltage range where these two functions overlap.
This feature acts in the same manner as SENSE current
limit— it prevents GATE from going high (switch turn-on)
until the ISP/ISN difference falls below the threshold. If the
load has appreciable series inductance, use of a Schottky
clamp from GND to ISN is recommended for the SEPIC
to prevent excessive current flowing from the ISN pin in
a fault.
Dimming Control
There are two methods to control the current source for
dimming using the LT3756. One method uses the CTRL
pin to adjust the current regulated in the LEDs. A second
LT3756/LT3756-1/LT3756-2
13
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applicaTions inForMaTion
method uses the PWM pin to modulate the current source
between zero and full current to achieve a precisely pro-
grammed average current. To make PWM dimming more
accurate, the switch demand current is stored on the VC
node during the quiescent phase when PWM is low. This
feature minimizes recovery time when the PWM signal goes
high. To further improve the recovery time, a disconnect
switch may be used in the LED current path to prevent the
ISP node from discharging during the PWM signal low
phase. The minimum PWM on or off time will depend on
the choice of operating frequency and external component
selection. With operation in discontinuous conduction
mode (DCM), regulated current pulses as short as 1µs are
achievable. But, the best overall combination of PWM and
analog dimming (with CTRL) is available if the minimum
PWM pulse is at least six switching cycles.
Programming the Switching Frequency
The RT frequency adjust pin allows the user to program
the switching frequency from 100kHz to 1MHz to optimize
efficiency/performance or external component size. Higher
frequency operation yields smaller component size but
increases switching losses and gate driving current, and
may not allow sufficiently high or low duty cycle operation.
Lower frequency operation gives better performance at the
cost of larger external component size. For an appropriate
RT resistor value see Table 1. An external resistor from the
RT pin to GND is required—do not leave this pin open.
Table 1. Switching Frequency vs RT Value
fOSC (kHz) RT (kΩ)
1000 10.0
900 11.8
800 13.0
700 15.4
600 17.8
500 21.0
400 26.7
300 35.7
200 53.6
100 100
Duty Cycle Considerations
Switching duty cycle is a key variable defining converter
operation, therefore, its limits must be considered when
programming the switching frequency for a particular
application. The fixed minimum on-time and minimum
off-time (see Figure 4) and the switching frequency define
the minimum and maximum duty cycle of the switch,
respectively. The following equations express the mini-
mum/maximum duty cycle:
Min Duty Cycle = (minimum on-time) • switching fre-
quency
Max Duty Cycle = 1 – (minimum off-time) • switching
frequency
When calculating the operating limits, the typical values
for on/off-time in the data sheet should be increased by
at least 60ns to allow margin for PWM control latitude,
GATE rise/fall times and SW node rise/fall times.
0
100
200
300
50
150
250
375612 F04
TIME (ns)
TEMPERATURE (°C)
–50 0 50 75
–25 25 100 150125
MINIMUM ON-TIME
MINIMUM OFF-TIME
CGATE = 3300pF
Figure 4. Typical Minimum On and Off
Pulse Width vs Temperature
Thermal Considerations
The LT3756 series is rated to a maximum input voltage
of 100V. Careful attention must be paid to the internal
power dissipation of the IC at higher input voltages to
ensure that a junction temperature of 125°C (150°C for
H-grade) is not exceeded. This junction limit is especially
LT3756/LT3756-1/LT3756-2
14
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applicaTions inForMaTion
important when operating at high ambient temperatures.
The majority of the power dissipation in the IC comes from
the supply current needed to drive the gate capacitance of
the external power MOSFET. This gate drive current can
be calculated as:
IGATE = fSW • QG
A low QG power MOSFET should always be used when op-
erating at high input voltages, and the switching frequency
should also be chosen carefully to ensure that the IC does
not exceed a safe junction temperature. The internal junc-
tion temperature of the IC can be estimated by:
TJ = TA + [VIN (IQ + fSW • QG) • θJA]
where TA is the ambient temperature, IQ is the quiescent
current of the part (maximum 1.5mA) and θJA is the
package thermal impedance (68°C/W for the 3mm × 3mm
QFN package). For example, an application with TA(MAX)
= 85°C, VIN(MAX) = 60V, fSW = 400kHz, and having a FET
with QG = 20nC, the maximum IC junction temperature
will be approximately:
TJ = 85°C + [60V (1.5mA + 400kHz • 20nC) • 68°C/W]
= 124°C
The exposed pad on the bottom of the package must be
soldered to a ground plane. This ground should then be
connected to an internal copper ground plane with thermal
vias placed directly under the package to spread out the
heat dissipated by the IC.
If LT3756 junction temperature reaches 165°C, the GATE
and PWMOUT pins will be driven to GND and the soft-
start (SS) pin will be discharged to GND. Switching will
be enabled after device temperature is reduced 10°C. This
function is intended to protect the device during momentary
thermal overload conditions.
Frequency Synchronization (LT3756-1 Only)
The LT3756-1 switching frequency can be synchronized to
an external clock using the SYNC pin. For proper operation,
the RT resistor should be chosen for a switching frequency
20% lower than the external clock frequency. The SYNC
pin is disabled during the soft-start period.
Observation of the following guidelines about the SYNC
waveform will ensure proper operation of this feature.
Driving SYNC with a 50% duty cycle waveform is always
a good choice, otherwise, maintain the duty cycle between
20% and 60%. When using both PWM and SYNC features,
the PWM signal rising edge should occur at least 200ns
before the SYNC rising edge (VIH) for optimal PWM
performance. If the SYNC pin is not used, it should be
connected to GND.
Open LED Detection (LT3756 and LT3756-2)
The LT3756 and LT3756-2 provide an open-collector status
pin, OPENLED, that pulls low when the FB pin is within
~50mV of its 1.25V regulated voltage. If the open LED
clamp voltage is programmed correctly using the FB pin,
then the FB pin should never exceed 1.1V when LEDs are
connected, therefore, the only way for the FB pin to be
within 50mV of the regulation voltage is for an open LED
event to have occurred. The key difference between the
LT3756 and LT3756-2 is the behavior of the OPENLED pin
when the FB pin crosses and re-crosses the FB overvoltage
threshold at 1.31V (typ). The LT3756-2 asserts/de-asserts
OPENLED freely when crossing the 1.31V threshold.
The LT3756, by comparison, de-asserts OPENLED when
FB exceeds 1.31V and is prevented from re-asserting
OPENLED until the FB pin falls below the 1.2V (typ) open
LED threshold and clears the fault. The LT3756-2 has the
more general purpose behavior and is recommended for
applications using OPENLED.
Input Capacitor Selection
The input capacitor supplies the transient input current for
the power inductor of the converter and must be placed
and sized according to the transient current requirements.
The switching frequency, output current and tolerable input
voltage ripple are key inputs to estimating the capacitor
value. An X7R type ceramic capacitor is usually the best
choice since it has the least variation with temperature
and DC bias. Typically, boost and SEPIC converters re-
quire a lower value capacitor than a buck mode converter.
Assuming that a 100mV input voltage ripple is acceptable,
the required capacitor value for a boost converter can be
estimated as follows:
CIN(µF)=ILED (A)• VOUT
VIN
• tSW (µs)• 1µF
A •µs
LT3756/LT3756-1/LT3756-2
15
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applicaTions inForMaTion
Therefore, a 4.7µF capacitor is an appropriate selection
for a 400kHz boost regulator with 12V input, 48V output
and 1A load.
With the same VIN voltage ripple of 100mV, the input capaci-
tor for a buck converter can be estimated as follows:
CIN(µF)=ILED (A)• tSW (µs)• 4.7µF
A •µs
A 10µF input capacitor is an appropriate selection for a
400kHz buck mode converter with a 1A load.
In the buck mode configuration, the input capacitor has
large pulsed currents due to the current returned through
the Schottky diode when the switch is off. In this buck
converter case it is important to place the capacitor as close
as possible to the Schottky diode and to the GND return
of the switch (i.e., the sense resistor). It is also important
to consider the ripple current rating of the capacitor. For
best reliability, this capacitor should have low ESR and
ESL and have an adequate ripple current rating. The RMS
input current for a buck mode LED driver is:
IIN(RMS) =ILED • 1– D
( )
• D
where D is the switch duty cycle.
Table 2. Recommended Ceramic Capacitor Manufacturers
MANUFACTURER WEB
TDK www.tdk.com
Kemet www.kemet.com
Murata www.murata.com
Taiyo Yuden www.t-yuden.com
Output Capacitor Selection
The selection of the output capacitor depends on the load
and converter configuration, i.e., step-up or step-down
and the operating frequency. For LED applications, the
equivalent resistance of the LED is typically low and the
output filter capacitor should be sized to attenuate the
current ripple. Use of an X7R type ceramic capacitor is
recommended.
To achieve the same LED ripple current, the required filter
capacitor is larger in the boost and buck-boost mode ap-
plications than that in the buck mode applications. Lower
operating frequencies will require proportionately higher
capacitor values.
Soft-Start Capacitor Selection
For many applications, it is important to minimize the
inrush current at start-up. The built-in soft-start circuit
significantly reduces the start-up current spike and output
voltage overshoot. The soft-start interval is set by the soft-
start capacitor selection according to the equation:
TSS =CSS •2V
10µA
A typical value for the soft-start capacitor is 0.01µF. The
soft-start pin reduces the oscillator frequency and the
maximum current in the switch. The soft-start capacitor
is discharged when SHDN/UVLO falls below its threshold,
during an overtemperature event or during an INTVCC
undervoltage event. During start-up with SHDN/UVLO,
charging of the soft-start capacitor is enabled after the
first PWM high period.
Power MOSFET Selection
For applications operating at high input or output voltages,
the power NMOS FET switch is typically chosen for drain
voltage VDS rating and low gate charge QG. Consideration
of switch on-resistance, RDS(ON), is usually secondary be-
cause switching losses dominate power loss. The INTVCC
regulator on the LT3756 has a fixed current limit to protect
the IC from excessive power dissipation at high VIN, so the
FET should be chosen so that the product of QG at 7V and
switching frequency does not exceed the INTVCC current
limit. For driving LEDs be careful to choose a switch with
a VDS rating that exceeds the threshold set by the FB pin
in case of an open-load fault. Several MOSFET vendors
are listed in Table 3. The MOSFETs used in the application
circuits in this data sheet have been found to work well
with the LT3756. Consult factory applications for other
recommended MOSFETs.
Table 3. MOSFET Manufacturers
VENDOR WEB
Vishay Siliconix www.vishay.com
Fairchild www.fairchildsemi.com
International Rectifier www.irf.com
LT3756/LT3756-1/LT3756-2
16
375612fb
Schottky Rectifier Selection
The power Schottky diode conducts current during the
interval when the switch is turned off. Select a diode rated
for the maximum SW voltage. If using the PWM feature for
dimming, it is important to consider diode leakage, which
increases with the temperature, from the output during the
PWM low interval. Therefore, choose the Schottky diode
with sufficiently low leakage current. Table 4 has some
recommended component vendors.
Table 4. Schottky Rectifier Manufacturers
VENDOR WEB
On Semiconductor www.onsemi.com
Diodes, Inc. www.diodes.com
Central Semiconductor www.centralsemi.com
Sense Resistor Selection
The resistor, RSENSE, between the source of the exter-
nal NMOS FET and GND should be selected to provide
adequate switch current to drive the application without
exceeding the 108mV (typical) current limit threshold on
the SENSE pin of LT3756. For buck mode applications,
select a resistor that gives a switch current at least 30%
greater than the required LED current. For buck mode,
select a resistor according to:
RSENSE,BUCK ≤0.07V
ILED
For buck-boost, select a resistor according to:
RSENSE,BUCK-BOOST ≤VIN • 0.07V
VIN +VLED
( )
ILED
For boost, select a resistor according to:
RSENSE,BOOST ≤VIN • 0.07V
V
LED • ILED
The placement of RSENSE should be close to the source of
the NMOS FET and GND of the LT3756. The SENSE input
to LT3756 should be a Kelvin connection to the positive
terminal of RSENSE.
These equations provide an estimate of the sense resistor
value based on reasonable assumptions about induc-
tor current ripple during steady state switching. Lower
values of sense resistor may be required in applications
where inductor ripple current is higher. Examples include
applications with current limited operation at high duty
cycle, and those with discontinuous conduction mode
(DCM) switching. It is always prudent to verify the peak
inductor current in the application to ensure the sense
resistor selection provides margin to the SENSE current
limit threshold.
Inductor Selection
The inductor used with the LT3756 should have a saturation
current rating appropriate to the maximum switch current
selected with the RSENSE resistor. Choose an inductor value
based on operating frequency, input and output voltage to
provide a current mode ramp on SENSE during the switch
on-time of approximately 20mV magnitude. The following
equations are useful to estimate the inductor value for
continuous conduction mode operation:
LBUCK =RSENSE • VLED VIN – VLED
( )
VIN • 0.02V • fOSC
LBUCK-BOOST =RSENSE • VLED • VIN
V
LED +VIN
( )
• 0.02V • fOSC
LBOOST =RSENSE • VIN VLED – VIN
( )
VLED • 0.02V • fOSC
Table 5 provides some recommended inductor vendors.
Table 5. Inductor Manufacturers
VENDOR WEB
Sumida www.sumida.com
Würth Elektronik www.we-online.com
Coiltronics www.cooperet.com
Vishay www.vishay.com
Coilcraft www.coilcraft.com
applicaTions inForMaTion
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Loop Compensation
The LT3756 uses an internal transconductance error ampli-
fier whose VC output compensates the control loop. The
external inductor, output capacitor and the compensation
resistor and capacitor determine the loop stability.
The inductor and output capacitor are chosen based on
performance, size and cost. The compensation resistor
and capacitor at VC are selected to optimize control loop
response and stability. For typical LED applications, a
2.2nF compensation capacitor at VC is adequate, and
a series resistor should always be used to increase the
slew rate on the VC pin to maintain tighter regulation of
LED current during fast transients on the input supply to
the converter.
Board Layout
The high speed operation of the LT3756 demands careful
attention to board layout and component placement. The
exposed pad of the package is the only GND terminal of
the IC and is also important for thermal management of
the IC. It is crucial to achieve a good electrical and thermal
contact between the exposed pad and the ground plane of
the board. To reduce electromagnetic interference (EMI), it
is important to minimize the area of the high dV/dt switching
node between the inductor, switch drain and anode of the
Schottky rectifier. Use a ground plane under the switching
node to eliminate interplane coupling to sensitive signals.
The lengths of the high dI/dt traces: 1) from the switch
node through the switch and sense resistor to GND, and
2) from the switch node through the Schottky rectifier and
filter capacitor to GND should be minimized. The ground
points of these two switching current traces should come
to a common point then connect to the ground plane under
the LT3756. Likewise, the ground terminal of the bypass
capacitor for the INTVCC regulator should be placed near
the GND of the switching path. Typically, this requirement
will result in the external switch being closest to the IC,
along with the INTVCC bypass capacitor. The ground for
the compensation network and other DC control signals
should be star connected to the underside of the IC. Do
not extensively route high impedance signals such as FB
and VC, as they may pick up switching noise. In particular,
avoid routing FB and PWMOUT in parallel for more than a
few millimeters on the board. Likewise, minimize resistance
in series with the SENSE input to avoid changes (most
likely reduction) to the switch current limit threshold.
LT3756/LT3756-1/LT3756-2
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4
CSS
3 2 1
9
M1
GNDVIN
CIN
L1 10 11 12
13
14
15
16
8
7
6
5
4
3
3
2
1
5
6
1
2
RSENSE
7
8
CC
PWM
VREF
CTRL
RC
VOUT VIA
VIAS TO GROUND PLANE
OPENLED
x
x
RT
R2
R1
R3
R4
RLED
375612 F05
LED+
LED–
M2
COUT
COUT
D1
COMPONENT DESIGNATIONS REFER TO “30W WHITE LED HEADLAMP DRIVER WITH THERMAL DERATING” SCHEMATIC
CVCC
Figure 5. Boost Converter Suggested Layout
LT3756/LT3756-1/LT3756-2
19
375612fb
Typical applicaTions
30W White LED Headlamp Driver with Thermal Derating
V(ISP – ISN) Threshold vs Temperature
for NTC Resistor Divider
VIN
LT3756-2
L1, 22µH D1
GNDVCINTVCC
SHDN/UVLO FB
VREF ISP
16.9k
100k
INTVCC
R1
1M
CIN
4.7µF
CC
0.001µF
CSS
0.01µF
VIN 8V TO 60V
(100V TRANSIENT)
R2
185k
RC
10k
RT
28.7k
375kHz
M1: VISHAY SILICONIX Si7454DP
D1: DIODES INC PDS5100
L1: COILTRONICS DR127-220
RT1: MURATA NCP18WM104J
M2: VISHAY SILICONIX Si2328DS
CVCC
4.7µF
SEE SUGGESTED LAYOUT, FIGURE 5
100k
NTC
RT1
CTRL
RSENSE
0.018Ω
RLED
0.27Ω
R3
1M
M1
M2
R4
14k
370mA
COUT
4.7µF
30W LED STRING
375612 TA02a
OPENLED
PWM
SS
RT
ISN
GATE
SENSE
PWMOUT
TEMPERATURE (°C)
25
0
V(ISP – ISN) THRESHOLD (mV)
40
80
45 65 10585
120
20
60
100
125
375512 TA02b
LT3756/LT3756-1/LT3756-2
20
375612fb
Typical applicaTions
Buck-Boost Mode LED Driver
VIN
LT3756-2
L1
68µH
GNDVCINTVCC
SHDN/UVLO FB
VREF ISP
1M
0.1µF
VIN
9V TO
65V
VIN
VIN
VOUT
L1: COILCRAFT MSS1038-683
D1: ON SEMICONDUCTOR MBRS3100T3
M1: VISHAY SILICONIX Si2328DS
M2: ZETEX ZXM6IP03F
Q1: ZETEX FMMT493
185k
35.7k
300kHz 39k
4700pF
C2
2.2µF
10V
CTRL
1.5k
1k
1M
Q1
M2
13k
1Ω
M1
0.068Ω
D1
C3
4.7µF
375612 TA03a
OPENLED
PWM
SS
RT
ISN
GATE
SENSE
PWMOUT
C1
4.7µF 1µF
100V
24V TO 32V
LED STRING
100mA
100k
INTVCC
Efficiency vs VIN
90% Efficient, 20W SEPIC LED Driver
Efficiency vs VIN
VIN
LT3756-2
L1A
33µH
1:1
GNDVCINTVCC
SHDN/UVLO FB
VREF
ISP
100k
INTVCC
1M
C1
4.7µF
100V
0.001µF
0.01µF
L1: COILCRAFT MSD1278T-333
M1: VISHAY SILICONIX Si7430DP
D1: ON SEMICONDUCTOR MBRS3200T
M2: ZETEX ZXM61N03F
VIN
8V TO
80V
185k 25k
L1B
30k
28.7k
400kHz C2
4.7µF
10V
CTRL
0.033Ω
0.1Ω
511k
M2
M1
1A
D1
C4
1µF
C3
10µF
s2
35V
20W
LED
STRING
375612 TA04a
OPENLED
PWM
SS
RT
ISN
GATE
SENSE
PWMOUT
VIN (V)
0
50
EFFICIENCY (%)
60
70
80
90
100
20 40 60
375612 TA03b
80
VIN (V)
0
80
EFFICIENCY (%)
84
88
92
96
100
20 40 60
375612 TA04b
80
LT3756/LT3756-1/LT3756-2
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MSE Package
16-Lead Plastic MSOP, Exposed Die Pad
(Reference LTC DWG # 05-08-1667 Rev A)
package DescripTion
MSOP (MSE16) 0608 REV A
0.53 p 0.152
(.021 p .006)
SEATING
PLANE
0.18
(.007)
1.10
(.043)
MAX
0.17 –0.27
(.007 – .011)
TYP
0.86
(.034)
REF
0.50
(.0197)
BSC
16
16151413121110
12345678
9
9
18
NOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
0.254
(.010) 0o – 6o TYP
DETAIL “A”
DETAIL “A”
GAUGE PLANE
5.23
(.206)
MIN
3.20 – 3.45
(.126 – .136)
0.889 p 0.127
(.035 p .005)
RECOMMENDED SOLDER PAD LAYOUT
0.305 p 0.038
(.0120 p .0015)
TYP
0.50
(.0197)
BSC
BOTTOM VIEW OF
EXPOSED PAD OPTION
2.845 p 0.102
(.112 p .004)
2.845 p 0.102
(.112 p .004)
4.039 p 0.102
(.159 p .004)
(NOTE 3)
1.651 p 0.102
(.065 p .004)
1.651 p 0.102
(.065 p .004)
0.1016 p 0.0508
(.004 p .002)
3.00 p 0.102
(.118 p .004)
(NOTE 4)
0.280 p 0.076
(.011 p .003)
REF
4.90 p 0.152
(.193 p .006)
MSE Package
16-Lead Plastic MSOP, Exposed Die Pad
(Reference LTC DWG # 05-08-1667 Rev A)
DETAIL “B”
DETAIL “B”
CORNER TAIL IS PART OF
THE LEADFRAME FEATURE.
FOR REFERENCE ONLY
NO MEASUREMENT PURPOSE
0.12 REF
0.35
REF
LT3756/LT3756-1/LT3756-2
22
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package DescripTion
UD Package
16-Lead Plastic QFN (3mm × 3mm)
(Reference LTC DWG # 05-08-1691)
3.00 ± 0.10
(4 SIDES)
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
1.45 ± 0.05
(4 SIDES)
NOTE:
1. DRAWING CONFORMS TO JEDEC PACKAGE OUTLINE MO-220 VARIATION (WEED-2)
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION
ON THE TOP AND BOTTOM OF PACKAGE
PIN 1
TOP MARK
(NOTE 6)
0.40 ± 0.10
BOTTOM VIEW—EXPOSED PAD
1.45 ± 0.10
(4-SIDES)
0.75 ± 0.05 R = 0.115
TYP
0.25 ± 0.05
1
PIN 1 NOTCH R = 0.20 TYP
OR 0.25 × 45° CHAMFER
15 16
2
0.50 BSC
0.200 REF
2.10 ± 0.05
3.50 ± 0.05
0.70 ±0.05
0.00 – 0.05
(UD16) QFN 0904
0.25 ±0.05
0.50 BSC
PACKAGE OUTLINE
LT3756/LT3756-1/LT3756-2
23
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Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
revision hisTory
REV DATE DESCRIPTION PAGE NUMBER
B 03/10 Revised Entire Data Sheet to Include H-Grade 1-24
(Revision history begins at Rev B)
LT3756/LT3756-1/LT3756-2
24
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Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com
LINEAR TECHNOLOGY CORPORATION 2008
LT 0310 REV B • PRINTED IN USA
relaTeD parTs
Typical applicaTion
Buck Mode 1A LED Driver with High Dimming Ratio and Open LED Reporting Efficiency vs VIN
PART NUMBER DESCRIPTION COMMENTS
LT3474 36V, 1A (ILED), 2MHz, Step-Down LED Driver VIN: 4V to 36V, VOUT(MAX) = 13.5V, True Color PWM Dimming = 400:1,
ISD < 1µA, TSSOP16E Package
LT3475 Dual 1.5A (ILED), 36V, 2MHz Step-Down LED Driver VIN: 4V to 36V, VOUT(MAX) = 13.5V, True Color PWM Dimming = 3000:1,
ISD < 1µA, TSSOP20E Package
LT3476 Quad Output 1.5A, 36V, 2MHz High Current LED Driver
with 1000:1 Dimming VIN: 2.8V to 16V, VOUT(MAX) = 36V, True Color PWM Dimming = 1000:1,
ISD < 10µA, 5mm × 7mm QFN Package
LT3477 3A, 42V, 3MHz Boost, Buck-Boost, Buck LED Driver VIN: 2.5V to 25V, VOUT(MAX) = 40V, Dimming = Analog/PWM, ISD < 1µA,
QFN and TSSOP20E Packages
LT3478/LT3478-1 4.5A, 42V, 2.5MHz High Current LED Driver with
3000:1 Dimming VIN: 2.8V to 36V, VOUT(MAX) = 42V, True Color PWM Dimming = 3000:1,
ISD < 3µA, TSSOP16E Package
LT3486 Dual 1.3A, 2MHz High Current LED Driver VIN: 2.5V to 24V, VOUT(MAX) = 36V, True Color PWM Dimming = 1000:1,
ISD < 1µA, 5mm × 3mm DFN and TSSOP16E Packages
LT3496 Triple 0.75A, 2.1MHz, 45V LED Driver VIN: 3V to 30V, VOUT(MAX) = 45V, Dimming = 3000:1, ISD < 1µA,
4mm × 5mm QFN and TSSOP16E Packages
LT3517 1.5A, 2.5MHz, 45V LED Driver VIN: 3V to 30V, VOUT(MAX) = 45V, Dimming = 3000:1, ISD < 1µA,
4mm × 4mm QFN and TSSOP16E Packages
LT3518 2.3A, 2.5MHz, 45V LED Driver VIN: 3V to 30V, VOUT(MAX) = 45V, Dimming = 3000:1, ISD < 1µA,
4mm × 4mm QFN and TSSOP16E Packages
LT3755/LT3755-1/
LT3755-2 40VIN, 75VOUT, Full Featured LED Controller VIN: 4.5V to 40V, VOUT(MAX) = 75V, True Color PWM Dimming = 3000:1,
ISD < 1µA, 3mm × 3mm QFN-16 and MS16E Packages
LTC
®
3783 High Current LED Controller VIN: 3V to 36V, VOUT(MAX) = Ext FET, True Color PWM Dimming = 3000:1,
ISD < 20µA, 5mm × 4mm QFN10 and TSSOP16E Packages
VIN
LT3756-2
GNDVC INTVCC
SHDN/UVLO
FB
VREF
VIN
INTVCC
ISP
0.001µF
0.1µF
VIN
24V TO
80V
28.7k
375kHz 47k
100k
C2
4.7µF
CTRL
0.033Ω
0.1Ω
M1
C3
4.7µF
s5
25V
C4
4.7µF
L1
33µH D1
1A
375612 TA05a
OPENLED
PWM
SS
RT
ISN
GATE
PWMOUT
SENSE
1M
61.9k
M1: VISHAY SILICONIX Si3430DV
D1: DIODES INC B1100/B
L1: WÜRTH 74456133
M2: VISHAY SILICONIX Si5435BDC
Q1: ZETEX FMMT493
Q2: ZETEX FMMT593
C1
1µF
s2200k
20k
5 WHITE LEDs
20W
200k 200k
1k
1.5k
Q1
Q2
M2
VIN (V)
20
80
EFFICIENCY (%)
84
88
92
96
100
40 60
375612 TA05b
80
30 50 70
PWM Dimming Waveforms
10µs/DIV
0A
ILED
1A
VSW
50V/DIV
VPWM
375612 TA05c