September 2001
&RS\ULJKW$OOLDQFH6HPLFRQGXFWRU$OOULJKWVUHVHUYHG
AS7C513
AS7C3513
5V/3.3V 32K×16 CMOS SRAM
Y $OOLDQFH6HPLFRQGXFWRU 3RI
)HDWXUHV
• AS7C513 (5V version)
• AS7C3513 (3.3V version)
• Industrial and commercial temperature
• Organization: 32,768 words × 16 bits
• Center power and ground pins
•High speed
- 12/15/20 ns address access time
- 6, 7, 8 ns output enable access time
• Low power consumption: ACTIVE
- 800 mW (AS7C513) / max @ 12 ns
- 432 mW (AS7C3513) / max @ 12 ns
• Low power consumption: STANDBY
- 28 mW (AS7C513) / max CMOS
- 18 mW (AS7C3513) / max CMOS
• Easy memory expansion with CE , OE inputs
• TTL-compatible, three-state I/O
• 44-pin JEDEC standard package
- 400 mil SOJ
- 400 mil TSOP 2
• ESD protection ≥ 2000 volts
• Latch-up current ≥ 200 mA
/RJLFEORFNGLDJUDP
32K × 16
Array
OE
CE
WE Column decoder
Row decoder
A0
A1
A2
A3
A4
A5
A7
VCC
GND
A8
A9
A10
A11
A12
A13
A14
Control circuit
I/O0–I/O7
I/O8–I/O15
UB
LB
I/O
buffer
A6
3LQDUUDQJHPHQW
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
I/O13
I/O12
GND
VCC
I/O11
I/O10
I/O9
I/O8
NC
A7
A8
A9
A10
NC
A0
CE
I/O0
I/O1
I/O2
I/O3
VCC
GND
I/O4
I/O5
I/O6
I/O7
WE
A14
A13
A12
44-Pin SOJ, TSOP 2 (400 mil)
21
22
A11
NC
UB
LB
I/O15
I/O14
2A3 3A2 4A1
1NC
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
43
42
41
44 A5
A6
OE
A4
AS7C513
AS7C3513
6HOHFWLRQJXLGH
-12 -15 -20 Unit
Maxi mum address access time 12 15 20 ns
Maximum output enable access time 5 7 9 ns
Maximum operating current AS7C513 160 150 140 mA
AS7C3513 120 110 100 mA
Maximum CMOS standby current AS7C513 5 5 5 mA
AS7C3513 5 5 5 mA
$6&
$6&
Y $OOLDQFH6HPLFRQGXFWRU 3RI
)XQFWLRQDOGHVFULSWLRQ
The AS7C513 and the AS7C3513 are high performance CMOS 524,288-bit Static Random Access Memory (SRAM) devices organized as
32,768 words × 16 bits. They are designed for memory applications where fast data access, low power, and simple interfacing are desired.
Equal address access and cycle times (tAA, tRC, tWC) of 12/15/20 ns with output enable access times (tOE) of 6, 7, 8 ns are ideal for high
performance applications. The chip enable input CE permits easy memory expansion with multiple-bank memory systems.
When C E is high, the de vices enter standby mode . The AS7C513 and AS7C3513 are guaranteed not to exceed 28/18 mW power consumption
in CM OS standby mode.
A write cycle is accomplished by asserting write enable (WE), (UB) and/or (LB), and chip enable (CE). Data on the input pins I/O0-I/O7,
and/or I/O8–I/O15, is written on the rising edge of WE (write cycle 1) or CE (write cycle 2). To avoid bus contention, external devices
should drive I/O pins only after outputs have been disabled with output enable (OE ) or write enable (WE).
A read cycle is accompli shed by assert ing output enable (OE), ( UB) and (LB), and c hip e nable (C E), with wri te enable (WE) high. The chips
drive I/O pins with the data word referenced by the input address. When either chip enable or output enable is inactive, or write enable is
active , or (UB) and (LB ), output drivers stay in high-impedance mode.
The devices provide multiple center power and ground pins, and separate byte enable controls, allowing individual bytes to be written and
read. LB controls the lower bits, I/O0–I/O7, and UB c ontrols the higher bits, I/O8–I/O15.
All chip inputs and outputs are TTL-compatible. The AS7C513 and AS7C3513 are packaged in common industry standard pac k ages.
$EVROXWHPD[LPXPUDWLQJV
NOTE: Stresses gre ater than those listed u nder Absolute Maxim um Rat ings ma y cause permanent damage to the de vice . T his is a st re ss rating only and functional oper-
ation of the device at these or any other conditions outside those indicated in the operational sections of this specification i s not implied. Exposure to absolute
maximum rating conditions fo r e xtended periods may affect reliability.
7UXWKWDEOH
Key: X = Don’t care; L = Low; H = High
Parameter Device Symbol Min Max Unit
Voltage on VCC relative to GND AS7C513 Vt1 –0.50 +7.0 V
AS7C3513 Vt1 –0.50 +5.0 V
Vol tage on any pin relative to GND Vt2 –0.50 VCC +0.50 V
Power diss ipa tion PD–1.0W
Stor age tem p erature ( plastic ) Tstg –65 +150 o C
Ambient temperature with VCC applied Tbias –55 +125 o C
DC current into outputs (low) IOUT –50mA
CE WE OE LB UB I/O0–I/O7 I/O8–I/O15 Mode
HXXXXHigh ZHigh ZStandby (I
SB, ISBI)
LHLLHD
OUT High Z Read I/O0–I/ O7 (ICC)
LHLHLHigh ZD
OUT Read I/O8–I/O15 (ICC)
LHLLLD
OUT DOUT Read I/ O0–I /O15 (ICC)
LLXLLD
IN DIN Write I/O0–I/O15 (ICC)
LLXLHD
IN High Z Write I/O0–I/O7 (ICC)
LLXHLHigh ZD
IN Write I/O8–I/O15 (ICC)
L
LH
XH
XX
HX
HHigh Z High Z Output disable (ICC)
$6&
$6&
Y $OOLDQFH6HPLFRQGXFWRU 3RI
5HFRPPHQGHGRSHUDWLQJFRQGLWLRQV
† VIL min = –3.0V f o r pulse width less than tRC/2.
'&RSHUDWLQJFKDUDFWHULVWLFVRYHUWKHRSHUDWLQJUDQJH
&DSDFLWDQFHI 0+]7D R&9&& 120,1$/
Parameter Device Symbol Min Typical Max Unit
Supp ly voltage AS7C513 VCC 4.5 5.0 5.5 V
AS7C3513 VCC 3.0 3.3 3.6 V
Input voltage AS7C513 VIH 2.2 – VCC + 0.5 V
AS7C3513 VIH 2.0 – VCC + 0. 5
VIL –0.5†–0.8V
Ambient operating temperature commercial TA0– 70° C
industrial TA–40 – 05 ° C
Parameter Symbol Test conditions Device -12 -15 -20 UnitMinMaxMinMaxMinMax
Input leakage current | ILI | VCC = Max
VIN = GND to VCC –1–1–1µA
Output leakage current | ILO | VCC = Max
VOUT = GND to V CC –1–1–1µA
Operating power supply
current ICC VCC = M a x , CE ≤ VIL
f = fMax , IOUT = 0mA AS7C513 – 160 – 150 – 140 mA
AS7C3513 – 120 – 110 – 100
Standby power supply
current
ISB VCC = Max, CE ≤ VIL
f = fMax , IOUT = 0mA AS7C513 – 40 – 40 – 40 mA
AS7C3513 – 40 – 40 – 40
ISB1 VCC = Max, CE ≥ VCC–0.2V
VIN ≤ GND + 0.2V or
VIN ≥ VCC –0.2V, f = 0
AS7C513 –3–3–3
mA
AS7C3513–3–3–3
Output voltage VOL IOL = 8 m A, VCC = Min – 0.4 – 0.4 – 0.4 V
VOH IOH = –4 mA, VCC = Min 2.4 – 2 .4 – 2.4 – V
Parameter Symbol Signals Test conditions Max Unit
Input capacitance CIN A, CE, WE, OE , LB, UB Vin = 0V 5 pF
I/O capacitance CI/O I/O Vin = Vout = 0V 7 pF
$6&
$6&
Y $OOLDQFH6HPLFRQGXFWRU 3RI
5HDGF\FOHRYHUWKHRSHUDWLQJUDQJH
.H\WRVZLWFKLQJZDYHIRUPV
5HDGZDYHIRUPDGGUHVVFRQWUROOHG
Parameter Symbol -12 -15 -20 Unit NotesMin Max Min Max Min Max
Read cycle time tRC 12 – 15 – 20 – ns
Addr ess access time tAA –12–15–20ns3
Chip enable (CE) access time tACE –12–15–20ns3
Output enable (OE) access time tOE –6–7–8ns
Output hold from address change tOH 3–4–4–ns5
CE Low to output in low Z tCLZ 0 – 0 – 0 – ns 4, 5
CE High to ou tput in high Z tCHZ –6–7 –8ns4, 5
OE Low to output in low Z tOLZ 0 – 0 – 0 – ns 4, 5
Byte select access time tBA –6–7–8ns
Byte sel ec t Low to low Z tBLZ 0 – 0 – 0 – ns 4,5
Byte sel ec t High to hig h Z tBHZ –6–7–9ns4,5
OE High to output in high Z tOHZ –6–7–9ns4, 5
Power up time tPU 0 – 0 – 0 – ns 4, 5
Power down time tPD –12–15–20ns4, 5
Undefined output/don’t careFalling inputRising input
t
OH
t
AA
t
RC
t
OH
Data OUT
Address
Data v a li dPrevious data valid
$6&
$6&
Y $OOLDQFH6HPLFRQGXFWRU 3RI
5HDGZDYHIRUP&(2(8%/%FRQWUROOHG
:ULWHF\FOHRYHUWKHRSHUDWLQJUDQJH
Parameter Symbol -12 -15 -20 Unit NotesMin Max Min Max Min Max
Wr ite cycle time tWC 12 – 15 – 20 – ns
Chip enable (CE) to write end tCW 9 – 10 – 12 – ns
Address setup to write end tAW 8 – 10 – 12 – ns
Address setup time tAS 0–0–0– ns
Write pu l se width tWP 8 – 10 – 12 – ns
Wr ite recovery time tWR 0–0–0– ns
Addres s hold from end of write tAH 0–0–0– ns
Data valid to write end tDW 6–8–10– ns
Data hold time tDH 0–0–0– ns 5
Write enable to output in hi gh Z tWZ –6–7–9 ns 4, 5
Output active from write end tOW 3–3–3– ns 4, 5
Byte sel ect Low to end of write tBW 8–9–12– ns
Data valid
tRC
tAA
tBLZ tBA
tOE
tOLZ tOH
tOHZ
tHZ
tBHZ
tACE
tLZ
Address
OE
CE
LB, UB
Data OUT
$6&
$6&
Y $OOLDQFH6HPLFRQGXFWRU 3RI
:ULWHZDYHIRUP:(FRQWUROOHG
:ULWHZDYHIRUP&(FRQWUROOHG
Address
LB, UB
WE
Data IN
Data OUT
tWC
tBW
tAW
tAS tWP
tDW tDH
tOW
tWZ
Data undefined High-Z
Data vali d
tAH
tWR
Address
CE
LB, UB
WE
Data I N
tWC
tCW
tBW
tWP
tDW tDH
tOW
tWZ
tAH
Data OUT Data undefined
High-Z High-Z
tAS
tAW
Data valid
tCLZ
tWR
$6&
$6&
Y $OOLDQFH6HPLFRQGXFWRU 3RI
$&WHVWFRQGLWLRQV
1RWHV
1During V
CC power -u p, a pull-up resistor to VCC on CE is required to meet ISB specification.
2 This parameter is sampled, but not 100% tested.
3 For te st conditions, see AC Test Conditions, Figures A, B, and C.
4 These parameters are specified with CL = 5pF, as in Figures B or C. Transition is measured ±500mV from s teady-state vo l tage .
5 This parameter is guaranteed, b ut no t 100% test ed.
6WE
is High for read cycle.
7CE
and OE are Lo w for read cycle.
8 Address valid prior to or coincident with CE transit io n Low.
9 All read cycle timings are referenced from the last valid address to the first transiti oning address.
10 CE or WE must be High during address transitions . Either CE or WE asserting high terminates a write cycle.
11 All write cycle timings are referenced from the last valid address to the first transitioning address.
12 Not appl icable.
13 C=30pF, ex cept on High Z and Low Z parameters, where C=5pF.
Ω&
Ω
'RXW
*1'
9
)LJXUH&92XWSXWORDG
- Output load: see Figure B or F igure C.
- Input pulse level: GND to 3.0V. See Figure A.
- Input rise and fall times: 2 ns. See Figure A.
- Input and output timing reference levels: 1.5V.
Ω
7KHYHQLQHTXLYDOHQW
'RXW 99DQG9
Ω&
Ω
'RXW
*1'
9
)LJXUH%92XWSXWORDG




*1'
9
)LJXUH$,QSXWSXOVH
QV
$6&
$6&
Y $OOLDQFH6HPLFRQGXFWRU 3RI
7\SLFDO'&DQG$&FKDUDFWHULVWLFV
Supply volta ge (V)
MIN MAX
NOMINAL
0.0
0.2
0.6
0.8
0.4
1.0
1.2
1.4
Norma l ized ICC, ISB
Norma l ized su pply cur rent ICC, ISB
Ambient temperature (° C )
–55 80 125
35–10
0.0
0.2
0.6
0.8
0.4
1.0
1.2
1.4
Norma l ized ICC, ISB
Norma l ized su pply cur rent ICC, ISB
vs. ambient temperature Ta
vs. sup p ly voltage VCC
ICC
ISB
ICC
ISB
Ambient temperature (°C)
-55 80 125
35-10
0.2
1
0.04
5
25
625
Norma l ized I SB1 (log scale)
Normali zed supply current ISB1
vs . ambient temperature Ta
VCC = VCC(NOMINAL)
Supply voltage (V)
MIN MAX
NOMINAL
0.8
0.9
1.1
1.2
1.0
1.3
1.4
1.5
Normal ized access time
Normalized access time tAA
Ambient temperature (°C)
–55 80 125
35–10
0.8
0.9
1.1
1.2
1.0
1.3
1.4
1.5
Normal ized access time
Normalized access time tAA
Cycle frequency (MHz)
075
100
5025
0.0
0.2
0.6
0.8
0.4
1.0
1.2
1.4
Norma li zed ICC
Normalized supply current ICC
vs. ambient temperature Tavs. cycle frequency 1/tRC, 1/tWC
vs. supply voltage VCC
VCC = VCC(NOMINAL)
Ta = 25°C
VCC = VCC(NOMINAL)Ta = 25°C
Output voltag e (V) VCC
0
20
60
80
40
100
120
140
Output source current (mA)
Output source current IOH
Output voltag e (V) VCC
Output sink current (mA)
Output sink current IOL
vs. output voltage VOL
vs. output voltage VOH
0
20
60
80
40
100
120
140
VCC = VCC(NOMINAL)PL
Ta = 25°C
VCC = VCC(NOMINAL)
Ta = 25°C
Capacitance (pF)
0750 1000
500250
0
5
15
20
10
25
30
35
Change in tAA (ns )
Typical access time change ∆tAA
vs. output capacitive loading
VCC = VCC(NOMINAL)
00
$6&
$6&
Y $OOLDQFH6HPLFRQGXFWRU 3RI
3DFNDJHGLPHQVLRQV
44-pin TSOP 2
Min
(mm) Max
(mm)
A1.2
A10.05
A20.95 1.05
b0.250.45
c 0.15 (typical)
d 18.28 18.54
e 10.06 10.26
He11.56 11.96
E 0. 80 ( typ ical)
l0.400.60
d
He
1234567891011121314
44 43 42 41 40 39 38 37 36 35 34 33 32 31
15 16
30 29
17 18 19 20
28 27 26 25 c
l
A1
A2
E
44-pin TSOP 2
0–5°
21
24
22
23
e
A
b
44-pin SOJ
400 mil
Min Max
A0.128 0.148
A1 0.025 -
A2 1.105 1.115
B0.026 0.032
b0.015 0.020
c0.007 0.013
D1.120 1.130
E0.370 NOM
E1 0.395 0.405
E2 0.435 0.445
e0.050 NOM
eD
E1
Pin 1
b
B
A1 A2 c
E2
Seating
Plane
E2
A
44-pin SOJ
$6&
$6&
Y $OOLDQFH6HPLFRQGXFWRU 3RI
© Copyright Alliance Semiconductor Corporation. All rights reserved. Our three-point logo, our name and Intelliwatt are trademarks or registered trademarks of Alliance. All other brand and product names may be the trademarks
of their respective companies. Alliance reserves the right to make changes to this document and its products at any time without notice. Alliance assumes no responsibility for any errors that may appear in this document. The data
contained herein represents Alliance 's best data and/o r estimates at the time of issuanc e. Alliance reserves the r ig ht to chang e or correct this d ata at any time, without notice. If the pro duct descr ibed herein is under development,
significant c hanges to the se spec ifications are possible. The information in this product data she et is inte nded to be gener al descr iptive information for potentia l customer s and users , and is not intended to ope rate as, or provide,
any guarantee or warrantee to any user or customer. Al liance does no t assume any responsibility or liability ar ising out of the appli cation or use o f any produ ct desc ri bed he rein, a nd d isclai ms a ny express or i mpli ed war ran ties
related to the sale and/or use of Alliance p roducts including li abil ity or warranties related to fitness for a parti cular purpose, merchantability, or infri ngement of any intellect ual property rights, except as ex press agreed to in
Alliance's Terms and Conditions of Sale (which are available from Alliance). All sales of Alliance products are made exclusively according to Alliance's Terms and Conditions of Sale. The purchase of products from Alliance does not
conv e y a license under any patent rights, copyrights, mask works rights, trademarks, or any other intellectual property rights of Alliance or third parties. Alliance does not authorize its products for use as critical components in life-
supporting systems where a malfunction or failure may reasonably be expected to result in significant injury to the user, and the inclusion of Alliance products in such life-supporting systems implies that the manufacturer assumes
all risk of such use and agrees to indemnify Alliance against all claims arising from such use
2UGHULQJFRGHV
3DUWQXPEHULQJV\VWHP
P ackage\Access time Volt/Temp 12 ns 15 ns 20 ns
Plastic SOJ, 400 mil 5V commercial AS7C513-12JC AS7C513-15JC AS7C513-20JC
3.3V commercial AS7C3513-12JC AS7C3513-15JC AS7C3513-20JC
TSOP 2, 18.4×10.2 mm 5V commercial AS7C513-12TC AS7C513-15TC AS7C513-20TC
3.3V commercial AS7C3513-12TC AS7C3513-15TC AS7C3513-20TC
AS7C X 513 –XX X C
SRAM prefix Voltage:
Blank= 5V CMOS
3= 3.3V CMOS De vice number Access time Package:
J = SOJ 400 mil
T =TSOP 2 18.4×10.2 mm
Temperature range:
C = Commercial, 0°C to 70°C
I = Industrial, -40°C to 85°C