05083C104KAT4A - AVX - Datasheet.Directory

Low Inductance Capacitors

Introduction

The signal integrity characteristics of a Power Delivery

Network (PDN) are becoming critical aspects of board level

and semiconductor package designs due to higher operating

frequencies, larger power demands, and the ever shrinking

lower and upper voltage limits around low operating voltages.

These power system challenges are coming from mainstream

designs with operating frequencies of 300MHz or greater,

modest ICs with power demand of 15 watts or more, and

operating voltages below 3 volts.

The classic PDN topology is comprised of a series of

capacitor stages. Figure 1 is an example of this architecture

with multiple capacitor stages.

An ideal capacitor can transfer all its stored energy to a load

instantly. A real capacitor has parasitics that prevent

instantaneous transfer of a capacitor’s stored energy. The

true nature of a capacitor can be modeled as an RLC

equivalent circuit. For most simulation purposes, it is possible

to model the characteristics of a real capacitor with one

capacitor, one resistor, and one inductor. The RLC values in

this model are commonly referred to as equivalent series

capacitance (ESC), equivalent series resistance (ESR), and

equivalent series inductance (ESL).

The ESL of a capacitor determines the speed of energy

transfer to a load. The lower the ESL of a capacitor, the faster

that energy can be transferred to a load. Historically, there

has been a tradeoff between energy storage (capacitance)

and inductance (speed of energy delivery). Low ESL devices

typically have low capacitance. Likewise, higher capacitance

devices typically have higher ESLs. This tradeoff between

ESL (speed of energy delivery) and capacitance (energy

storage) drives the PDN design topology that places the

fastest low ESL capacitors as close to the load as possible.

Low Inductance MLCCs are found on semiconductor

packages and on boards as close as possible to the load.

LOW INDUCTANCE CHIP CAPACITORS

The key physical characteristic determining equivalent series

inductance (ESL) of a capacitor is the size of the current loop

it creates. The smaller the current loop, the lower the ESL. A

standard surface mount MLCC is rectangular in shape with

electrical terminations on its shorter sides. A Low Inductance

Chip Capacitor (LICC) sometimes referred to as Reverse

Geometry Capacitor (RGC) has its terminations on the longer

side of its rectangular shape.

When the distance between terminations is reduced, the size

of the current loop is reduced. Since the size of the current

loop is the primary driver of inductance, an 0306 with a

smaller current loop has significantly lower ESL then an 0603.

The reduction in ESL varies by EIA size, however, ESL is

typically reduced 60% or more with an LICC versus a

standard MLCC.

INTERDIGITATED CAPACITORS

The size of a current loop has the greatest impact on the ESL

characteristics of a surface mount capacitor. There is a

secondary method for decreasing the ESL of a capacitor.

This secondary method uses adjacent opposing current

loops to reduce ESL. The InterDigitated Capacitor (IDC)

utilizes both primary and secondary methods of reducing

inductance. The IDC architecture shrinks the distance

between terminations to minimize the current loop size, then

further reduces inductance by creating adjacent opposing

current loops.

An IDC is one single capacitor with an internal structure that

has been optimized for low ESL. Similar to standard MLCC

versus LICCs, the reduction in ESL varies by EIA case size.

Typically, for the same EIA size, an IDC delivers an ESL that

is at least 80% lower than an MLCC.

Slowest Capacitors Fastest Capacitors

Low Inductance Decoupling Capacitors

Semiconductor Product

Bulk Board-Level Package-Level Die-Level

Figure 1 Classic Power Delivery Network (PDN) Architecture

Low Inductance Capacitors

Introduction

LAND GRID ARRAY (LGA) CAPACITORS

Land Grid Array (LGA) capacitors are based on the first Low

ESL MLCC technology created to specifically address the

design needs of current day Power Delivery Networks (PDNs).

This is the 3rd low inductance capacitor technology

developed by AVX. LGA technology provides engineers with

new options. The LGA internal structure and manufacturing

technology eliminates the historic need for a device to be

physically small to create small current loops to minimize

inductance.

The first family of LGA products are 2 terminal devices. A

2 terminal 0306 LGA delivers ESL performance that is equal

to or better than an 0306 8 terminal IDC. The 2 terminal 0805

LGA delivers ESL performance that approaches the 0508

8 terminal IDC. New designs that would have used 8 terminal

IDCs are moving to 2 terminal LGAs because the layout is

easier for a 2 terminal device and manufacturing yield is better

for a 2 terminal LGA versus an 8 terminal IDC.

LGA technology is also used in a 4 terminal family of products

that AVX is sampling and will formerly introduce in 2008.

Beyond 2008, there are new multi-terminal LGA product

families that will provide even more attractive options for PDN

designers.

LOW INDUCTANCE CHIP ARRAYS (LICA®)

The LICA®product family is the result of a joint development

effort between AVX and IBM to develop a high performance

MLCC family of decoupling capacitors. LICA was introduced

in the 1980s and remains the leading choice of designers in

high performance semiconductor packages and high

reliability board level decoupling applications.

LICA®products are used in 99.999% uptime semiconductor

package applications on both ceramic and organic

substrates. The C4 solder ball termination option is the

perfect compliment to flip-chip packaging technology.

Mainframe class CPUs, ultimate performance multi-chip

modules, and communications systems that must have the

reliability of 5 9’s use LICA®.

LICA®products with either Sn/Pb or Pb-free solder balls are

used for decoupling in high reliability military and aerospace

applications. These LICA®devices are used for decoupling of

large pin count FPGAs, ASICs, CPUs, and other high power

ICs with low operating voltages.

When high reliability decoupling applications require the very

lowest ESL capacitors, LICA®products are the best option.

Figure 2 MLCC, LICC, IDC, and LGA technologies deliver different levels of equivalent series inductance (ESL).

470 nF 0306 Impedance Comparison

0.001

0.01

0.1

1 10 100 1000

Frequency (MHz)

Impedance (ohms)

0306 2T-LGA

0306 LICC

0306 8T-IDC

0603 MLCC

GENERAL DESCRIPTION

The key physical characteristic determining equivalent

series inductance (ESL) of a capacitor is the size of the

current loop it creates. The smaller the current loop, the

lower the ESL.

A standard surface mount MLCC is rectangular in shape

with electrical terminations on its shorter sides. A Low

Inductance Chip Capacitor (LICC) sometimes referred to

as Reverse Geometry Capacitor (RGC) has its

terminations on the longer sides of its rectangular shape.

The image on the right shows the termination differences

between an MLCC and an LICC.

When the distance between terminations is reduced, the

size of the current loop is reduced. Since the size of the

current loop is the primary driver of inductance, an 0306

with a smaller current loop has significantly lower ESL

then an 0603. The reduction in ESL varies by EIA size,

however, ESL is typically reduced 60% or more with an

LICC versus a standard MLCC.

AVX LICC products are available with a lead-free finish of

plated Nickel/Tin.

Low Inductance Capacitors (RoHS)

0612/0508/0306/0204 LICC (Low Inductance Chip Capacitors)

HOW TO ORDER

MLCC LICC

0.001

0.01

0.1

1 10 100 1000

Frequency (MHz)

Impedance (Ohms)

LICC_0612

MLCC_1206

0.001

0.01

0.1

110 100 1000

Frequency (MHz)

Impedance (Ohms)

LICC_0508

MLCC_0805

0612

Size

0204

0306

0508

0612

Voltage

4 = 4V

6 = 6.3V

Z = 10V

Y = 16V

3 = 25V

5 = 50V

Dielectric

C = X7R

D = X5R

W = X6S

Z = X7S

105

Capacitance

Code (In pF)

2 Sig. Digits +

Number of Zeros

Capacitance

Tolerance

K = ±10%

M = ±20%

Failure Rate

A = N/A

Terminations

T = Plated Ni

and Sn

Packaging

Available

2 = 7" Reel

4 = 13" Reel

Thickness

mm (in)

0.35 (0.014)

0.56 (0.022)

0.61 (0.024)

0.76 (0.030)

1.02 (0.040)

1.27 (0.050)

TYPICAL IMPEDANCE CHARACTERISTICS

PERFORMANCE CHARACTERISTICS

Capacitance Tolerances

K = ±10%; M = ±20%

Operation

X7R = -55°C to +125°C

Temperature Range

X5R = -55°C to +85°C

X7S = -55°C to +125°C

Temperature Coefficient

X7R, X5R = ±15%; X7S = ±22%

Voltage Ratings

4, 6.3, 10, 16, 25 VDC

Dissipation Factor

4V, 6.3V = 6.5% max; 10V = 5.0% max;

16V = 3.5% max; 25V = 3.0% max

Insulation Resistance

100,000MΩ min, or 1,000MΩ per

(@+25°C, RVDC)

μF min.,whichever is less

NOTE: Contact factory for availability of Termination and Tolerance Options for Specific Part Numbers.

Low Inductance Capacitors (RoHS)

0612/0508/0306/0204 LICC (Low Inductance Chip Capacitors)

SIZE 0204 0306 0508 0612

Packaging Embossed Embossed Embossed

Length mm 0.81 ± 0.15 1.27 ± 0.25 1.60 ± 0.25

(in.) (0.032 ± 0.006) (0.050 ± 0.010) (0.063 ± 0.010)

Width mm 1.60 ± 0.15 2.00 ± 0.25 3.20 ± 0.25

(in.) (0.063 ± 0.006) (0.080 ± 0.010) (0.126 ± 0.010)

WVDC 4 6.3 10 16 4 6.3 10 16 25 50 6.3 10 16 25 50 6.3 10 16 25 50

CAP 0.001

(μF) 0.0022

0.0047

0.010

0.015

0.022

0.047

0.068

0.10

0.15

0.22

0.47

0.68

1.0

1.5

2.2

3.3

4.7

0306

Code Thickness

A0.61 (0.024)

0508

Code Thickness

S0.56 (0.022)

V0.76 (0.030)

A1.02 (0.040)

0612

Code Thickness

S0.56 (0.022)

V0.76 (0.030)

W1.02 (0.040)

A1.27 (0.050)

Solid = X7R = X5R = X7S

mm (in.)

0204

Code Thickness

C0.35 (0.014)

= X6S

mm (in.) mm (in.)mm (in.)

PHYSICAL DIMENSIONS AND

PAD LAYOUT

LW t

0612 1.60 ± 0.25 3.20 ± 0.25 0.13 min.

(0.063 ± 0.010) (0.126 ± 0.010) (0.005 min.)

0508 1.27 ± 0.25 2.00 ± 0.25 0.13 min.

(0.050 ± 0.010) (0.080 ± 0.010) (0.005 min.)

0306 0.81 ± 0.15 1.60 ± 0.15 0.13 min.

(0.032 ± 0.006) (0.063 ± 0.006) (0.005 min.)

0204 0.50 ± 0.05 1.00 ± 0.05 0.18 ± 0.08

(0.020 ± 0.002) (0.040 ± 0.002) (0.007 ± 0.003)

PHYSICAL CHIP DIMENSIONS

mm (in)

“A”CC

“B”

PAD LAYOUT DIMENSIONS mm (in)

ABC

0612 0.76 (0.030) 3.05 (0.120) .635 (0.025)

0508 0.51 (0.020) 2.03 (0.080) 0.51 (0.020)

0306 0.31 (0.012) 1.52 (0.060) 0.51 (0.020)

0204

T - See Range Chart for Thickness and Codes

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AVX:

0306YC103KAT2A 0306YC103MAT2A 0306YC153KAT2A 0306YC223KAT2A 0306YC473KAT2A

0306YC683KAT2A 0306YD104KAT2A 0306ZC103KAT2A 0306ZC103MAT2A 0306ZC104KAT2A 0306ZC153KAT2A

0306ZC223KAT2A 0306ZC224KAT2A 0306ZC224MAT2A 0306ZC224MAT4A 0306ZC473KAT2A

0306ZC683KAT2A 05083C103KAT2S 05083C103MAT2A 05083C103MAT2W 05083C104KAT2A

05083C104KAT2W 05083C104MAT2A 05083C223KAT2A 05083C223KAT2S 05083C223MAT2A 05083C473KAT2V

05083C683KAT2A 05085C103MAT2A 05085C104KAT2A 05086C103KAT2S 05086C474KAT2V

05086C684KAT2A 05086D105KAT2A 05086D105MAT2A 05086D155KAT2A 0508YC103KAT2A 0508YC103KAT2S

0508YC104KAT2W 0508YC184KAT2V 0508YC224KAT2A 0508YC274KAT2A 0508ZC103KAT2A

0508ZC103KAT2S 0508ZC104KAT2A 0508ZC104KAT2S 0508ZC105KAT2A 0508ZC105MAT2W

0508ZC224KAT2S 0508ZC472KAT2V 0508ZC474KAT2A 0508ZC474KAT2V 0508ZC474MAT2A 0508ZC684KAT2A

0508ZD105KAT2A 0508ZD105MAT2A 0508ZD105MAT4A 06123C103KAT2A 06123C104KAT2A

06123C104KAT2V 06123C104MAT2A 06123C154KAT2W 06123C222KAT2V 06123C224KAT2A

06123C224KAT2W 06123C473KAT2S 06123C473MAT4U 06125C103KAT2A 06125C104MAT2A 06125C823ZAT2A

06126C103KAT2S 06126C104KAT2S 06126C105KAT2V 06126D225KAT2A 06126D335KAT2A

06126D335MAT2A 0612ZD225KAT2A 0612YC103KAT2S 0612YC104KAT2S 0612YC104KAT2V

0612YC104KAT4V 0612YC104MAT2A 0612YC105KAT2A 0612YC105MAT2A 0612YC224KAT2V

0612YC224MAT2A 0612YC473KAT2S 0612YC474KAT2V 0612YC474MAT2A 0612YC684KAT2W

0612ZC103KAT2S 0612ZC104KAT2A 0612ZC104KAT2S 0612ZC105KAT2A 0612ZC105KAT2V 0612ZC105MAT2A

0612ZC105MAT2W 0612ZC223KAT2S 0612ZC225KAT2A 0612ZC474KAT2S