VP0808 P-Channel Enhancement-Mode Vertical DMOS FETs Ordering Information BVDSS / BVDGS RDS(ON) (max) ID(ON) (min) Order Number / Package -80V 5.0 -1.1A VP0808L TO-92 Features Advanced DMOS Technology Free from secondary breakdown These enhancement-mode (normally-off) transistors utilize a vertical DMOS structure and Supertex's well-proven silicon-gate manufacturing process. This combination produces devices with the power handling capabilities of bipolar transistors and with the high input impedance and positive temperature coefficient inherent in MOS devices. Characteristic of all MOS structures, these devices are free from thermal runaway and thermally-induced secondary breakdown. Low power drive requirement Ease of paralleling Low CISS and fast switching speeds Excellent thermal stability Integral Source-Drain diode Supertex's vertical DMOS FETs are ideally suited to a wide range of switching and amplifying applications where high breakdown voltage, high input impedance, low input capacitance, and fast switching speeds are desired. High input impedance and high gain Complementary N- and P-channel devices Applications Package Options Motor controls Converters Amplifiers Switches Power supply circuits Drivers (relays, hammers, solenoids, lamps, memories, displays, bipolar transistors, etc.) Absolute Maximum Ratings SGD TO-92 Drain-to-Source Voltage BVDSS Drain-to-Gate Voltage BVDGS Gate-to-Source Voltage 30V Operating and Storage Temperature Soldering Temperature* -55C to +150C 300C Note: See Package Outline section for dimensions. * Distance of 1.6 mm from case for 10 seconds. 7-249 9 VP0808 Thermal Characteristics Package ID (continuous)* TO-92 ID (pulsed) -0.28A jc Power Dissipation -3A 1W ja C/W C/W 125 170 * ID (continuous) is limited by max rated T j. Electrical Characteristics (@ 25C unless otherwise specified) Symbol Parameter Min BVDSS Drain-to-Source Breakdown Voltage -80 VGS(th) Gate Threshold Voltage -1.0 IGSS IDSS Typ Max Unit Conditions V VGS= 0V, ID =-10A -4.5 V VGS = VDS, ID = -1mA Gate Body Leakage -100 nA VGS = 20V, VDS = 0V Zero Gate Voltage Drain Current -10 VGS = 0V, VDS = Max Rating -500 A A VGS = -10V, VDS = -15V 5.0 VGS = -10V, ID = -1A ON-State Drain Current RDS(ON) Static Drain-to-Source ON-State Resistance -1.1 GFS Forward Transconductance CISS Input Capacitance 150 COSS Common Source Output Capacitance 60 CRSS Reverse Transfer Capacitance 25 td(ON) Turn-ON Delay Time 15 tr Rise Time 40 td(OFF) Turn-OFF Time 30 tf Fall Time 30 VSD Diode Forward Voltage Drop 200 ID(ON) VGS = 0V, VDS = Max Rating TA = 125C VDS = -10V, ID = -0.5A pF VGS = 0V, VDS = -25V f = 1MHz ns VDD = -25V, ID = -0.5A RGEN = 25 V VGS = 0V, ISD = -0.9A m -1.2 Notes: 1. All D.C. parameters 100% tested at 25C unless otherwise stated. (Pulse test: 300s pulse, 2% duty cycle.) 2. All A.C. parameters sample tested. Switching Waveforms and Test Circuit 0V 10% PULSE GENERATOR INPUT 90% -10V t(ON) td(ON) Rgen t(OFF) td(OFF) tr tF D.U.T. 0V 90% OUTPUT INPUT 90% RL OUTPUT VDD 10% 10% VDD 7-250