NCP5030MTTXGEVB - ON Semiconductor

January, 2010 − Rev. 2

1Publication Order Number:

NCP5030/D

NCP5030

Buck-Boost Converter

to Drive a Single LED from 1

Li-Ion or 3 Alkaline

Batteries

The NCP5030 is a fixed frequency PWM buck−boost converter

optimized for constant current applications such as driving

high−powered white LED. The buck−boost is implemented in an

H−bridge topology and has an adaptive architecture where it operates

in one of three modes: boost, buck−boost, or buck depending on the

input and output voltage condition. This device has been designed

with high−efficiency for use in portable applications and is capable

of driving in DC up to 900 mA into a high power LED for flashlight /

torch applications. To protect the device cycle−by−cycle current

limiting and a thermal shutdown circuit have been incorporated as

well as output over−voltage protection. The 700 kHz switching

frequency allows the use of a low value 4.7 mH and ceramic

capacitors. The NCP5030 is housed in a low profile space efficient

3x4 mm thermally enhanced WDFN.

Features

•Efficiency: 87% at 500 mA and 3.3 V VIN

•Internal Synchronous Rectifier, No Schottky Diodes

•Adjustable Switching Limit Current to Optimize inductor size

•0.3 mA Shut−down Control with “True−Cut off”

•Input Voltage Range from 2.7 V to 5.5 V

•200 mV Feedback Voltage

•Output Over−voltage and Thermal Shut Down Protection

Typical Applications

•Portable Flashlight / Torch Lights

Figure 1. Typical Application Circuit

L1: TDK RLF7030T−4R7M3R4

C1: 1 mF 6.3 V X5R

C2: 10 mF 3.6 V 0805

TDK: C2012X5R0J106MT

C3: 22 mF 6.3 V X5R

TDK: C2012X5R0J226MTJ

Vin

Cin

1 mF

1 Cell

Li−Ion

2.7 to 5.5

10 mF4.7 mH

PVIN

VIN

LX1

LX2

VOUT

NCP5030

PGND

COMP

AGND

CTRL

ENABLE

39 k

100 k

330 pF

22 pF

PCA

C4 RSENSE

220 m

Cin

Cout

22 mF

5030 = Specific Device Code

A = Assembly Location

Y = Year

WW = Work Week

G= Pb−Free Package

(Note: Microdot may be in either location)

WDFN12 3x4

MT SUFFIX

CASE 506AY

MARKING

DIAGRAM

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5030

AYWWG

PIN CONNECTIONS

(Top View)

PCA

AGND

VIN

VOUT

LX2

COMP

CTRL

PVIN

LX1

Exposed pad (Pin 13) is PGND

must be soldered to PCB GND plane

See detailed ordering and shipping information in the package

dimensions section on page 13 of this data sheet.

ORDERING INFORMATION

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100

50 2.5 3.0 3.5 4.0 4.5 5.0 5.5

EFFICIENCY (%)

VIN (V)

Iout = 300 mA

Figure 2. Efficiency vs. Vin Voltage

PWM CONTROLLER

PCA

CTRL

250 K

Bandgap

1 2

AGND FB COMP PGND

Osc

700 kHz

Thermal

Shutdown

10 4 5/6 7

VIN PVIN LX1 LX2

VOUT

Figure 3. Simplified Block Diagram

39 k

200 mV

Up to 900 mA

LED

220 m

22 pF C5

330 pF

100 k

22 mF X5R 1206 6.3 V

4.7 mH

1 mF

Vbat

10 mF X5R 0805 6.3 V

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PIN FUNCTION DESCRIPTION

Pin Name Type Description

1 FB INPUT Feedback: Reference voltage is 200 mV. The cathode of the LED and a resistor to ground to set the

LED current should be connected at this point. A "5% metal film resistor, or better, is recommended

for best output accuracy. An analog signal can be applied to this input to dim the LED.

2 COMP INPUT Loop Compensation: A frequency compensation network must be connected between this pin to

the ground to ensure the stability of the closed loop. See “loop compensation” guidelines.

3 CTRL INPUT Control and Enable: An active High logic level on this pin enables the device. A built−in pulldown

resistor disables the device if the input is left open. This pin can also be used to control the average

current into the load by applying a low frequency PWM signal. If a PWM signal is applied, the

frequency should be high enough to avoid optical flicker, but be no greater than 1.0 kHz.

4 PVIN POWER Power Voltage Input Supply: A 10 mF ceramic capacitor or larger must bypass this input to the

ground. This capacitor should be placed as close a possible to this input.

5/6 LX1 POWER Switch LX1: Both pins are connected to the input node of the H−bridge. The inductor should be

connected between this node and LX2. The recommended inductor size is 4.7 mH.

7 LX2 POWER Switch LX2: This pin is connected to the opposite node of the H−bridge and the power inductor is

connected between this node and LX1.

8 VOUT POWER Power Output: A filter capacitor is necessary on this pin for the stability of the loop, to smooth the

current flowing into the load, and to limit the noise created by the fast transients present in this

circuitry. A 22 mF ceramic capacitor bypass to GND or larger is recommended. For White LED

applications, this pin is also connected to the anode of the LED. Care must be observed to avoid

EMI through the PCB copper tracks connected to this pin.

9 VS POWER Voltage Sense: This pin must be connected to COUT with a dedicated track to minimize serial

parasitic inductor and to sense VOUT with high accuracy. This pin supplies some of the NCP5030

internal blocks when the voltage is higher than VIN.

10 VIN POWER Supply Pin: This pin supplies the internal control circuitry and must be connected to PVIN.

Recommended bypass capacitor is 1.0 mF ceramic or larger.

11 AGND POWER Analog Ground: This pin is the system ground and carries the analog signals. This pin must be

connected to the ground plan like PGND.

12 PCA INPUT Peak Current Adjust: A resistor between this input and ground controls the maximum peak current

allowed in the inductor. The minimum value for this resistor is 30 kW. Increasing this value decreases

the peak current. This allows the user to adjust the current based on the application needs and scale

the size of the inductor accordingly. See “Switch Current Limit“guidelines in application section.

13 PGND POWER Power Ground: This pin is the power ground for NCP5030 and carries the switching current. Care

must be observed to avoid high−density current flow in a limited PCB copper track.

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MAXIMUM RATINGS (Note 1)

Rating Symbol Value Unit

Power Supply Voltage (Note 2) Vbat 7.0 V

Over Voltage Protection Vout 6.5 V

Human Body Model (HBM) ESD Rating (Note 3) ESD HBM 2.0 kV

Machine Model (MM) ESD Rating (Note 3) ESD MM 200 V

Digital Input Voltage

Digital Input Current

CTRL −0.3 < Vin < Vbat + 0.3

1.0

WDFN 3x4 Package

Power Dissipation @ TA = +85°C (Note 5)

Thermal Resistance, Junction−to−Case

Thermal Resistance, Junction−to−Air

RqJC

RqJA

Internally Limited

6.0

(Note 6)

°C/W

Operating Ambient Temperature Range TA−40 to +85 °C

Operating Junction Temperature Range TJ−40 to +125 °C

Maximum Junction Temperature TJMAX +150 °C

Storage Temperature Range Tstg −65 to +150 °C

Moisture Sensitivy Level (Note 7) MSL 1

Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the

Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect

device reliability.

1. Maximum electrical ratings are defined as those values beyond which damage to the device may occur at TA = 25°C.

2. According to JEDEC standard JESD22−A108B.

3. This device series contains ESD protection and passes the following tests:

Human Body Model (HBM) "2.0 kV per JEDEC standard: JESD22−A114 for all pins

Machine Model (MM) "200 V per JEDEC standard: JESD22−A115 for all pins

4. Latchup Current Maximum Rating: ±100 mA per JEDEC standard: JESD78.

5. The thermal shutdown set to 160°C (typical) avoids irreversible damage on the device due to power dissipation.

6. For the 12−Pin 3x4 WDFN Package, the RqJA is highly dependent on the PCB heat−sink area. For example, RqJA can be 57°C/W for a one

layer board and 43 for a four layer board.

7. Per IPC/JEDEC standard: J−STD−020A.

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ELECTRICAL CHARACTERISTICS (Limits apply for TA between −40°C to +85°C and Vin = 3.6 V unless otherwise noted.)

Characteristic Symbol Min Typ Max Unit

Operational Power Supply VIN 2.7 −5.5 V

Maximum Inductor Current (Note 11) (See Figure 8) IPEAK_MAX −20% 4.0 +20% A

Switches P1 and P2 ON Resistance PMOS RDSON −100 −mW

Switches N1 and N2 ON Resistance NMOS RDSON −100 −mW

Switches P1 and P2 Leakage Current PMOS L −0.5 −mA

Switches N1 and N2 Leakage Current NMOS L −0.5 −mA

Internal Oscillator Frequency (Note 8) FOSC 600 700 800 kHz

Efficiency (Notes 9, 10 and 11) EFF −85 −%

Output Voltage Range (Note 11) VOUT 2.2 −5.5 V

VOUT−VIN Threshold to Change Mode from Boost to Buck−Boost TBOOST −375 −mV

VIN−VOUT Threshold to Change Mode from Buck−Boost to Buck TBUCK −650 −mV

Threshold to Change Mode Hysteresis HMODE −100 −mV

Available Output Power (Note 11)

When Vin ≥ 3.1 V (Vout = 4.7 V, 900 mA)

POUT

4.3 − −

Feedback Voltage Threshold in Steady State at 25°C FBV 190 200 210 mV

Line Regulation, Measured on FB Pin (Note 8)

From DC to 100 Hz and RFB = 1 W

FBVLR −5.0 −mV/V

Feedback Input Current FBC − − 0.1 mA

Standby Current at IOUT = 0 mA, CTRL = Low, Vbat = 4.2 V ISTB −0.3 3.0 mA

Quiescent Current Switching at IOUT = 0 mA, CTRL = High, Vbat = 4.2 V

(Note 12)

IQS −5.0 −mA

VIN Undervoltage Lockout

Threshold to Enable the Converter

UVLO

2.2 2.4 2.6

Undervoltage Lockout Hysteresis UVLOH −100 −mV

Soft−start Time (Note 11) SST −1000 −ms

Limit of CTRL pin PWM Dimming Frequency (Note 11) FDIM −0.2 −kHz

Thermal Shutdown Protection TSD −160 −°C

Thermal Shutdown Protection Hysteresis TSDH −20 −°C

Voltage Input Logic Low VIL − − 0.4 V

Voltage Input Logic High VIH 1.2 − − V

CTRL Pin Pulldown Resistance RCTRL 150 220 290 kW

8. TA between −10°C to +85°C

9. Efficiency is defined by 100 * (Pout/Pin) at 25°C. Vin = 3.3 V, IOUT = 500 mA, Load = 1 LED (Vf = 3.9 V)

10. L = 4.7 mH (TDK RLF7030T−4R7M3R4), Cout = 22 mF X5R

11. Guaranteed by design and characterized.

12. The overall tolerance is dependent on the accuracy of the external resistor.

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TYPICAL PERFORMANCE CHARACTERISTICS

Figure 4. Efficiency vs. VIN LED = Lumileds

LUXEON III, L = TDK RLF7030T−4R7

VIN (V)

5.55.04.54.03.53.02.5

100

Figure 5. Buck Mode Efficiency vs. IOUT @

VOUT = 3.1 V L = TDK RLF7030T−4R7

Figure 6. Buck−Boost Mode Eff. vs. IOUT @

VOUT = 3.8 V L = TDK RLF7030T−4R7

Iout (mA) Iout (mA)

900700 8006004002000

100

900700 8006004002000

100

Figure 7. Boost Mode Efficiency vs. IOUT @

VOUT = 5.0 V L = TDK RLF7030T−4R7

Figure 8. IPEAK_MAX vs. RPCA

Iout (mA) RPCA (kW)

900700 8006004002000

100

100010010

0.5

1.0

1.5

2.5

3.0

3.5

4.0

EFF (%)

IPEAK(max) (A)

Efficiency = 100 X (PLED/PIN)

100 mA 400 mA

900 mA

Vin = 5.5 V

Vin = 4.5 V

Vin = 3.9 V

Vin = 4.0 V

Vin = 4.4 V

Vin = 3.4 V

Vin = 3.6 V

Vin = 3.1 V

Vin = 4.1 V

Vin = 3.6 V

2.0

500300100 500300100

500300100

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TYPICAL PERFORMANCE CHARACTERISTICS

Figure 9. NMOS RDSON vs. Temperature Figure 10. PMOS RDSON vs. Temperature

TEMPERATURE (°C) TEMPERATURE (°C)

100806040200−20−40

100

150

100806040200−20−40

100

150

Figure 11. Transitional Period Switch Pins (LX1

and LX2) from Boost to Buck−Boost when

VOUT − VIN is < than 375 mV

Figure 12. Transitional Period Switch Pins (LX1

and LX2) from Buck to Buck−Boost when

VIN − VOUT is > than 650 mV

Figure 13. Oscillator Frequency vs.

Temperature VOUT = 3.6 V, VIN = 3.6 V

Figure 14. Feedback Voltage vs. Temperature

VOUT = 3.6 V, VIN = 3.6 V

TEMPERATURE (°C) TEMPERATURE (°C)

12510050250−25−50

600

610

620

630

640

660

670

680

100806040200−20−40

190

195

200

205

210

(mW)

FREQUENCY (kHz)

FEEDBACK VOLTAGE

Vin = 4.2 V

Vin = 3.1 V

Vin = 2.7 V

Vin = 3.6 V

Vin = 4.2 V

Vin = 3.1 V

Vin = 2.7 V

Vin = 3.6 V

650

690

710

720

730

700

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DETAILED OPERATING DESCRIPTION

ENABLE

220 k

CTRL

PGND

1.18 V

UVLO

ONE

SHOT

I_SENSE

IPEAK

COMP

−

DISABLE

VIN

THERMAL

PROTECTION

PWM

SENSE

CURRENT

−

I_PMAX

OSC

700 kHz

MODE

DETECTION

220 m

R_SENSE

AND

ANTICROSS−

CONDUCTION

I_SENSE

COMP

AGND

Bandgap

and

Current Sources

39 KRPCA

SENSE

PCA

VIN

OVP

OVP REF

OVP

COMP +

−

1000 mV

EXPOSED PAD

CLOCK

22 pF

100 k

330 pF

IPEAK_REF

RAMP

COMP

−PWM

COMP

5/6 710

LX2

SOFT

START

VIN

PVIN

200 mV

LX1

CONSTANT

TOFF

300 ns

2.7 to 5.5 V

−

VIN UVLO

COMP

ERROR

AMP

UVLO REF

LOGIC

Figure 15. Functional Block Diagram

4.7 mH 30 mW

VBat

Cin

10 mF

RST

Cout

22 mF

VOUT

SET

Reference

1311

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Operation

The NCP5030 DC−DC converter is based on a Current

Mode PWM architecture specifically designed to

efficiently provide a regulated current to a high current

white LED. This device utilizes fixed frequency

synchronous buck−boost switching regulator architecture.

This topology is critical in single cell Lithium−Ion/

Polymer battery or 3 Alkaline powered applications as the

forward voltage of the LED may be greater than or less than

the battery voltage. A low feedback voltage of 200 mV

(nom) minimizes power losses in the current setting

resistor connected between the cathode of the LED and

ground.

The core switching regulator is configured as a full

bridge with four low RDSON (0.1 W) MOSFET switches to

maximize efficient power delivery. Another advantage of

this topology is that it supports a true−shut down mode

where the LED will be disconnected from the power supply

when the device is placed in disable mode.

Figure 16 shows how the four switches are connected to

charge and discharge the current from PVIN to VOUT

through the inductor.

LOAD

LX1

LX2

P1 P2

Figure 16. Basic Power Switches Topology

VOUT

IOUT

VIN IIN

COUT

The converter operates in three different modes as a

function of VOUT − VIN (Figure 17): In Buck mode when

VOUT is below VIN – 650 mV (TBUCK nominal), in Boost

mode when VOUT is above VIN + 375 mV (TBOOST

nominal) and in Buck−Boost mode when VOUT is between

this tow thresholds.

Buck

2− Phase

Buck−Boost

Boost

2− Phase

3− Phase

Figure 17. Conversion Mode

VOUT

VIN

TBUCK

TBOOST

The internal oscillator provides a 700 kHz clock signal

to trigger the PWM controller on each rising edge (SET

signal) which starts a cycle. In pure buck or boost mode, the

converter operates in two−phase mode, the first one to

charge the inductor, followed by a synchronous rectifier

discharge phase. However, in buck−boost mode, to get high

efficiency the converter controls the switches in three

separate phases (see Buck−Boost Mode Section). The

capacitor COUT is used to store energy from the inductor to

smooth output voltage thus constantly powering the load.

Buck Mode (VOUT < VIN – 650 mV)

In Buck mode, switches P1 and N1 are toggling and the

two others are fixed, the switch N2 is all time OFF and the

switch P2 is all time ON. The buck converter operates in

two separate phase (See Figure 18). The first one is TON

when IIN = IOUT. During this phase the switch P1 is ON, N1

is OFF and the current increases through the inductor. The

switch current is measured by the SENSE CURRENT and

added to the RAMP COMP signal. Then PWM COMP

compares the output of the adder and the signal from

ERROR AMP. When the comparator threshold is

exceeded, TON phase is followed by TOFF. P1 switch is

turned OFF and N1 is ON until next clock rising edge. The

current is only delivered by the inductor, which means that

IIN =0

LX1

LX2

Start

Cycle

1.43 mS

Figure 18. Basic DC−DC Buck Operation

LX2 = VOUT

TON TOFF

Ivalley

Ipeak

IOUT

Boost Mode (VOUT > VIN + 375 mV)

The switches in boost mode are inversely controlled than

in buck mode. Switches P2 and N2 are toggling and the two

others are fixed. Switch P1 is all time ON and the switch N1

is all time OFF. The boost converter operates in two

separate phases (See Figure 19). The first one is TON when

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the inductor is charged by current from the battery to store

up energy. During this phase the switch N2 is on and P2 is

off. The switch current is measured by the SENSE

CURRENT and added to the RAMP COMP signal. Then

PWM COMP compares the output of the adder and the

signal from ERROR AMP. When the comparator threshold

is exceeded, the flip−flop circuit is reset, P2 switch is

turned on, and N2 is off until the rising edge of the next

clock cycle.

LX1

LX2

1.43 mS

Start

Cycle

Figure 19. Basic DC−DC Boost Operation

LX1 = VIN

IOUT

TON TOFF

Ivalley

Ipeak

Buck−Boost Mode

(VIN – 650 mV < VOUT < VIN + 375 mV)

Figure 20 shows the basic DC−DC Buck−Boost

operation. Now, all four switches are running and the

controller operates in three separate phases to reach higher

efficiency. The first step is TON when the inductor is

charged by current from the battery. During this phase the

switch P1_N2 are on and P2_N1 are off. Like the other

modes, the current measured by SENSE CURRENT is

added to the RAMP COMP signal and compared by PWM

COMP with the signal from ERROR AMP. When PWM

COMP threshold is exceeded, the flip−flop circuit is reset

and the controller switches in TOFF phase. In this second

phase, the switch P1_N2 are off and P2_N1 are ON.

Because time of TOFF phase is constant, the current stored

in the inductor during 250 ns (nominal) is drained to VOUT.

After this, CONSTANT TOFF delay is over, the circuit logic

switches in the third phase named TC (Time Conduction)

where the inductor is directly connected from PVIN to

VOUT. The switch P1_P2 are on and switches N_N2 are off

until the rising edge of the next clock cycle.

LX1

LX2

1.43 mS

Start

Cycle

Figure 20. Basic DC−DC BB Operation

IOUT

TON TOFF TC

VIN

VOUT

Ipeak

Ivalley

In addition, there are four safety circuits like OVP,

UVLO, IPEAK COMP, THERMAL PROTECTION,

which can disable the DC−DC conversion.

Error Amp and Compensation

Regulation loop is closed by the error amplifier, which

compares the feedback voltage with the reference set at

200 mV. Thanks to the transconductance structure, the

compensation network is directly connected to the error

amplifier output. This external passive network is

necessary to sets the dominant pole to gets a good loop

stability. The compensation network shown in Figure 21

provides a phase margin greater than 45° whatever the

current drives in a white LED load.

COMP

22 pF

100 k

330 pF

Figure 21. Compensation Network

LED Current Selection

The feedback resistor (RSENSE) determines the LED

current in steady state. The control loop regulates the

current in such a way that the average voltage at the FB

input is 200 mV (nominal). For example, should one need

800 mA output current, RSENSE should be selected

according to the following equation:

RSENSE +FBV

ILED

+200 mV

800 mA +250 mW(eq. 1)

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Current Selection

Figure 22 shows an application schematic to drive two

selected currents I1 and I2.

ILED +I1)I2(eq. 2)

200 mV

NTHS5404

LED

PGND

NCP5030

Figure 22. Two Current Selections

RSENSE

VOUT

FLASH/TORCH

An active low logic level of M1 enables the low current

mode, So I2 = 0 and I1 = ILED = 200 mV / R1. For example,

should one need 200 mA for low current mode and 800 mA

for high current mode, R1 should be selected according to

the following below:

R1+FBV

+200 mV

200 mA +1.0 W(eq. 3)

So an active high logic level M1 on gate enables the high

current mode then IFLASH = I1 + I2 and according Equation

2 and 3, R2 should be selected regarding the following

equation:

R2+FBV

IFLASH *I1

*RDSON_M1

(eq. 4)

R2+200 mV

800 mA *200 mA *33 mW

R2+300 mW

Some recommended resistors include, but are not limited

to:

PANASONIC ERJ3BQF1R0V (1.0 W 1% 0603)

PANASONIC ERJ3BQFR30V (300 mW 1% 0603)

PANASONIC ERJ3BQJ1R0V (1.0 W 5% 0603)

PANASONIC ERJ3BQJR30V (300 mW 5% 0603)

Analogue Dimming

In white LED applications, it is desirable to operate the

LEDs at a specific operating current, as the color shift as the

bias current. As a consequence, it is recommended to dim

the LED current by Pulse Width Modulation techniques. A

low frequency PWM signal can be applied to the CTRL

input. LED brightness can be changed by varying the duty

cycle. To avoid any optical flicker the frequency must be

higher than 100 Hz and preferably less than 300 Hz.

Because of the soft−start function set at 1000 ms (nominal),

higher frequency would cause the device to remain active

with lower than expected brightness. Nevertheless, in this

case a dimming control using a filtered PWM signal can be

used. In addition, for DC voltage control the same

technique is suitable and the filter is taken away. Please

refer to “NPC5030 Dimming Control Application Note”.

Inductor Selection

Three main electrical parameters need to be considered

when choosing an inductor: the value of the inductor, the

saturation current and the DCR. Firstly, we need to check

if the inductor is able to handle the peak current without

saturating. Therefore, we have to consider that the

maximum peak inductor current is in Buck−Boost mode

when VOUT is closed TBOOST threshold for the lower

operating VIN. Obviously, the peak current inductor is

higher when this device supplies the maximum required

current. In this case, the DC−DC converter is supposed to

operate in Continuous Conduction Mode (CCM) so the

dotted curve in Figure 23 gives the inductor peak current

as a function of load current:

Figure 23. Inductor Peak Currents Vs. IOUT (mA)

Iout (mA)

900700 800600400200

0.5

1.5

2.5

Ipeak (A)

Switch Current Limit

Setup by RPCA

500300100

Operating Inductor Peak Current

Finally, an acceptable DCR must be selected regarding

losses in the coil and must be lower than 100 mW to limit

excessive voltage drop. In addition, as DCR is reduced,

overall efficiency will improve. Some recommended

inductors are included but are not limited to:

TDK VLF5014AT−4R71R1

TDK RLF7030T−4R7M3R4

COPPER BUSSMANN FP3−4R7

MURATA LQH43CN4R7M03L

NIC: NIP16W4R7MTRF

Switch Current Limit

This safety feature is clamping the maximum allowed

current in the inductor according to external RPCA resistor,

which is connected between PCA input and the ground.

This allows the user to reduce the peak current being drawn

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from the supply according to the application’s specific

requirements. The Ipeak maximum value is 4 A, resulting

in a minimum resistor value of 30 kW. Please refer to

Figure 8 IPEAK_MAX Vs RPCA page 6 to choose RPCA

value versus IPEAK_MAX. By limiting the peak current to

the needs of the application, the inductor sizing can be

scaled appropriately to the specific requirements. This

allows the PCB footprint to be minimized.

Input and Output Capacitors Selection

COUT stores energy during the TOFF phase and sustains

the load current during the TON phase. In order ensure the

loop stability and minimize the output ripple, at least 22 mF

low ESR multi−layer ceramic capacitor type X5R is

recommended.

The VIN and PVIN input pin need to be bypassed by a

X5R or an equivalent low ESR ceramic capacitor. Near the

PVIN pin at least 10 mF 6.3 V or higher ceramic capacitor

is needed. Regarding VIN pin a 1 mF 6.3 V close to the pad

is sufficient. Some recommended capacitors include but

are not limited to:

22 mF 6.3 V 0805

TDK: C2012X5R0J226MTJ

22 mF 6.3 V 1206

MURATA: GRM31CR60J226KE19L

10 mF 6.3 V 0805

TDK C2012X5R0J106MT

Over Voltage Protection (OVP)

The NCP5030 regulates the load current. If there is an

open load condition such as a lost connection to the White

LED, the converter keeps supplying current to the Cout

capacitor causing the output voltage to rise rapidly. To

prevent the device from being damaged and to eliminate

external protection components such as zener diode, the

NCP5030 incorporates an OVP circuit, which monitors the

output voltage with a resistive divider network and a

comparator and voltage reference. If the output reaches 6 V

(nominal), the OVP circuit will detect a fault and inhibit

PWM operation. This comparator has 200 mV hysteresis to

allow the PWM operation to resume automatically when

the load is reconnected and when the voltage drops below

5.8 V.

Under Voltage Lock Out

To ensure proper operation under low input voltage

conditions, the device has a built−in Under−Voltage Lock

Out (UVLO) circuit. The device remains disabled until the

input voltage exceeds 2.35 V (nominal). This circuit has

100 mV hysteresis to provide noise immunity to transient

conditions.

Thermal Protection

Normal operation of the NCP5030 is disabled to protect

the device if the junction temperature exceeds 160°C.

When the junction temperature drops below 140°C, normal

operation will resume.

Layout Recommendations

As with all switching DC/DC converter, care must be

observed to the PCB board layout and component

placement. To prevent electromagnetic interference (EMI)

problems and reduce voltage ripple of the device any

copper trace, which see high frequency switching path,

should be optimized. So the input and output bypass

ceramic capacitor, CIN and COUT as depicted in Figure 24

must be placed as close as possible the NCP5030 and

connected directly between pins and ground plane. In

additional, the track connection between the inductor and

the switching input, SW pin must be minimized to reduce

EMI radiation.

TBD

Figure 24. Recommended PCB Layout

NCP5030

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ORDERING INFORMATION

Device Package Shipping †

NCP5030MTTXG WDFN12, 3x4 mm

(Pb−Free)

3000/Tape & Reel

†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification

Brochure, BRD8011/D.

Demo Board Available:

The NCP5030MTTXGEVB/D evaluation board that configures the device to drive high current through one white LED.

NCP5030

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PACKAGE DIMENSIONS

WDFN12, 3x4, 0.5P

CASE 506AY−01

ISSUE B

ÈÈÈÈ

PIN 1

INDEX AREA

C0.10

C0.08

12X

C0.10

SIDE VIEW

TOP VIEW

BOTTOM VIEW

eb12X

12 7

A3 A1

NOTES:

1. DIMENSIONING AND TOLERANCING PER

ASME Y14.5M, 1994.

2. CONTROLLING DIMENSION: MILLIMETER.

3. DIMENSION b APPLIES TO PLATED

TERMINAL AND IS MEASURED BETWEEN

0.15 AND 0.30 MM FROM TERMINAL.

4. COPLANARITY APPLIES TO THE EXPOSED

PAD AS WELL AS THE TERMINALS.

DIM MIN MAX

MILLIMETERS

A0.70 0.80

A1 0.00 0.05

A3 0.20 REF

b0.20 0.30

D4.00 BSC

D2 3.20 3.40

E3.00 BSC

E2 1.60 1.80

e0.50 BSC

K0.20 −−−

L0.30 0.50

0.10 B

0.05

CNOTE 3

12X

K12X

*For additional information on our Pb−Free strategy and soldering

details, please download the ON Semiconductor Soldering and

Mounting Techniques Reference Manual, SOLDERRM/D.

SOLDERING FOOTPRINT*

3.30

12 X

1.75 0.55 12 X

0.30

3.35

0.50 PITCH

DIMENSIONS: MILLIMETERS

ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice

to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any

liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental

damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over

time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under

its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body,

or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death

may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees,

subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of

personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part.

SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.

PUBLICATION ORDERING INFORMATION

N. American Technical Support: 800−282−9855 Toll Free

USA/Canada

Europe, Middle East and Africa Technical Support:

Phone: 421 33 790 2910

Japan Customer Focus Center

Phone: 81−3−5773−3850

NCP5030/D

LITERATURE FULFILLMENT:

Literature Distribution Center for ON Semiconductor

P.O. Box 5163, Denver, Colorado 80217 USA

Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada

Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada

Email: orderlit@onsemi.com

ON Semiconductor Website: www.onsemi.com

Order Literature: http://www.onsemi.com/orderlit

For additional information, please contact your loc

Sales Representative