MTP3055V Preferred Device Power MOSFET 12 Amps, 60 Volts N-Channel TO-220 This Power MOSFET is designed to withstand high energy in the avalanche and commutation modes. Designed for low voltage, high speed switching applications in power supplies, converters and power motor controls, these devices are particularly well suited for bridge circuits where diode speed and commutating safe operating areas are critical and offer additional safety margin against unexpected voltage transients. * On-resistance Area Product about One-half that of Standard MOSFETs with New Low Voltage, Low RDS(on) Technology * Faster Switching than E-FET Predecessors * Avalanche Energy Specified * IDSS and VDS(on) Specified at Elevated Temperature * Static Parameters are the Same for both TMOS V and TMOS E-FET http://onsemi.com 12 AMPERES 50 VOLTS RDS(on) = 150 m N-Channel D G MAXIMUM RATINGS (TC = 25C unless otherwise noted) Rating S Symbol Value Unit Drain-Source Voltage VDSS 60 Vdc Drain-Gate Voltage (RGS = 1.0 M) VDGR 60 Vdc Gate-Source Voltage - Continuous - Non-Repetitive (tp 10 ms) 4 Drain 4 VGS VGSM 20 25 Vdc Vpk Drain Current - Continuous @ 25C Drain Current - Continuous @ 100C Drain Current - Single Pulse (tp 10 s) ID ID IDM 12 7.3 37 Adc Total Power Dissipation @ 25C Derate above 25C PD 48 0.32 Watts W/C TJ, Tstg -55 to 175 C Single Pulse Drain-to-Source Avalanche Energy - Starting TJ = 25C (VDD = 25 Vdc, VGS = 10 Vdc, IL = 12 Apk, L = 1.0 mH, RG = 25 ) EAS 72 mJ Thermal Resistance - Junction to Case Thermal Resistance - Junction to Ambient RJC RJA 3.13 62.5 C/W Maximum Lead Temperature for Soldering Purposes, 1/8 from case for 10 seconds TL 260 C Operating and Storage Temperature Range MARKING DIAGRAM & PIN ASSIGNMENT TO-220AB CASE 221A STYLE 5 Apk 1 2 MTP3055V LLYWW 1 Gate 3 3 Source 2 Drain MTP3055V LL Y WW = Device Code = Location Code = Year = Work Week ORDERING INFORMATION Device MTP3055V Package Shipping TO-220AB 50 Units/Rail Preferred devices are recommended choices for future use and best overall value. Semiconductor Components Industries, LLC, 2001 February, 2001 - Rev. 3 1 Publication Order Number: MTP3055V/D MTP3055V ELECTRICAL CHARACTERISTICS (TJ = 25C unless otherwise noted) Characteristic Symbol Min Typ Max Unit 60 - - 65 - - Vdc mV/C - - - - 10 100 - - 100 nAdc 2.0 - 2.7 5.4 4.0 - Vdc mV/C - 0.10 0.15 Ohm - - 1.3 - 2.2 1.9 gFS 4.0 5.0 - mhos Ciss - 410 500 pF Coss - 130 180 Crss - 25 50 td(on) - 7.0 10 tr - 34 60 td(off) - 17 30 tf - 18 50 QT - 12.2 17 Q1 - 3.2 - Q2 - 5.2 - Q3 - 5.5 - - - 1.0 0.91 1.6 - trr - 56 - ta - 40 - tb - 16 - QRR - 0.128 - - 3.5 4.5 - - 7.5 - OFF CHARACTERISTICS Drain-Source Breakdown Voltage (VGS = 0 Vdc, ID = 250 Adc) Temperature Coefficient (Positive) V(BR)DSS Zero Gate Voltage Drain Current (VDS = 60 Vdc, VGS = 0 Vdc) (VDS = 60 Vdc, VGS = 0 Vdc, TJ = 150C) IDSS Gate-Body Leakage Current (VGS = 20 Vdc, VDS = 0) IGSS Adc ON CHARACTERISTICS (Note 1.) Gate Threshold Voltage (VDS = VGS, ID = 250 Adc) Temperature Coefficient (Negative) VGS(th) Static Drain-Source On-Resistance (VGS = 10 Vdc, ID = 6.0 Adc) RDS(on) Drain-Source On-Voltage (VGS = 10 Vdc) (ID = 12 Adc) (ID = 6.0 Adc, TJ = 150C) VDS(on) Forward Transconductance (VDS = 7.0 Vdc, ID = 6.0 Adc) Vdc DYNAMIC CHARACTERISTICS Input Capacitance (VDS = 25 Vd Vdc, VGS = 0 Vdc, Vd f = 1.0 MHz) Output Capacitance Reverse Transfer Capacitance SWITCHING CHARACTERISTICS (Note 2.) Turn-On Delay Time (VDD = 30 Vdc, ID = 12 Adc, VGS = 10 Vdc, Vdc RG = 9.1 ) Rise Time Turn-Off Delay Time Fall Time Gate Charge (S Figure (See Fi 8) (VDS = 48 Vdc, ID = 12 Adc, VGS = 10 Vdc) ns nC SOURCE-DRAIN DIODE CHARACTERISTICS Forward On-Voltage (Note 1.) (IS = 12 Adc, VGS = 0 Vdc) (IS = 12 Adc, VGS = 0 Vdc, TJ = 150C) Reverse Recovery Time (S Figure (See Fi 15) (IS = 12 Adc, Adc VGS = 0 Vdc, Vdc dIS/dt = 100 A/s) Reverse Recovery Stored Charge VSD Vdc ns C INTERNAL PACKAGE INDUCTANCE Internal Drain Inductance (Measured from contact screw on tab to center of die) (Measured from the drain lead 0.25 from package to center of die) LD Internal Source Inductance (Measured from the source lead 0.25 from package to source bond pad) LS 1. Pulse Test: Pulse Width 300 s, Duty Cycle 2%. 2. Switching characteristics are independent of operating junction temperature. http://onsemi.com 2 nH nH MTP3055V TYPICAL ELECTRICAL CHARACTERISTICS VGS = 10 V 9V TJ = 25C I D , DRAIN CURRENT (AMPS) 20 24 8V I D , DRAIN CURRENT (AMPS) 24 7V 16 12 6V 8 5V VDS 10 V TJ = -55C 20 25C 100C 16 12 8 4 4 4V 0 1 2 3 4 0 5 TJ = 100C 0.15 25C 0.10 -55C 0.05 7 9 8 0 4 12 8 16 ID, DRAIN CURRENT (AMPS) 20 24 10 0.15 TJ = 25C 0.14 0.13 0.12 VGS = 10 V 0.11 0.10 15 V 0.09 0.08 4 0 Figure 3. On-Resistance versus Drain Current and Temperature 12 16 8 ID, DRAIN CURRENT (AMPS) 20 24 Figure 4. On-Resistance versus Drain Current and Gate Voltage 1.6 100 VGS = 10 V ID = 6 A I DSS , LEAKAGE (nA) RDS(on) , DRAIN-TO-SOURCE RESISTANCE (NORMALIZED) 6 Figure 2. Transfer Characteristics VGS = 10 V 1.4 5 Figure 1. On-Region Characteristics 0.20 0 4 VGS, GATE-TO-SOURCE VOLTAGE (VOLTS) 0.30 0.25 3 2 VDS, DRAIN-TO-SOURCE VOLTAGE (VOLTS) R DS(on) , DRAIN-TO-SOURCE RESISTANCE (OHMS) R DS(on) , DRAIN-TO-SOURCE RESISTANCE (OHMS) 0 1.2 1.0 VGS = 0 V 10 TJ = 125C 0.8 0.6 -50 -25 0 25 50 75 100 125 TJ, JUNCTION TEMPERATURE (C) 150 1 175 0 Figure 5. On-Resistance Variation with Temperature 20 50 10 30 40 VDS, DRAIN-TO-SOURCE VOLTAGE (VOLTS) Figure 6. Drain-To-Source Leakage Current versus Voltage http://onsemi.com 3 60 MTP3055V POWER MOSFET SWITCHING The capacitance (Ciss) is read from the capacitance curve at a voltage corresponding to the off-state condition when calculating td(on) and is read at a voltage corresponding to the on-state when calculating td(off). At high switching speeds, parasitic circuit elements complicate the analysis. The inductance of the MOSFET source lead, inside the package and in the circuit wiring which is common to both the drain and gate current paths, produces a voltage at the source which reduces the gate drive current. The voltage is determined by Ldi/dt, but since di/dt is a function of drain current, the mathematical solution is complex. The MOSFET output capacitance also complicates the mathematics. And finally, MOSFETs have finite internal gate resistance which effectively adds to the resistance of the driving source, but the internal resistance is difficult to measure and, consequently, is not specified. The resistive switching time variation versus gate resistance (Figure 9) shows how typical switching performance is affected by the parasitic circuit elements. If the parasitics were not present, the slope of the curves would maintain a value of unity regardless of the switching speed. The circuit used to obtain the data is constructed to minimize common inductance in the drain and gate circuit loops and is believed readily achievable with board mounted components. Most power electronic loads are inductive; the data in the figure is taken with a resistive load, which approximates an optimally snubbed inductive load. Power MOSFETs may be safely operated into an inductive load; however, snubbing reduces switching losses. Switching behavior is most easily modeled and predicted by recognizing that the power MOSFET is charge controlled. The lengths of various switching intervals (t) are determined by how fast the FET input capacitance can be charged by current from the generator. The published capacitance data is difficult to use for calculating rise and fall because drain-gate capacitance varies greatly with applied voltage. Accordingly, gate charge data is used. In most cases, a satisfactory estimate of average input current (IG(AV)) can be made from a rudimentary analysis of the drive circuit so that t = Q/IG(AV) During the rise and fall time interval when switching a resistive load, VGS remains virtually constant at a level known as the plateau voltage, VSGP. Therefore, rise and fall times may be approximated by the following: tr = Q2 x RG/(VGG - VGSP) tf = Q2 x RG/VGSP where VGG = the gate drive voltage, which varies from zero to VGG RG = the gate drive resistance and Q2 and VGSP are read from the gate charge curve. During the turn-on and turn-off delay times, gate current is not constant. The simplest calculation uses appropriate values from the capacitance curves in a standard equation for voltage change in an RC network. The equations are: td(on) = RG Ciss In [VGG/(VGG - VGSP)] td(off) = RG Ciss In (VGG/VGSP) 1200 VDS = 0 V C, CAPACITANCE (pF) 1000 VGS = 0 V TJ = 25C Ciss 800 600 Crss Ciss 400 Coss 200 0 Crss 10 5 5 0 VGS 10 15 20 25 VDS GATE-TO-SOURCE OR DRAIN-TO-SOURCE VOLTAGE (VOLTS) Figure 7. Capacitance Variation http://onsemi.com 4 MTP3055V 10 VDD = 30 V ID = 12 A VGS = 10 V TJ = 25C 50 Q1 8 VGS Q2 40 6 30 4 20 2 ID = 12 A 10 TJ = 25C Q3 0 1000 0 1 3 2 VDS 5 4 6 7 8 9 10 11 12 0 13 100 t, TIME (ns) VGS, GATE-TO-SOURCE VOLTAGE (VOLTS) 60 QT VDS , DRAIN-TO-SOURCE VOLTAGE (VOLTS) 12 tr td(off) tf 10 td(on) 1 1 10 100 QT, TOTAL CHARGE (nC) RG, GATE RESISTANCE (OHMS) Figure 8. Gate-To-Source and Drain-To-Source Voltage versus Total Charge Figure 9. Resistive Switching Time Variation versus Gate Resistance DRAIN-TO-SOURCE DIODE CHARACTERISTICS 0.13 0.11 0.10 0.09 0.08 0 2 VGS = 0 V TJ = 25C 10 I S , SOURCE CURRENT (AMPS) 0.12 QRR , STORED CHARGE ( C) 12 dIS/dt = 100 A/s VDD = 25 V TJ = 25C 4 6 8 10 8 6 4 2 0 0.50 0.55 0.60 0.65 0.70 0.75 0.80 0.85 12 IS, SOURCE CURRENT (AMPS) 0.90 0.95 1.0 VSD, SOURCE-TO-DRAIN VOLTAGE (VOLTS) Figure 10. Stored Charge Figure 11. Diode Forward Voltage versus Current SAFE OPERATING AREA reliable operation, the stored energy from circuit inductance dissipated in the transistor while in avalanche must be less than the rated limit and adjusted for operating conditions differing from those specified. Although industry practice is to rate in terms of energy, avalanche energy capability is not a constant. The energy rating decreases non-linearly with an increase of peak current in avalanche and peak junction temperature. Although many E-FETs can withstand the stress of drain-to-source avalanche at currents up to rated pulsed current (IDM), the energy rating is specified at rated continuous current (ID), in accordance with industry custom. The energy rating must be derated for temperature as shown in the accompanying graph (Figure 13). Maximum energy at currents below rated continuous ID can safely be assumed to equal the values indicated. The Forward Biased Safe Operating Area curves define the maximum simultaneous drain-to-source voltage and drain current that a transistor can handle safely when it is forward biased. Curves are based upon maximum peak junction temperature and a case temperature (TC) of 25C. Peak repetitive pulsed power limits are determined by using the thermal response data in conjunction with the procedures discussed in AN569, "Transient Thermal Resistance-General Data and Its Use." Switching between the off-state and the on-state may traverse any load line provided neither rated peak current (IDM) nor rated voltage (VDSS) is exceeded and the transition time (tr,tf) do not exceed 10 s. In addition the total power averaged over a complete switching cycle must not exceed (TJ(MAX) - TC)/(RJC). A Power MOSFET designated E-FET can be safely used in switching circuits with unclamped inductive loads. For http://onsemi.com 5 MTP3055V SAFE OPERATING AREA 75 VGS = 20 V SINGLE PULSE TC = 25C EAS, SINGLE PULSE DRAIN-TO-SOURCE AVALANCHE ENERGY (mJ) I D , DRAIN CURRENT (AMPS) 100 10 s 10 100 s 1 ms 1.0 0.1 10 ms RDS(on) LIMIT THERMAL LIMIT PACKAGE LIMIT 0.1 dc 10 1.0 ID = 12 A 50 25 0 100 25 50 75 100 125 175 150 VDS, DRAIN-TO-SOURCE VOLTAGE (VOLTS) TJ, STARTING JUNCTION TEMPERATURE (C) Figure 12. Maximum Rated Forward Biased Safe Operating Area Figure 13. Maximum Avalanche Energy versus Starting Junction Temperature r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE 1.0 D = 0.5 0.2 0.1 0.1 0.05 P(pk) 0.02 0.01 SINGLE PULSE t1 t2 DUTY CYCLE, D = t1/t2 0.01 1.0E-05 1.0E-04 1.0E-03 1.0E-02 t, TIME (s) 1.0E-01 Figure 14. Thermal Response di/dt IS trr ta tb TIME 0.25 IS tp IS Figure 15. Diode Reverse Recovery Waveform http://onsemi.com 6 RJC(t) = r(t) RJC D CURVES APPLY FOR POWER PULSE TRAIN SHOWN READ TIME AT t1 TJ(pk) - TC = P(pk) RJC(t) 1.0E+00 1.0E+01 MTP3055V PACKAGE DIMENSIONS TO-220 THREE-LEAD TO-220AB CASE 221A-09 ISSUE AA SEATING PLANE -T- B C F T S 4 DIM A B C D F G H J K L N Q R S T U V Z A Q 1 2 3 U H K Z L R V NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION Z DEFINES A ZONE WHERE ALL BODY AND LEAD IRREGULARITIES ARE ALLOWED. J G D N INCHES MIN MAX 0.570 0.620 0.380 0.405 0.160 0.190 0.025 0.035 0.142 0.147 0.095 0.105 0.110 0.155 0.018 0.025 0.500 0.562 0.045 0.060 0.190 0.210 0.100 0.120 0.080 0.110 0.045 0.055 0.235 0.255 0.000 0.050 0.045 ----0.080 STYLE 5: PIN 1. 2. 3. 4. http://onsemi.com 7 GATE DRAIN SOURCE DRAIN MILLIMETERS MIN MAX 14.48 15.75 9.66 10.28 4.07 4.82 0.64 0.88 3.61 3.73 2.42 2.66 2.80 3.93 0.46 0.64 12.70 14.27 1.15 1.52 4.83 5.33 2.54 3.04 2.04 2.79 1.15 1.39 5.97 6.47 0.00 1.27 1.15 ----2.04 MTP3055V ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. PUBLICATION ORDERING INFORMATION NORTH AMERICA Literature Fulfillment: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada Fax: 303-675-2176 or 800-344-3867 Toll Free USA/Canada Email: ONlit@hibbertco.com Fax Response Line: 303-675-2167 or 800-344-3810 Toll Free USA/Canada N. American Technical Support: 800-282-9855 Toll Free USA/Canada EUROPE: LDC for ON Semiconductor - European Support German Phone: (+1) 303-308-7140 (Mon-Fri 2:30pm to 7:00pm CET) Email: ONlit-german@hibbertco.com French Phone: (+1) 303-308-7141 (Mon-Fri 2:00pm to 7:00pm CET) Email: ONlit-french@hibbertco.com English Phone: (+1) 303-308-7142 (Mon-Fri 12:00pm to 5:00pm GMT) Email: ONlit@hibbertco.com CENTRAL/SOUTH AMERICA: Spanish Phone: 303-308-7143 (Mon-Fri 8:00am to 5:00pm MST) Email: ONlit-spanish@hibbertco.com Toll-Free from Mexico: Dial 01-800-288-2872 for Access - then Dial 866-297-9322 ASIA/PACIFIC: LDC for ON Semiconductor - Asia Support Phone: 303-675-2121 (Tue-Fri 9:00am to 1:00pm, Hong Kong Time) Toll Free from Hong Kong & Singapore: 001-800-4422-3781 Email: ONlit-asia@hibbertco.com JAPAN: ON Semiconductor, Japan Customer Focus Center 4-32-1 Nishi-Gotanda, Shinagawa-ku, Tokyo, Japan 141-0031 Phone: 81-3-5740-2700 Email: r14525@onsemi.com ON Semiconductor Website: http://onsemi.com EUROPEAN TOLL-FREE ACCESS*: 00-800-4422-3781 *Available from Germany, France, Italy, UK, Ireland For additional information, please contact your local Sales Representative. http://onsemi.com 8 MTP3055V/D