a Am27C100 1Megabit (131,072 x 8-Bit) ROM Compatible CMOS EPROM ct Advanced Micro Devices DISTINCTIVE CHARACTERISTICS @ EIAJ 32-pin DIP package @ Pinout compatible with 28-pin ROM _ Wt Fast access time 100 ns @ Low power consumption 100 pA typical standby current High speed Flashrite programming Single + 5 V power supply + 10% power supply tolerance available Latch-up protected to 100 mA from -1 V to Veg 1 V GENERAL DESCRIPTION The Am27C100 is a 1 megabit ultraviolet erasable pro- grammable read-only memory. The 32 pin ElAJ pinout is compatible with 28 pin megabit ROMs. The memory is organized as 128K words by 8 bits per word, operates from a single + 5 V supply, has a static standby mode, and features fast single address location programming. Products are available in windowed ceramic DIP and plastic one time programmable (OTP) packages. Any byte can be accessed in less than 120 ns, allowing operation with many high-performance microprocessors without any WAIT states. The Am27C100 offers sepa- rate Output Enable (OE) and Chip Enable (CE) controls, thus eliminating bus contention in a multiple bus micro- processor system. AMDs CMOS process technology provides high speed, low power, and high noise immunity. Typical power consumption is only 100 mW in active mode, and 250 uW in standby mode. All signals are TTL levels, including programming sig- nals. Bit locations may be programmed singly, in blocks, or at random. The Am27C100 supports AMD's Flashrite programming algorithm (0.1 ms pulses) resulting in typical programming times of less than 30 seconds. BLOCK DIAGRAM om Veo Data Ouputs O- Vss DQ0,007 O- Vep Httittt GE #] Output Enable CE | Chip Enable Output FGM te| Prog Logic Butters Y Y Decoder Gating Aghig Address inputs x 1,048,576-Ba Decoder Cell Matrix ~ 12566-001A PRODUCT SELECTOR GUIDE Family Part No. Am27C100 Ordering Part Number: Voc + 5% -105 -125 -155 -255 Voc + 10% -120 ~150 -200 Max. Access Time (ns) 100 120 150 200 250 CE (E) Access Time (ns) 100 120 150 200 250 OE (G) Access Time (ns) 50 65 75 100 Publication# 12566 Rev. B Amendment 0 Issue Date: Merch 1991 2-137AMD cl CONNECTION DIAGRAM Top View DIPs VepC1 ~~ 322[79 Ye Che 31[] Pam; Ais (]3 sof] Ne. Av C]4 29 {7} Ata A7 CIs 2a {7} A132 Ag (]8 27 (I Ag 4s C]7 2e[_] 9 Ag (Je as{_] An A3 C]9 2] a, Ag (} 10 23 [-] Ato Ayn 22(] &e Ao (Jz a1 [-] 0a, Dy (4 13 20 [7] Dd, 6a; C] 4 19{] Da, DQ, (] 15 187} pa, GND [] 16 7["] Da, 12566-002A Note: 1. JEDEC nomenclature is in parentheses. LOGIC SYMBOL 17 i> AgA 46 8 DQ,;Da KL> *| CE(E) | +>| PGMiP) -| OE (G) 10205A-002A PIN DESCRIPTION A,-A,, = Address Inputs CE(E) == Chip Enable Input DQ,-DQ, = Data input/Outputs SEG) = Output Enable Input PGM (P) = Program Enable Input Vee = V,, Supply Voltage Vop = Program Supply Voltage GND = Ground NC = No Internal Connect 2-138 Am27C100AMD al ORDERING INFORMATION Standard Information AMD Standard products are available in several packages and operating ranges. The order number (Valid Combination) is formed by a combination of: AM27C100 a. Device Number b. Speed Option . Package Type . Temperature Range . Optional Processing e2an 106 D Cc , e. OPTIONAL PROCESSING Blank = Standard processing B = Burn-in d. TEMPERATURE RANGE C = Commercial (0 to 70C) { = Industrial (-40 to +85C) c. PACKAGE TYPE D = 32-Pin Ceramic DIP (CDV 032) b. SPEED OPTION See Product Selector Guide and Valid Combinations a. DEVICE NUMBER Am27C100 1 Megabit (128K x 8) ROM Compatible CMOS UV EPROM Valid Combinations Valid Combinations AM27C 100-105 Valid Combinations list configurations planned to DC, DCB be supported in volume for this device. Consult AM27C100-120 AM27C100-150 AM27C100-125 AM27C 100-200 AM27C100-155. AM27C100-255 the local AMD sales office to confirm availability of specific valid combinations, and to check on DC, DCB, DI, newly released combinations. DIB Am27C100 2-139AMD cl ORDERING INFORMATION OTP Products AMD Standard products are available in several packages and operating ranges. The order number (Valid Combination) is formed by a combination of: . Device Number . Speed Option . Package Type . Temperature Range . Optional Processing @2ao co AM27C100 125 P oc Le e. OPTIONAL PROCESSING Blank = Standard processing d. TEMPERATURE RANGE C = Commercial (0 to +70C) c. PACKAGE TYPE P = 32-Pin Plastic DIP (PD 032) b. SPEED OPTION See Product Selector Guide and Valid Combinations a. DEVICE NUMBER Am27C100 1 Megabit (128K x 8) CMOS ROM compatible OTP EPROM Valid Combinations Valid Combinations Valid Combinations list configurations planned to AM27C100-125 be supported in volume for this device. Consult AM27C100-155 PC the local AMD sales office to confirm availability of specific valid combinations, and to check on AM27C100-200 oe newly released combinations. AM27C100-255 2-140 Am27C100AMD zl FUNCTIONAL DESCRIPTION Erasing the Am27C100 In order to clear all locations of their programmed con- tents, it is necessary to expose the Am27C100 to an ultraviolet light source. A dosage of 15 W seconds/cm is required to completely erase an Am27C100. This dos- age can be obtained by exposure to an ultraviolet Lamp- wavelength of 2537 Angstroms (A)-with intensity of 12,000 pW/cm? for 15 to 20 minutes. The Am27C100 should be directly under and about one inch from the source and allfilters should be removed from the UV light source prior to erasure. it is important to note that the Am27C100, and similar devices, will erase with light sources having wavelengths shorter than 4000 A. Although erasure times willbe much longer than with UV sources at 2537 A, nevertheless the exposure to fluorescent light and sunlight will eventually erase the Am27C100 and exposure to them should be prevented to realize maximum system reliability. If used in such an environment, the package window should be covered by an opaque label or substance. Programming the Am27C100 Upon delivery, or after each erasure, the Am27C100 has all 1,048,576 bits in the ONE, or HIGH state. ZEROs" are loaded into the Am27C100 through the procedure of programming. The programming mode is entered when 12.75+0.25V is applied to the V,, pin, CE and PGM is at V,,, and OE is at V,,. For programming, the data to be programmed is applied 8 bits in parallel to the data output pins. The Flashrite programming aigorithm (shown in Figure 1) reduces programming time by using initial 100 ps pulses followed by a byte verification to determine whether the byte has been successfully programmed. If the data does not verify, an additional! pulse is applied for amaximum of 25 pulses. This process is repeated while sequencing through each address of the EPROM. The Flashrite programming algorithm programs and verifies at V,,= 6.25 V and V,, = 12.75 V. After the final address is completed, all bytes are compared to the original data with V,. = Vp, = 5.25 V. Program inhibit Programming of multiple Am27C100s in parallel with different datais also easily accomplished. Except for CE, alt like inputs of the parallel Am27C100s may be com- mon. A TTL low-level program pulse applied to an Am27C100 CE input with V,, = 12.75 + 0.25 V, PGM is LOW, and OE HIGH will program that Am27C100. A high-level CE input inhibits the other Am27C100s from being programmed. Am27C100 Program Verify Averify should be performed on the programmed bits to determine that they were correctly programmed. _The verify should be performed with OE and CE at V,, PGM at V,, and V,, between 12.5 V and 13.0 V. IH" Auto Select Mode The auto select mode allows the reading out of a binary code from an EPROM that will identify its manufacturer and type. This mode is intended for use by programming equipment for the purpose of automatically matching the device to be programmed with its corresponding pro- gramming algorithm. This mode is functional inthe 25C +5C ambient temperature range that is required when programming the Am27C100. To activate this mode, the programming equipment must force 12.0 + 0.5 V on address line A, of the Am27C100. Two identifier bytes may then be sequenced from the device outputs by toggling address line A, from V, to V,,,. All other address lines must be held at V, during auto select mode. Byte 0 (A, = V,,) represents the manufacturer code, and byte 1(A, = V,,), the device identifier code. For the Am27C100, these two identifier bytes are given in the Mode Select table. All identifiers for manufacturer and device codeswill possess odd parity, with the MSB (DQ,) defined as the parity bit. Read Mode The Am27C100 has two control functions, both of which must be logically satisfied in order to obtain data at the outputs. Chip Enable (CE) is the power control and should be used for device selection. Output Enable (OE) is the output control and should be used to gate data to the output pins, independent of device selection. As- suming that addresses are stable, address access time (taco) is equal to the delay from CE to output (t,,). Data is available at the outputs tog after the falling edge of OE, assuming that CE has been LOW and addresses have been stable for at least t,og tog. Standby Mode The Am27C100 has a CMOS standby mode which reduces the maximuM Veg current to 100 pA. Itis placed in CMOS-standby when CE is at Voc + 0.3 V. The Am27C100 also has a TTL-standby mode which re- duces the maximum Veg current to 1.0 mA. It is placed in TTL-standby when CE is at V,,. When in stand-by mode, the outputs are in a high-impedance state, inde- pendent of the OE input. Output OR-Tieing To accommodate multiple memory connections, a two- line control function is provided to allow for: 1. Low memory power dissipation, and 2. Assurance that output bus contention will not occur. 2-141AMD cl itis recommended that CE be decoded and used as the primary device-selecting function, while OE be made a common connection to all devices in the array and connected to the READ line from the system control bus. This assures that all deselected memory devices are in their low-power standby mode.and that the output pins are only active when data is desired from a par- ticular memory device. System Applications During the switch between active and standby condi- tions, transient current peaks are produced on the rising and falling edges of Chip Enable. The magnitude of these transient current peaks is dependent on the output capacitance loading of the device. At a minimum, a 0.1 HF ceramic capacitor (high frequency, low inherent in- ductance) should be used on each device between V,, and GND to minimize transient effects. In addition, to overcome the voltage drop caused by the inductive effects of the printed circuit board traces on EPROM arrays, a 4.7 uF bulk electrolytic capacitor should be used between V_. and GND for each eight devices. The location of the capacitor should be close to where the power supply is connected to the array. MODE SELECT TABLE Mode Pins| CE OE PGM A, A, Vp __| Outputs Read Vi. Vv, X X X X Dour Output Disable V, Vu x x x x Hi-Z Standby (TTL) Vis Xx x Xx X X Hi-Z Standby (CMOS) Veg + 0.3 V x X X xX X Hi-Z Program Vi Vu Va X X Voe D,, Program Verify Vi Vi Vu X X Vpp Dour Program Inhibit Vue x x X Xx Vp Hi-Z Auto Select |Manufacturer Vy Va x vi Vi X 01H ;Code (Note 3) Device Code Vv, Vv, X Vu V,, X ODH Notes: 1. V, = 120V+05V 2. X = Either V,, or V, ; A, A= Ay Ary = Va . See DC Programming Characteristics for V,, voltage during programming. 2-142 Am27C100AMD al ABSOLUTE MAXIMUM RATINGS Storage Temperature OTP products -65 to 125C All other products 65 to 150C Ambient Temperature with Power Applied 55 to +125C Voltage with Respect to Ground: All pins except A,, V,,, and Veg (Note 1) 0.6 to V,, 40.6 V A, and V,, (Note 2) -~0.6 to 13.5 V Veo -0.6 to 7.0V Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these orany other conditions above those indicated in the operational sections of this specification is not implied. Exposure of the device to absolute maximum rating conditions for extended periods may affect device reliability. Notes: 1. During transitions, the inputs may overshoot GND to 2.0 V for periods of up to 20 ns. Maximum DC voltage on input and VO may overshoot to V,, + 2.0 V for periods up to 20 ns. 2. During transitions, A, and V,, may overshoot GND to -2.0 V for periods of up to 20 ns. A, and V,, must not exceed 13.5 V for any period of time. OPERATING RANGES Commercial (C) Devices Case Temperature (T,) Industrial (I) Devices Case Temperature (T,) Supply Read Voltages: Vog for AM27C0100-XX5 Vog for Am27C100-XX0 0 to +70C 40 to +85C +4.75 to + 5.25 V +4.50 to +5.50 V Operating ranges define those limits between which the Am27C100 2-143DC CHARACTERISTICS over operating range unless otherwise specified. AMD cl (Notes 1, 4, 5, and 8) TTL and NMOS Inputs Parameter Symbol | Parameter Description Test Conditions Min. Max. Unit Vou Output HIGH Voltage lou =~ 400 HA 2.4 Vv Vo Output LOW Voltage ly = 2.1mMA 0.45 V Vu Input HIGH Voltage 2.0 Veo + 0.5 V vi Input LOW Voltage -0.5 + 0.8 V I Input Load Current Vy =OVto+ Vi, 1.0 HA lo Output Leakage Current Vour = 0 V to + Von 10 HA lees Vog Active Current CE=V,,f=5MHz |,,=OmA 30 mA (Note 5) (Open Outputs) loco Veg Standby Current CE=V,, 1.0 mA lees Vpp Current During Read =| CE = OE=V,, Vos = Voc 100 pA (Note 6) CMOS Inputs Parameter Symbol | Parameter Description Test Conditions Min. Max. Unit Vou Output HIGH Voltage low = 400 pA 2.4 Vv Vo Output LOW Voltage ly = 2.1 mA 0.45 V Vu, Input HIGH Voltage Voc 0.3 | Veg + 0.3 Vv Vv, Input LOW Voltage -0.5 +0.8 V i Input Load Current Vy =OVto+Vi, 1.0 HA lo Output Leakage Current Vour = 0 V to + Veg 10 HA loot Veg Active Current CE = V,, f = 5 MHz 30 mA (Note 5) lout = 9 MA (Open Outputs) loco Veg Standby Current CE=V,.+ 0.3 V 100 pA lees Vpp Current During Read = | CE = OE = V,, Vip = Vig 100 pA (Note 6) 2-144 Am27C100AMD al CAPACITANCE (Notes 2, 3, and 7) CDV032 Parameter Symbol Parameter Description | Test Conditions Typ. Max. Unit Cy Address Vy = OV 12 14 pF Input Capacitance Con Output Capacitance Vour = 0 V 14 17 pF Notes: SNOAPON > may overshoot to V_, + 2.0 V for periods less than 20 ns. Vo, Must be applied simultaneously or before V,., and removed simultaneously or after V,,. Typical values are for nominal supply voltages. This parameter is only sampled, not 100% tested. Caution: the Am27C100 must not be removed from (or inserted into) a socket when V,, or V,, is applied. \oc: is tested with OE = V,, to simulate open outputs. Maximum active power usage is the sum of I, and I,,. T,= +25C, f= 1 MHz. During transitions, the inputs may overshoot to -2.0 V for periods less than 20 ns. Maximum DC Voltage on input pins Am27C100 2-145AMD cl SWITCHING CHARACTERISTICS over operating range unless otherwise specified (Notes 1, 3, and 4) Parameter Am27C100 Symbols -120, | -150, JEDEC standard Parameter Description | Test Condition 105 | -125 |-155 | -200 | -255 | Unit tov! tac | Address to CE=OE=V, | Min. -~/-]-|- Output Delay ns Max. 100] 120{ 150 | 200 | 250 taw | toe Chip Enable to OE = V, Min. -/|-]-]- Output Delay ns Max. 100} 120} 150 | 200 | 250 taro | toe Output Enable to CE=V, Min. -/|-]-|- Output Delay ns Max. 50] 50} 65 | 75 | 100 tenaz toe Chip Enable HIGH or Min. Oo; oj]; 0] 0 Output Enable HIGH, touaz | (Note 2)) Whichever Comes Max. 35, 35] 35 | 40 | 40 | ns First, to Output Float Output Hold from Min. 0 0 0 0 0 trax | tow Addresses, CE, or OE, ns Whichever Occurred First Max. -~-}-j},-|f- % Notes: 1. V,, must be applied simultaneously or before V,,, and removed simultaneously or after V,,. 2. This parameter is only sampled, not 100% tested. 3. Caution: The Am27C100 must not be removed from (or inserted into) a socket or board when Vie or V., is applied. 4. Output Load: 1 TTL gate and C, = 100 pF Input Rise and Fail Times: 20 ns Input Pulse Levels: 0.45 to 2.4 V Timing Measurement Reference Level - Inputs: 0.8 to 2.0 V Outputs: 0.8 to 2.0V SWITCHING TEST CIRCUIT SWITCHING TEST WAVEFORM 2.4V DEVICE 27kQ sv xX S Test POINTS 2 . TEST 0.45V oBV O.8v. (INPUT OUTPUT CL Se2kn DIODES IN3064 OR EQUIVALENT AC Testing: Inputs are driven at 2.4 V for a logic "1" and 0.45 V for a logic 0. | Input pulse rise and fall times are s 20 ns. C\_ = 100 pF including jig capacitance. 10205A-004A 10205B-009A 2-146 Am27C100AMD zl KEY TO SWITCHING WAVEFORMS WAVEFORM INPUTS OUTPUTS MUST BE WILL BE STEADY STEADY WILL BE MAY CHANGE CHANGING Wh. FROME TON FROM TOL WILL BE MAY CHANGE CHANGING HHT FROMLTOH FROMLTOH DONT CARE, CHANGING, ANY CHANGE STATE PERMITTED UNKNOWN KS000010 SWITCHING WAVEFORMS 24 ~--351 ADDRESSES ADDRESSESVALID og] K | cE wad _ / OE ____+ tor (NOTE 2) tou OUTPUT VALID OUTPUT AS HIGH2 10205A-005A Notes: 1. GE may be delayed up to t,,,. +t, after the falling edge of CE without impact ont,,.. 2. t,, is specified from OE or CE, whichever occurs first. Am27C100 2-147AMD cl _= PROGRAM ONE 100 ps PULSE INCREMENT X INTERACTIVE SECTION INCREMENT ADDRESS y [_ VERIFY SECTION DEVICE FAILED DEVICE PASSED 10205B-008A Figure 1. Flashrite Programming Flow Chart 2-148 Am27C100AMD Pa | DC PROGRAMMING CHARACTERISTICS (T, = +25C + 5C) (Notes 1, 2, and 3) Parameter Symbol Parameter Description Test Conditions Min. Max. Unit ly Input Current (All Inputs) Viy= Vor Vi, 10.0 pA Vi Input LOW Level (All Inputs) -0.3 0.8 Vv Vu Input HIGH Level 20 1V,.+05] V Vo. Output LOW Voltage During Verify I. = 2-1 MA 0.45 Vv Vou Output HIGH Voltage During Verify low = 400 pA 2.4 Vv Vi, A, Auto Select Voltage 11.5 12.5 V lec Veg Supply Current 50 mA (Program & Verify) lop Vp Supply Current (Program) CE=V,, OE=V,, 30 mA Voc Supply Voltage 6.00 6.50 Vv Vip Programming Voltage 12.5 13.0 V SWITCHING PROGRAMMING CHARACTERISTICS (T, = +25C + 5C) (Notes 1, 2, and 3) Parameter Symbol JEDEC | Standard Parameter Description Min. Max. Unit taver las Address Setup Time 2 us tozar toes OE Setup Time 2 ys tover tos Data Setup Time 2 ps touax tay Address Hold Time 0 ys teupx tow Data Hold Time 2 ys touaz tore Output Enable to Output Float Delay 0 130 ns tues {vps Vpp Setup Time 2 us teen | tow PGM Program Pulse Width 95 105 us tres tyes Voc Setup Time 2 us tere. toes CE Setup Time 2 us torav tog Data Valid from OE 150 ns Notes: 1. V._ must be applied simultaneously or before Vp and removed simultaneously or after V,,. 2. When programming the Am27C100, a 0.1 ,F capacitor is required across V,, and ground to suppress spurious voltage transients which may damage the device. 3. Programming characteristics are sampled but not 100% tested at worst-case conditions. Am27C100 2-149AMD cl Flashrite PROGRAMMING ALGORITHM WAVEFORM (Notes 1 and 2) Vin PROGRAM PROGRAM VERIFY ADDRESSES AS tan DATA ABLE TA OUT V, tps DATA 10205-0068 Notes: 1. The input timing reference level is 0.8 V for V, ans 2.0 V fora V,, 2. to, and t,,, are characteristics of the device but must be accommodated by the programmer. 2-150 Am27C100