Exar Corporation 48720 Kato Road, Fremont CA, 94538 • 510-668-7017 • www.exar.com SP3239E_100_020111
1
SP3239E
Intelligent +3.0V to +5.5V RS-232 Transceiver
The SP3239E device is an RS-232 transceiver solution intended for portable or hand-held applications
such as notebook and palmtop computers. The SP3239E uses an internal high-efciency, charge-pump
power supply that requires only 0.1µF capacitors in 3.3V operation. This charge pump and Exar's driver
architecture allow the SP3239E device to deliver compliant RS-232 performance from a single power
supply ranging from +3.0V to +5.5V. The SP3239E is a 5-driver / 3-receiver device that is ideal for laptop
/ notebook computer and PDA applications. The SP3239E includes one complementary receiver that
remains alert to monitor an external device's Ring Indicate signal while the device is shutdown.
FEATURES
■ Meets true EIA/TIA-232-F Standards
from a +3.0V to +5.5V power supply
■ Interoperable with EIA/TIA-232 and
adheres to EIA/TIA-562 down to a +2.7V
power source
■ Minimum 250Kbps data rate under load
■ Regulated Charge Pump Yields Stable
RS-232 Outputs Regardless of VCC
Variations
■ Enhanced ESD Specications:
+15kV Human Body Model
+15kV IEC61000-4-2 Air Discharge
+8kV IEC61000-4-2 Contact Discharge
DESCRIPTION
SELECTION TABLE
Now Available in Lead Free Packaging
T4IN
1
2
3
425
26
27
28
5
6
7
24
23
22
SHUTDOWN
C2-
V-
R1IN
R2IN
IN
NC
C2+
C1-
GND
V
CC
V+
T1IN
8
9
10
11 18
19
20
21
12
13
14
17
16
15
T OUT
T2OUT
T3OUT T3IN
T2IN
T5IN
R3OUT
R2OUT
R1OUT
R1OUT
SP3239E
C1+
T4OUT
T5OUT
NC
1
3
R
Device Power
Supplies
RS-232
Drivers
RS-232
Receivers
External
Components
Auto
On-Line
Circuitry
TTL 3-State # of
Pins
SP3223E +3.0V to +5.5V 2 2 4 Capacitors YES YES 20
SP3243E +3.0V to +5.5V 3 5 4 Capacitors YES YES 28
SP3238E +3.0V to +5.5V 5 3 4 Capacitors YES YES 28
SP3239E +3.0V to +5.5V 5 3 4 Capacitors NO YES 28
SP3249E +3.0V to +5.5V 5 3 4 Capacitors NO NO 24
2
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • 510-668-7017 • www.exar.com SP3239E_100_020111
NOTE 1: V+ and V- can have maximum magnitudes of 7V, but their absolute difference cannot exceed 13V.
ABSOLUTE MAXIMUM RATINGS
These are stress ratings only and functional operation
of the device at these ratings or any other above those
indicated in the operation sections of the specications
below is not implied. Exposure to absolute maximum
rating conditions for extended periods of time may
affect reliability and cause permanent damage to the
device.
VCC.......................................................-0.3V to +6.0V
V+ (NOTE 1).......................................-0.3V to +7.0V
V- (NOTE 1)........................................+0.3V to -7.0V
V+ + |V-| (NOTE 1)...........................................+13V
ICC (DC VCC or GND current).........................+100mA
Input Voltages
TxIN, SHUTDOWN, ..................-0.3V to Vcc + 0.3V
RxIN...................................................................+25V
Output Voltages
TxOUT.............................................................+13.2V
RxOUT........................................-0.3V to (VCC +0.3V)
Short-Circuit Duration
TxOUT....................................................Continuous
Storage Temperature......................-65°C to +150°C
VCC = +3.0V to +5.5V, C1 - C4 = 0.1µF (tested at 3.3V +/-5%), C1 - C4 = 0.22µF (tested at 3.3V +/-10%),
C1 = 0.047µF and C2 - C4 = 0.33µF (tested at 5.0V +/-10%), TAMB = TMIN to TMAX, unless otherwise noted. Typical
values are at TA = 25°C
Power Dissipation per package
28-pin SSOP (derate 11.2mW/oC above +70oC)..........900mW
ELECTRICAL CHARACTERISTICS
PARAMETER MIN. TYP. MAX. UNITS CONDITIONS
DC CHARACTERISTICS
Supply Current, Shutdown 1.0 10 µA SHUTDOWN = GND,
TxIN = GND or VCC
Supply Current 0.3 1.0 mA SHUTDOWN = VCC, no load
LOGIC INPUTS AND RECEIVER OUTPUTS
Input Logic Threshold
LOW
HIGH 2.4
0.8 V
V
VCC = +3.3V or +5.0V, TxIN,
SHUTDOWN
Input Leakage Current +0.01 +1.0 µA TxIN, SHUTDOWN
TAMB = +25°C
Output Leakage Current +0.05 +10 µA Receivers disabled
Output Voltage LOW 0.4 V IOUT = 1.6mA
Output Voltage HIGH VCC -0.6 VCC -0.1 V IOUT = -1.0mA
DRIVER OUTPUTS
Output Voltage Swing +5.0 +5.4 V All driver outputs loaded with 3KΩ to
GND
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3
ELECTRICAL CHARACTERISTICS
PARAMETER MIN. TYP. MAX. UNITS CONDITIONS
DRIVER OUTPUTS (continued)
Output Resistance 300 Ω VCC = V+ = V- = 0V, VOUT=+2V
Output Short-Circuit Current +35 +60 mA VOUT = GND
RECEIVER INPUTS
Input Voltage Range -25 25 V
Input Threshold LOW 0.6 1.2 V Vcc = 3.3V
Input Threshold LOW 0.8 1.5 V Vcc = 5.0V
Input Threshold HIGH 1.5 2.4 V Vcc = 3.3V
Input Threshold HIGH 1.8 2.4 V Vcc = 5.0V
Input Hysteresis 0.5 V
Input Resistance 3 5 7 kΩ
TIMING CHARACTERISTICS
Maximum Data Rate 250 kbps RL = 3KΩ, CL = 1000pF, one
driver switching
Receiver Propagation Delay
tPHL
tPLH
0.15
0.15
µs Receiver input to Receiver
output, CL = 150pF
Receiver Output Enable Time 200 ns Normal operation
Receiver Output Disable Time 200 ns Normal operation
Driver Skew 100 ns | tPHL - tPLH |, TAMB = 25°C
Receiver Skew 50 ns | tPHL - tPLH |
Transition-Region Slew Rate 30 V/µs Vcc = 3.3V, RL = 3kΩ, TAMB =
25°C, measurements taken from
-3.0V to +3.0V or +3.0V to -3.0V
VCC = +3.0V to +5.5V, C1 - C4 = 0.1µF (tested at 3.3V +/-5%), C1 - C4 = 0.22µF (tested at 3.3V +/-10%),
C1 = 0.047µF and C2 - C4 = 0.33µF (tested at 5.0V +/-10%), TAMB = TMIN to TMAX, unless otherwise noted. Typical
values are at TA = 25°C
4
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • 510-668-7017 • www.exar.com SP3239E_100_020111
Unless otherwise noted, the following performance characteristics apply for VCC = +3.3V, 250kbps data rate, all
drivers loaded with 3kΩ, 0.1µF charge pump capacitors, and TAMB = +25°C.
Figure 2. Slew Rate VS. Load Capacitance
Figure 1. Transmitter Output Voltage VS. Load
Capacitance
-6
-4
-2
0
2
4
6
0 1000 2000 3000 4000 5000
pF
V o lt
V O H
V O L
Figure 3. Supply Current VS. Load Capacitance
when Transmitting Data
TYPICAL PERFORMANCE CHARACTERISTICS
0
5
10
15
20
25
0 1000 2000 3000 4000 5000
pF
V /u S
P O S . S R
NE G S R
0
10
20
30
40
50
60
0 1000 2000 3000 4000 5000
pF
m A
250Kbps
120Kbps
20 K bp s
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Table 1. Device Pin Description
NAME FUNCTION PIN NUMBER
C2+ Positive terminal of the symmetrical charge-pump capacitor C2. 1
GND Ground. 2
C2- Negative terminal of the symmetrical charge-pump capacitor C2. 3
V- Regulated -5.5V output generated by the charge pump. 4
T1OUT RS-232 Driver Output. 5
T2OUT RS-232 Driver Output. 6
T3OUT RS-232 Driver Output. 7
R1IN RS-232 receiver input. 8
R2IN RS-232 receiver input. 9
T4OUT RS-232 Driver Output. 10
R3IN RS-232 receiver input. 11
T5OUT RS-232 Driver Output. 12
NC No connect. 13
SHUTDOWN Apply logic LOW to shut down drivers and charge pump. 14
NC No Connect or tie HIGH for normal operation. 15
R1OUT Non-Inverting receiver - 1 output, active in shutdown. 16
T5IN TTL/CMOS driver input. 17
R3OUT TTL/CMOS receiver output. 18
T4IN TTL/CMOS driver input. 19
R2OUT TTL/CMOS receiver output. 20
R1OUT TTL/CMOS receiver output. 21
T3IN TTL/CMOS driver input. 22
T2IN TTL/CMOS driver input. 23
T1IN TTL/CMOS driver input. 24
C1- Negative terminal of the symmetrical charge-pump capacitor C1. 25
Vcc +3.0V to +5.5V supply voltage. 26
V+ Regulated +5.5V output generated by the charge pump. 27
C1+ Positive terminal of the symmetrical charge-pump capacitor C1. 28
6
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • 510-668-7017 • www.exar.com SP3239E_100_020111
Figure 5. SP3239E Typical Operating Circuit
SP3239E
28
25
3
1
27
4
26
GND
C1+
C1-
C2+
C2-
V+
V-
V
CC
0.1µF
+
C2
C5
C1
+
+C3
C4
+
+
14
VCC
V
CC
2
SHUTDOWN
5kΩ
16
21
20
18
8
9
11
RS-232
INPUTS
TTL/CMOS
OUTPUTS
R
1
OUT R
1
IN
R
1
OUT
R
2
IN
R
3
IN
R
2
OUT
R
3
OUT
24
23
22
5
6
7RS-232
OUTPUTS
TTL/CMOS
INPUTS
T
1
IN
T
2
OUT
T
2
IN
T
3
IN T
3
OUT
T
1
OUT
19
17
10
12
T
4
OUT
T
4
IN
T
5
IN T
5
OUT
0.1µF
0.1µF
0.1µF
0.1µF
5kΩ
5kΩ
Figure 4. SP3239E Pinout Conguration
T4IN
1
2
3
425
26
27
28
5
6
7
24
23
22
SHUTDOWN
C2-
V-
R1IN
R2IN
IN
NC
C2+
C1-
GND
V
CC
V+
T1IN
8
9
10
11 18
19
20
21
12
13
14
17
16
15
T OUT
T2OUT
T3OUT T3IN
T2IN
T5IN
R3OUT
R2OUT
R1OUT
R1OUT
SP3239E
C1+
T4OUT
T5OUT
NC
1
3
R
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7
DESCRIPTION
The SP3239E device meets the EIA/TIA-232
and ITU-T V.28/V.24 communication protocols
and can be implemented in battery-powered,
portable, or hand-held applications such as
notebook or palmtop computers. The SP3239E
devices feature Exar's proprietary and patented
(U.S.-- 5,306,954) on-board charge pump cir-
cuitry that generates ±5.5V RS-232 voltage levels
from a single +3.0V to +5.5V power supply. The
SP3239E devices can guarantee a data rate of
250kbps fully loaded.
The SP3239E is a 5-driver/3-receiver device,
ideal for portable or hand-held applications.
The SP3239E includes one complementary
always-active receiver that can monitor an
external device (such as a modem) in shutdown.
This aids in protecting the UART or serial
controller IC by preventing forward biasing
of the protection diodes where VCC may be
disconnected.
THEORY OF OPERATION
The SP3239E device is made up of three basic
circuit blocks:
1. Drivers
2. Receivers
3. The Exar proprietary charge pump
Drivers
The drivers are inverting level transmitters that
convert TTL or CMOS logic levels to 5.0V EIA/
TIA-232 levels with an inverted sense relative
to the input logic levels. Typically, the RS-232
output voltage swing is +5.4V with no load and
+5V minimum fully loaded. The driver outputs are
protected against innite short-circuits to ground
without degradation in reliability. These drivers
comply with the EIA-TIA-232-F and all previous
RS-232 versions.
The drivers can guarantee a data rate of 250kbps
fully loaded with 3kΩ in parallel with 1000pF,
ensuring compatibility with PC-to-PC communi-
cation software. All unused drivers inputs should
be connected to GND or VCC.
The slew rate of the driver output is internally
limited to a maximum of 30V/µs in order to meet
the EIA standards (EIA RS-232D 2.1.7, Paragraph
5). The transition of the loaded output from HIGH
to LOW also meets the monotonicity requirements
of the standard.
Figure 7 shows a loopback test circuit used to
test the RS-232 drivers. Figure 8 shows the test
results of the loopback circuit with all ve drivers
active at 120kbps with typical RS-232 loads in
parallel with 1000pF capacitors. Figure 9 shows
the test results where one driver was active
at 250kbps and all ve drivers loaded with an
RS-232 receiver in parallel with a 1000pF ca-
pacitor. A solid RS-232 data transmission rate
of 120kbps provides compatibility with many
designs in personal computer peripherals and
LAN applications.
Receivers
The receivers convert +5.0V EIA/TIA-232
levels to TTL or CMOS logic output levels. The
truth table logic of the SP3239E driver and receiver
outputs can be found in Table 2.
Figure 6. Interface Circuitry Controlled by
Microprocessor Supervisory Circuit
SP3239E
28
25
3
1
27
4
26
GND
C1+
C1-
C2+
C2-
V+
V-
VCC
0.1µF
+
C2
C5
C1
+
+C3
C4
+
+
14
VCC
2
SHUTDOWN
µP
Supervisor
IC
V
CC
VIN
RESET
5kΩ
5kΩ
5kΩ
24
23
22
16
21
20
18
5
6
7
8
9
11
RS-232
OUTPUTS
RS-232
INPUTS
T
1
IN
R
1
OUT R
1
IN
T
2
OUT
R
1
OUT
T
2
IN
T
3
IN T
3
OUT
T
1
OUT
R
2
IN
R
3
IN
R
2
OUT
R
3
OUT
UART
or
Serial µC
TxD
RTS
DTR
RxD
CTS
DSR
DCD
RI
19
17
10
12
T
4
OUT
T
4
IN
T
5
IN T
5
OUT
0.1µF
0.1µF
0.1µF
0.1µF
8
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • 510-668-7017 • www.exar.com SP3239E_100_020111
The SP3239E includes an additional non-in-
verting receiver with an output R1OUT. R1OUT
is an extra output that remains active and
monitors activity while the other receiver
outputs are forced into high impedance.
This allows a Ring Indicator (RI) signal from a
peripheral to be monitored without forward
biasing the TTL/CMOS inputs of the other
devices connected to the receiver outputs.
Since receiver input is usually from a transmis-
sion line where long cable lengths and system
interference can degrade the signal, the inputs
have a typical hysteresis margin of 300mV. This
ensures that the receiver is virtually immune to
noisy transmission lines. Should an input be left
unconnected, an internal 5kΩ pulldown resistor
to ground will commit the output of the receiver
to a HIGH state.
Charge Pump
The charge pump is an Exar–patented design
(U.S. 5,306,954) and uses a unique approach
compared to older less–efficient designs.
The charge pump still requires four external
capacitors, but uses a four–phase voltage
shifting technique to attain symmetrical 5.5V
power supplies. The internal power supply
consists of a regulated dual charge pump that
provides output voltages 5.5V regardless of
the input voltage (VCC) over the +3.0V to +5.5V
range. This is important to maintain compli-
Table 2. SHUTDOWN Logic
Figure 7. Loopback Test Circuit for RS-232 Driver
Data Transmission Rates
ant RS-232 levels regardless of power supply
uctuations.
The charge pump operates in a discontinuous
mode using an internal oscillator. If the output
voltages are less than a magnitude of 5.5V, the
charge pump is enabled. If the output voltages
exceed a magnitude of 5.5V, the charge pump
is disabled. This oscillator controls the four
phases of the voltage shifting. A description of
each phase follows.
Figure 9. Loopback Test results at 250Kbps
(All Drivers Fully Loaded)
Figure 8. Loopback Test results at 120kbps
(All Drivers Fully Loaded)
SP3239E
TxIN TxOUT
C1+
C1-
C2+
C2-
V+
V-
V
CC
0.1µF
+
C2
C5
C1
+
+C3
C4
+
+
LOGIC
INPUTS
V
CC
5kΩ
RxIN
RxOUT
LOGIC
OUTPUTS
SHUTDOWN
GND
V
CC
1000pF
0.1µF
0.1µF
0.1µF
0.1µF
Device: SP3239E
SHUTDOWN TxOUT RxOUT R1OUT
0High-Z High-Z Active
1 Active Active Active
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9
Phase 1
— VSS charge storage — During this phase of the
clock cycle, the positive side of capacitors C1 and
C2 are initially charged to VCC. Cl
+ is then switched
to GND and the charge in C1
– is transferred to C2
–.
Since C2
+ is connected to VCC, the voltage potential
across capacitor C2 is now 2 times VCC.
Phase 2
— VSS transfer — Phase two of the clock
connects the negative terminal of C2 to the VSS
storage capacitor and the positive terminal of
C2 to GND. This transfers a negative gener-
ated voltage to C3. This generated voltage is
regulated to a minimum voltage of -5.5V.
Simultaneous with the transfer of the voltage to C3,
the positive side of capacitor C1 is switched to VCC
and the negative side is connected to GND.
Phase 3
— VDD charge storage — The third phase of the
clock is identical to the rst phase — the charge
transferred in C1 produces –VCC in the negative
terminal of C1, which is applied to the negative
side of capacitor C2. Since C2
+ is at VCC, the volt-
age potential across C2 is 2 times VCC.
Phase 4
— VDD transfer — The fourth phase of the clock
connects the negative terminal of C2 to GND,
and transfers this positive generated voltage
across C2 to C4, the VDD storage capacitor. This
voltage is regulated to +5.5V. At this voltage,
the internal oscillator is disabled. Simultane-
ous with the transfer of the voltage to C4, the
positive side of capacitor C1 is switched to VCC
and the negative side is connected to GND, al-
lowing the charge pump cycle to begin again.
The charge pump cycle will continue as long
as the operational conditions for the internal
oscillator are present.
Since both V+ and V– are separately generated
from VCC, in a no–load condition V+ and V– will
be symmetrical. Older charge pump approaches
that generate V– from V+ will show a decrease in
the magnitude of V– compared to V+ due to the
inherent inefciencies in the design.
The clock rate for the charge pump typically
operates at 500kHz. The external capacitors
can be as low as 0.1µF with a 16V breakdown
voltage rating.
Figure 10. Charge Pump Waveform
10
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • 510-668-7017 • www.exar.com SP3239E_100_020111
Figure 12. Charge Pump — Phase 2
V
CC
= +5V
V
SS
Storage Capacitor
V
DD
Storage Capacito
r
C
1
C
2
C
3
C
4
+
+
+ +
–
–
––
-5.5V
VCC = +5V
–5V –5V
+5V
VSS Storage Capacitor
VDD Storage Capacitor
C1C2
C3
C4
+
+
+ +
–
–
––
Figure 11. Charge Pump — Phase 1
Figure 13. Charge Pump — Phase 3
V
CC
= +5V
–5V –5V
+5V
V
SS
Storage Capacitor
V
DD
Storage Capacitor
C
1
C
2
C
3
C
4
+
+
+ +
–
–
––
Figure 14. Charge Pump — Phase 4
V
CC
= +5V
V
SS
Storage Capacitor
V
DD
Storage Capacito
r
C
1
C
2
C
3
C
4
+
+
+ +
–
–
––
+5.5V
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • 510-668-7017 • www.exar.com SP3239E_100_020111
11
Figure 15. Circuit for the connectivity of the SP3239E with a DB-9 connector
6. DCE Ready
7. Request to Send
8. Clear to Send
9. Ring Indicator
DB-9 Connector Pins:
1. Received Line Signal Detector
2. Received Data
3. Transmitted Data
4. Data Terminal Ready
5. Signal Ground (Common)
6
7
8
9
1
2
3
4
5
DB-9
Connector
26
VCC
0.1µF
C5
+
VCC
GND
2
8
9
11
5kΩ
5kΩ
5kΩ
16
21
20
18
5
6
7
R
1
OUT R
1
IN
R
1
OUT
R
2
IN
R
3
IN
R
2
OUT
R
3
OUT
10
12
24
23
22
T
1
IN
T
2
OUT
T
2
IN
T
3
IN T
3
OUT
T
1
OUT
19
17
T
4
OUT
T
4
IN
T
5
IN T
5
OUT
SP3239E
28
25
3
1
27
4
C3
C4
+
+
C1+
C1-
C2+
C2-
V+
V-
+
C2
C1 +
14
V
CC
SHUTDOWN
0.1µF
0.1µF
0.1µF
0.1µF
12
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • 510-668-7017 • www.exar.com SP3239E_100_020111
ESD TOLERANCE
The SP3239E device incorporates ruggedized
ESD cells on all driver output and receiver input
pins. The ESD structure is improved over our
previous family for more rugged applications
and environments sensitive to electro-static dis-
charges and associated transients. The improved
ESD tolerance is at least +15kV without damage
nor latch-up.
There are different methods of ESD testing ap-
plied:
a) MIL-STD-883, Method 3015.7
b) IEC61000-4-2 Air-Discharge
c) IEC61000-4-2 Direct Contact
The Human Body Model has been the generally
accepted ESD testing method for semi-con-
ductors. This method is also specified in
MIL-STD-883, Method 3015.7 for ESD testing.
The premise of this ESD test is to simulate the
human body’s potential to store electro-static
energy and discharge it to an integrated circuit.
The simulation is performed by using a test
model as shown in Figure 16. This method
will test the IC’s capability to withstand an ESD
transient during normal handling such as in
manufacturing areas where the IC's tend to be
handled frequently.
The IEC-61000-4-2, formerly IEC801-2, is gen-
erally used for testing ESD on equipment and
systems. For system manufacturers, they must
guarantee a certain amount of ESD protection
since the system itself is exposed to the outside
environment and human presence. The premise
with IEC61000-4-2 is that the system is required
to withstand an amount of static electricity when
ESD is applied to points and surfaces of the
equipment that are accessible to personnel dur-
ing normal usage. The transceiver IC receives
most of the ESD current when the ESD source
is applied to the connector pins. The test circuit
for IEC61000-4-2 is shown on Figure 17. There
are two methods within IEC61000-4-2, the Air
Discharge method and the Contact Discharge
method.
With the Air Discharge Method, an ESD voltage
is applied to the equipment under test (EUT)
through air. This simulates an electrically charged
person ready to connect a cable onto the rear of
the system only to nd an unpleasant zap just
before the person touches the back panel. The
high energy potential on the person discharges
through an arcing path to the rear panel of the
system before he or she even touches the sys-
tem. This energy, whether discharged directly
or through air, is predominantly a function of
the discharge current rather than the discharge
voltage. Variables with an air discharge such as
approach speed of the object carrying the ESD
potential to the system and humidity will tend to
change the discharge current. For example, the
rise time of the discharge current varies with the
approach speed.
The Contact Discharge Method applies the ESD
current directly to the EUT. This method was
devised to reduce the unpredictability of the ESD
arc. The discharge current rise time is constant
since the energy is directly transferred without the
air-gap arc. In situations such as hand held sys-
tems, the ESD charge can be directly discharged
to the equipment from a person already holding
the equipment. The current is transferred on to
the keypad or the serial port of the equipment
directly and then travels through the PCB and
nally to the IC.
Figure 16. ESD Test Circuit for Human Body Model
R
C
Device
Under
Test
DC Power
Source
C
S
R
S
SW1 SW2
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • 510-668-7017 • www.exar.com SP3239E_100_020111
13
DEVICE PIN HUMAN BODY IEC61000-4-2
TESTED MODEL Air Discharge Direct Contact Level
Driver Outputs +15kV +15kV +8kV 4
Receiver Inputs +15kV +15kV +8kV 4
The circuit models in Figures 16 and 17 represent
the typical ESD testing circuit used for all three
methods. The CS is initially charged with the DC
power supply when the rst switch (SW1) is on.
Now that the capacitor is charged, the second
switch (SW2) is on while SW1 switches off. The
voltage stored in the capacitor is then applied
through RS, the current limiting resistor, onto the
device under test (DUT). In ESD tests, the SW2
switch is pulsed so that the device under test
receives a duration of voltage.
For the Human Body Model, the current limiting
resistor (RS) and the source capacitor (CS) are
1.5kΩ an 100pF, respectively. For IEC-61000-4-2,
the current limiting resistor (RS) and the source ca-
pacitor (CS) are 330Ω an 150pF, respectively.
The higher CS value and lower RS value in the
IEC61000-4-2 model are more stringent than the
Human Body Model. The larger storage capaci-
tor injects a higher voltage to the test point when
SW2 is switched on. The lower current limiting
resistor increases the current charge onto the
test point.
Figure 18. ESD Test Waveform for IEC61000-4-2
Figure 17. ESD Test Circuit for IEC61000-4-2
Table 3. Transceiver ESD Tolerance Levels
R
S
and
R
V
add up to 330Ω for IEC61000-4-2.
R
C
Device
Under
Test
DC Power
Source
C
S
R
S
SW1 SW2
R
V
Contact-Discharge Model
t = 0ns t = 30ns
0A
15A
30A
I →
t →
14
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • 510-668-7017 • www.exar.com SP3239E_100_020111
PACKAGE: 28 PIN SSOP
▲
▲
e
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • 510-668-7017 • www.exar.com SP3239E_100_020111
15
ORDERING INFORMATION
For Tape and Reel option add "/TR", Example: SP3239ECA-L/TR.
Part Number Temp. Range Package
SP3239ECA-L 0C to +70C 28 Pin SSOP
SP3239ECA-L/TR 0C to +70C 28 Pin SSOP
SP3239EEA-L -40C to +85C 28 Pin SSOP
SP3239EEA-L/TR -40C to +85C 28 Pin SSOP
16
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • 510-668-7017 • www.exar.com SP3239E_100_020111
REVISION HISTORY
Notice
EXAR Corporation reserves the right to make changes to any products contained in this publication in order to improve design, performance or reli-
ability. EXAR Corporation assumes no representation that the circuits are free of patent infringement. Charts and schedules contained herein are
only for illustration purposes and may vary depending upon a user's specic application. While the information in this publication has been carefully
checked; no responsibility, however, is assumed for inaccuracies.
EXAR Corporation does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can
reasonably be expected to cause failure of the life support system or to signicantly affect its safety or effectiveness. Products are not authorized for
use in such applications unless EXAR Corporation receives, in writing, assurances to its satisfaction that: (a) the risk of injury or damage has been
minimized ; (b) the user assumes all such risks; (c) potential liability of EXAR Corporation is adequately protected under the circumstances.
Copyright 2011 EXAR Corporation
Datasheet February 2011
For technical support please email Exar's Serial Technical Support group at : serialtechsupport@exar.com
Reproduction, in part or whole, without the prior written consent of EXAR Corporation is prohibited.
DATE REVISION DESCRIPTION
02/28/05 -- Legacy Sipex Datasheet
02/01/11 1.0.0 Convert to Exar Format, Update ordering information and
change ESD specication to IEC61000-4-2
