AD1671-703F - Analog Devices, Inc.

12-Bit A/D Converter

AD1671

1.0 SCOPE

This specification documents the detail requirements for space qualified product manufactured on

Analog Devices, Inc.’s QML certified line per MIL-PRF-38535 Level V except as modified herein.

The manufacturing flow described in the STANDARD SPACE LEVEL PRODUCTS PROGRAM

brochure is to be considered a part of this specification. This brochure can be found at:

http://www.analog.com/aerospace

This data sheet specifically details the space grade version of this product. A more detailed

operational description and a complete data sheet for commercial product grades can be found at

www.analog.com/AD1671

2.0 Part Number. The complete part number(s) of this specification follow:

Part Number Description

AD1671-703D 12-Bit A/D Converter

AD1671-703F 12-Bit A/D Converter

AD1671-713D 12-Bit A/D Converter with radiation test

AD1671-713F 12-Bit A/D Converter with radiation test

2.1 Case Outline.

Letter Descriptive designator Case Outline (Lead Finish per MIL-PRF-38535)

D CDIP2-T28 28-Lead sidebrazed DIP (.6")

F CDFP3-F28 28-Lead bottom-brazed flatpack

Figure 1 - Terminal connections.

ASD0010777 Rev. I

Information furnished by Analog Devices is believed to be accurate and

reliable. However, no responsibilit y is assumed by Analog Devices for its use,

nor for any infringements of patents or other rights of third parties that may One Technology Wa y, P.O. Box 9106, Norwood, MA 02062-9106,

result from its use. Specifications subj ect to chang e without notice. No license U.S.A.

is granted by implication or otherwise under any patent or patent rights of

Analog Devices. Trademarks and registered trademarks are the property of Tel: 781.329.4700 www.analog.com

AD1671

3.0 Absolute Maximum Ratings. (TA = 25°C, unless otherwise noted)

VCC to ACOM................................................................................................-0.5V to +6.5V

VEE to ACOM................................................................................................-6.5V to +0.5V

VLOGIC to DCOM........................................................................................... -0.5V to +6.5V

ACOM to DCOM......................................................................................... -1.0V to +1.0V

VCC to VLOGIC ................................................................................................ -6.5V to +6.5V

ENCODE to DCOM......................................................................... -0.5V to VLOGIC +0.5V

REF IN, BPO/UPO to ACOM ............................................................. -0.5V to VCC +0.5V

AIN to ACOM............................................................................................... -11V to +11V

Power Dissipation ..................................................................................................1000mW

Operating Temperature Range...................................................................-55°C to +125°C

Storage Temperature Range.......................................................................-65°C to +150°C

Lead Temperature (Soldering, 60 sec.) ....................................................................+300°C

Junction Temperature (TJ)........................................................................................+150°C

3.1 Thermal Characteristics:

Thermal Resistance, SBDIP (D) Package

Junction-to-Case (Θ JC) = 28°C/W Max

Junction-to-Ambient (Θ JA) = 60°C/W Max

Thermal Resistance, Bottom brazed (F) Package

Junction-to-Case (Θ JC) = 22°C/W Max

Junction-to-Ambient (Θ JA) = 60°C/W Max

Figure 2. Functional block diagram

ASD0010777 Rev. I | Page 2 of 7

AD1671

4.0 Electrical Table: TABLE I

Parameter

See notes at end of table Symbol Conditions

Note 1/ Sub-

group

Limit

Min

Limit

Max

Units

Resolution RES 1, 2, 3 12 Bits

Integral nonLinearity INL All codes histogram 1 2.5 LSB

2, 3 3

Differential nonLinearity DNL All codes histogram 1, 2, 3 11 Bits

Unipolar offset error VOSE 2.5V, 5V span 1 9 ±LSB

Unipolar offset drift TCVOS 2.5V, 5V span TA = -55ºC, +125ºC 8 20 ±ppm/° C

Gain Error AE Unipolar & bipolar 1 0.37 %FSR

Gain drift TCA Unipolar & Bipolar TA = -55ºC, +125ºC 8 40 ±ppm/° C

Bipolar zero error BPOE 2.5V, 5V span 1 10 ±LSB

Bipolar zero drift TCBPO 2.5V, 5V span TA = -55ºC, +125ºC 8 30 ±ppm/° C

Analog input ranges VIN Unipolar

Mode Rin=10MΩ 3/ 1,2,3 2.5 V

Rin=10KΩ 3/ 1,2,3 5

Bipolar Mode Rin=10MΩ 3/ 1,2,3 2.5

Rin=10KΩ 3/ 1,2,3 5

Reference volt a ge VRO Unipolar & Bipolar 2/ 1 2.475 2.525 V

Reference drift TCVRO Unipolar & Bipolar 2/

TA = -55°C, +125°C 8 30 ±ppm/° C

Reference Current IREF Unipolar Mode 2/ 1 2.5 mA

Bipolar Mode 2/ 1 1

Power dissipati on PD VS = ±5.25V, VLOGIC = +5.5V 1,2,3 750 mW

Power Supply Current ICC Tested under static conditions 1,2,3 75 mA

IEE -75

ILOGIC 5

PSRR VCC Full-Scale Change measured 1,2,3 4 ±LSB

VEE

VLOGIC

Input Logic voltages VIH Encode Input 1,2,3 2.0 V

VIL 0.8

Input Logic Current IIH 1,2,3 -10 10 µA

IIL

Output Logic Vol t a ge VOH IOH = 500µA

IOL = 1.6mA 1,2,3 2.4 V

VOL 0.4

Output Logic C ur rent IOH 1,2,3 500 µA

IOL -1.6 mA

Signal to noise plus distortion SINAD fIN = 100KHz, fS = 1MHz, -0.5 dB in p ut 9,10,11 68 dB

Effective number of bits ENOB 9 11 Bits

Total harmonic distortion THD 9,10,11 -73 dB

Peak spurious of peak

harmonic component PS 9,10,11 -75

Intermod ul at i o n distortion Σ2nd 2nd order products 9,10,11 -75

Σ3rd 3rd order products

Conversion time TCONV See figure 3 9,10,11 800 ns

Sample Rate 2/ 9,10,11 1.25 MSPS

ASD0010777 Rev. I | Page 3 of 7

AD1671

TABLE I (continued)

Parameter

See notes at end of table Symbol Conditions

Note 1/ Sub-

group

Limit

Min

Limit

Max

Units

Encode widt h hi g h (sh o rt

encode) tENC See figure 3 2/ 9,10,11 20 50

ns

Encode width Low (long

encode) tENCL See figure 3 2/ 9,10,11 20

DAV pulse width tDAV See figure 3 9,10,11 150 300

Encode falling edge delay tF See figure 3 2/ 9 0

Start new conversion delay tR See figure 3 2/ 9 0

Data and QTR delay from

DAV falling edge tDD See figure 3 2/ 9 20

Data and OTR delay from

DAV rising edge tSS See figure 3 2/ 9 20

TABLE I NOTES:

1/ VCC = +5V, VEE = -5V, VLOGIC = +5V, unless otherwise specified.

2/ This parameter is guaranteed, but not necessarily tested.

3/ RIN values are typical values only.

Encode Pulse High

Figure 3. Timing Diagrams

ASD0010777 Rev. I | Page 4 of 7

AD1671

Encode Pulse Low

Figure 3. Timing diagram.

4.1 Electrical Test Requirements:

Table II

Test Requirements Subgroups (in accordance

with MIL-PRF-38535,

Table III)

Interim Electrical Parameters 1

Final Electrical Parameters 1, 2, 3, 8, 9, 10, 11 1/ 2/

Group A Test Requirements 1, 2, 3, 9, 10, 11

Group C end-point electrical parameters 1 2/

Group D end-point electrical parameters 1

Group E end-point electrical parameters 1

1/ PDA applies to Subgroup 1 only. Deltas excluded from PDA.

2/ See table III for delta parameters.

ASD0010777 Rev. I | Page 5 of 7

AD1671

4.2 Table III. Lifetest / Burn-in delta limits.

Table III

TEST

TITLE BURN-IN

ENDPOINT LIFETEST

ENDPOINT DELTA UNITS

ICC 75 75 ± 7.5 mA max

VOH 2.4 2.4 ± 0.24 V min

VOL 0.4 0.4 ± 0.1 V max

5.0 Life Test/Burn-In Circuit:

5.1 HTRB is not applicable for this drawing.

5.2 Burn-in is per MIL-STD-883 Method 1015, test condition B.

5.3 Steady state life test is per MIL-STD-883 Method 1005, test condition B.

ASD0010777 Rev. I | Page 6 of 7

AD1671

Rev Description of Change Date

A Initiate Feb. 29, 2000

B Add flatpack. Add radiation part number. Exclude Delta’s from PDA.

Delete reference to unused subgroups in table II. Update Table III. Aug. 21, 2001

C Update web address. Feb. 14, 2002

D Change Table I AC parameters from subgroups 1, 2, 3 to subgroups 9, 10,

11. (SINAD, THD, PS, Σ 2nd and Σ 3RD)

Jan. 9, 2003

E Delete burn-in circuit Aug. 5, 2003

F Change TCVOS, TCA, TCBPO, TCVRO from subgroups 2, 3 to subgroup 8.

Add subgroup 8 to Table II. Jun. 14, 2004

G Update header/footer and add to 1.0 Scope description. Feb. 12, 2008

H Add Junction Temperature (TJ).....+150°C April 4, 2008

I Change subgroup for ENOB to 9 Aug. 3, 2009

registered trademarks are the property of their respective

companies.

Printed in the U.S.A. 8/09

ASD0010777 Rev. I | Page 7 of 7