REV. B
AD7414/AD7415
–9–
Table XIV. T
LOW
Register
D7 D6 D5 D4 D3 D2 D1 D0
MSB B6 B5 B4 B3 B2 B1 B0
AD7414/AD7415 SERIAL INTERFACE
Control of the AD7414/AD7415 is carried out via the I
2
C com-
patible serial bus. The AD7414/AD7415 is connected to this
bus as a slave device, under the control of a master device, e.g.,
the processor.
SERIAL BUS ADDRESS
Like all I
2
C compatible devices, the AD7414/AD7415 has a 7-bit
serial address. The four MSBs of this address for the AD7414/
AD7415 are set to 1001. The AD7414/AD7415 comes in four
versions, the AD7414/AD7415-0, AD7414/AD7415-1, AD7414-2,
and AD7414-3. The first two versions have three different I
2
C
addresses available, which are selected by either tying the AS pin
to GND, to VDD, or letting the pin float (see Table I). By giving
different addresses for the four versions, up to eight AD7414s or six
AD7415s can be connected to a single serial bus, or the addresses
can be set to avoid conflicts with other devices on the bus.
The serial bus protocol operates as follows:
1. The master initiates data transfer by establishing a START
condition, defined as a high to low transition on the serial
data line SDA, while the serial clock line SCL remains high.
This indicates that an address/data stream will follow. All
slave peripherals connected to the serial bus respond to the
START condition and shift in the next eight bits, consisting
of a 7-bit address (MSB first) plus a R/W bit, which determines
the direction of the data transfer, i.e. whether data will be
written to or read from the slave device.
The peripheral whose address corresponds to the transmitted
address responds by pulling the data line low during the low
period before the ninth clock pulse, known as the Acknowl-
edge bit. All other devices on the bus now remain idle while
the selected device waits for data to be read from or written
to it. If the R/W bit is a 0, the master will write to the slave
device. If the R/W bit is a 1, the master will read from the
slave device.
2. Data is sent over the serial bus in sequences of nine clock
pulses, eight bits of data followed by an Acknowledge bit
from the receiver of data. Transitions on the data line must
occur during the low period of the clock signal and remain
stable during the high period, since a low to high transition
when the clock is high may be interpreted as a STOP signal.
3. When all data bytes have been read or written, stop conditions
are established. In WRITE mode, the master will pull the
data line high during the 10th clock pulse to assert a STOP
condition. In READ mode, the master device will pull the
data line high during the low period before the ninth clock
pulse. This is known as No Acknowledge. The master will
then take the data line low during the low period before the
10th clock pulse, then high during the 10th clock pulse to
assert a STOP condition.
Any number of bytes of data may be transferred over the serial
bus in one operation, but it is not possible to mix read and write
in one operation because the type of operation is determined at
the beginning and cannot subsequently be changed without
starting a new operation.
WRITING TO THE AD7414/AD7415
Depending on the register being written to, there are two different
writes for the AD7414/AD7415.
Writing to the Address Pointer Register for a Subsequent Read
In order to read data from a particular register, the Address
Pointer register must contain the address of that register. If it does
not, the correct address must be written to the Address Pointer
register by performing a single-byte write operation, as shown in
Figure 6. The write operation consists of the serial bus address
followed by the address pointer byte. No data is written to any
of the data registers. A read operation is then performed to read
the register.
Writing a Single Byte of Data to the Configuration Register,
T
HIGH
Register, or T
LOW
Register
All three registers are 8-bit registers so only one byte of data can
be written to each register. Writing a single byte of data to one of
these registers consists of the serial bus address, the Data register
address written to the Address Pointer register, followed by the
data byte written to the selected data register. This is illustrated
in Figure 7.
READING DATA FROM THE AD7414/AD7415
Reading data from the AD7414/AD7415 is a 1- or 2-byte opera-
tion. Reading back the contents of the Configuration register,
T
HIGH
register, or T
LOW
register is a single-byte read operation, as
shown in Figure 8. The register address was previously set up by
a single-byte write operation to the Address Pointer register. Once
the register address has been set up, any number of reads can
subsequently be done from that register without having to write
to the Address Pointer register again. To read from another
register, the Address Pointer register will have to be written to
again to set up the relevant register address.
Reading data from the Temperature Value register is a 2-byte
operation, as shown in Figure 9. The same rules apply for a
2-byte read as a single-byte read.
SMBus ALERT
The AD7414 ALERT output is an SMBus interrupt line for
devices that want to trade their ability to master for an extra pin.
The AD7414 is a slave-only device and uses the SMBus ALERT
to signal to the host device that it wants to talk. The SMBus
ALERT on the AD7414 is used as an overtemperature indicator.
The ALERT pin has an open-drain configuration that allows the
ALERT outputs of several AD7414s to be wired-AND together
when the ALERT pin is active low. Use D4 of the Configuration
register to set the active polarity of the ALERT output. The
power-up default is active low. The ALERT function can be
disabled or enabled by setting D5 of the Configuration register
to 1 or 0, respectively.