1. Product profile
1.1 General description
PNP Resistor-Equipped Transistor (RET) family in Surface-Mounted Device (SMD) plastic
packages.
1.2 Features and benefits
1.3 Applications
1.4 Quick reference data
PDTA143E series
PNP resistor-equipped transistors;
R1 = 4.7 k, R2 = 4.7 k
Rev. 8 — 8 December 2011 Product data sheet
Table 1. Product overview
Type number Package NPN
complement Package
configuration
NXP JEITA JEDEC
PDTA143EE SOT416 SC-75 - PDTC143EE ultra small
PDTA143EM SOT883 SC-101 - PDTC143EM leadless ultra small
PDTA143ET SOT23 - TO-236AB PDTC143ET small
PDTA143EU SOT323 SC-70 - PDTC143EU very small
100 mA output current capability Reduces component count
Built-in bias resistors Reduces pick and place costs
Simplifies circuit design AEC-Q101 qualified
Digital applications in automotive and
industrial segments
Cost-saving alternative for BC847/857
series in digital applications
Control of IC inputs Switching loads
Table 2. Quick reference data
Symbol Parameter Conditions Min Typ Max Unit
VCEO collector-emitter voltage open base - - 50 V
IOoutput current - - 100 mA
R1 bias resistor 1 (input) 3.3 4.7 6.1 k
R2/R1 bias resistor ratio 0.8 1 1.2
PDTA143E_SER All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 8 — 8 December 2011 2 of 17
NXP Semiconductors PDTA143E series
PNP resistor-equipped transistors; R1 = 4.7 k, R2 = 4.7 k
2. Pinning information
3. Ordering information
4. Marking
[1] * = placeholder for manufacturing site code
Table 3. Pinning
Pin Description Simplified outline Graphic symbol
SOT23; SOT323; SOT416
1 input (base)
2 GND (emitter)
3 output (collector)
SOT883
1 input (base)
2 GND (emitter)
3 output (collector)
006aaa144
12
3
sym003
3
2
1R1
R2
3
1
2
Transparent
top view
sym003
3
2
1R1
R2
Table 4. Orderin g information
Type number Package
Name Description Version
PDTA143EE SC-75 plastic surface-mounted package; 3 leads SOT416
PDT A143EM SC-101 leadless ultra small plastic package; 3 solder lands;
body 1.0 0.6 0.5 mm SOT883
PDTA143ET - plastic surface-mounted package; 3 le ads SOT23
PDTA143EU SC-70 plastic surface-mounted package; 3 leads SOT323
Table 5. Marking codes
Type number Marking code[1]
PDTA143EE 01
PDTA143EM DL
PDTA143ET *01
PDTA143EU *01
PDTA143E_SER All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 8 — 8 December 2011 3 of 17
NXP Semiconductors PDTA143E series
PNP resistor-equipped transistors; R1 = 4.7 k, R2 = 4.7 k
5. Limiting values
[1] Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated and standard
footprint.
[2] Reflow soldering is the only recommended soldering method.
[3] Device mounted on an FR4 PCB with 70 m copper strip line, standard footprint.
Table 6. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
VCBO collector-base voltage open emitter - 50 V
VCEO collector-emitter voltage open base - 50 V
VEBO emitter-base voltage open collector - 10 V
VIinput voltage
positive - +10 V
negative - 30 V
IOoutput current - 100 mA
ICM peak collector current single pulse;
tp1ms -100 mA
Ptot total power dissipation Tamb 25 C
PDTA143EE (SOT416) [1][2] -150mW
PDTA143EM (SOT883) [2][3] -250mW
PDTA143ET (SOT23) [1] -250mW
PDTA143EU (SOT323) [1] -200mW
Tjjunction temperature - 150 C
Tamb ambient temperature 65 +150 C
Tstg storage temperature 65 +150 C
PDTA143E_SER All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 8 — 8 December 2011 4 of 17
NXP Semiconductors PDTA143E series
PNP resistor-equipped transistors; R1 = 4.7 k, R2 = 4.7 k
6. Thermal characteristics
[1] Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint.
[2] Reflow soldering is the only recommended soldering method.
[3] Device mounted on an FR4 PCB with 70 m copper strip line, standard footprint.
(1) SOT23; FR4 PCB, standard footprint
SOT883; FR4 PCB with 70 m copper strip line, standard footprint
(2) SOT323; FR4 PCB, standard footprint
(3) SOT416; FR4 PCB, standard footprint
Fig 1. Power derating curves
Tamb (°C)
-75 17512525 75-25
006aac778
100
200
300
Ptot
(mW)
0
(1)
(2)
(3)
Table 7. Thermal characteris tics
Symbol Parameter Conditions Min Typ Max Unit
Rth(j-a) thermal resistance from junction
to ambient in free air
PDTA143EE (SOT416) [1][2] --830K/W
PDTA143EM (SOT883) [2][3] --500K/W
PDTA143ET (SOT23) [1] --500K/W
PDTA143EU (SOT323) [1] --625K/W
PDTA143E_SER All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 8 — 8 December 2011 5 of 17
NXP Semiconductors PDTA143E series
PNP resistor-equipped transistors; R1 = 4.7 k, R2 = 4.7 k
FR4 PCB, standard footprint
Fig 2. Transient thermal impedance from junction to ambient as a function of pulse duration for
PDTA143EE (SOT416); typical values
FR4 PCB, 70 m copper strip line
Fig 3. Transient thermal impedance from junction to ambient as a function of pulse duration for
PDTA143EM (SOT883); typic al values
006aac781
10-5 1010-2
10-4 102
10-1 tp (s)
10-3 103
1
102
10
103
Zth(j-a)
(K/W)
1
duty cycle = 1
0.75 0.5
0.33 0.2
0.1
0.05
0.02 0.01
0
006aac782
10-5 1010-2
10-4 102
10-1 tp (s)
10-3 103
1
102
10
103
Zth(j-a)
(K/W)
1
duty cycle = 1
0.75 0.5
0.33 0.2
0.1 0.05
0.02
0.01
0
PDTA143E_SER All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 8 — 8 December 2011 6 of 17
NXP Semiconductors PDTA143E series
PNP resistor-equipped transistors; R1 = 4.7 k, R2 = 4.7 k
FR4 PCB, standard footprint
Fig 4. Transient thermal impedance from junction to ambient as a function of pulse duration for
PDTA143ET (SOT23); typical values
FR4 PCB, standard footprint
Fig 5. Transient thermal impedance from junction to ambient as a function of pulse duration for
PDTA143EU (SOT323); typical values
006aac779
10-5 1010-2
10-4 102
10-1 tp (s)
10-3 103
1
102
10
103
Zth(j-a)
(K/W)
1
duty cycle = 1
0.75 0.5
0.33 0.2
0.1
0.05
0.02 0.01
0
006aac780
10-5 1010-2
10-4 102
10-1 tp (s)
10-3 103
1
102
10
103
Zth(j-a)
(K/W)
1
duty cycle = 1
0.75 0.5
0.33 0.2
0.1
0.05
0.02 0.01
0
PDTA143E_SER All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 8 — 8 December 2011 7 of 17
NXP Semiconductors PDTA143E series
PNP resistor-equipped transistors; R1 = 4.7 k, R2 = 4.7 k
7. Characteristics
[1] Characteristics of built-in transistor
Table 8. Characteristics
Tamb =25
C unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Unit
ICBO collector-base cut-off
current VCB =50 V; IE=0A - - 100 nA
ICEO collector-emitter
cut-off current VCE =30 V; I B=0A - - 1A
VCE =30 V; IB=0A;
Tj= 150 C--5A
IEBO emitter-base cut-off
current VEB =5V; I
C=0A - - 900 A
hFE DC current gain VCE =5V; I
C=10 mA 30 - -
VCEsat collector-emitter
saturation voltage IC=10 mA; IB=0.5 mA - - 150 mV
VI(off) off-state input voltage VCE =5V; I
C=100 A- 1.1 0.5 V
VI(on) on-state input voltage V CE =0.3 V;
IC=20 mA 2.5 1.9 - V
R1 bias resistor 1 (input) 3.3 4.7 6.1 k
R2/R1 bias resistor ratio 0.8 1 1.2
Cccollector capacitance VCB =10 V; IE=i
e=0A;
f=1MHz --3pF
fTtransition frequency VCE =5V; I
C=10 mA;
f = 100 MHz [1] -180-MHz
PDTA143E_SER All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 8 — 8 December 2011 8 of 17
NXP Semiconductors PDTA143E series
PNP resistor-equipped transistors; R1 = 4.7 k, R2 = 4.7 k
VCE =5V
(1) Tamb = 100 C
(2) Tamb =25C
(3) Tamb =40 C
IC/IB=20
(1) Tamb = 100 C
(2) Tamb =25C
(3) Tamb =40 C
Fig 6. DC current gain as a function of collector
current; typical values Fig 7. Collec tor-emitter sa turation voltage as a
function of collector current; typical values
VCE =0.3 V
(1) Tamb =40 C
(2) Tamb =25C
(3) Tamb = 100 C
VCE =5V
(1) Tamb =40 C
(2) Tamb =25C
(3) Tamb = 100 C
Fig 8. On-state input voltage as a function of
collector current; typical valu es Fig 9. Off-state input voltage as a function of
collector current; typical values
IC (mA)
-10-1 -102
-10-1
006aac836
102
10
103
hFE
1
(1)
(2)
(3)
IC (mA)
-1 -102
-10
006aac837
-10-1
-1
VCEsat
(V)
-10-2
(1)
(2)
(3)
006aac838
IC (mA)
-10-1 -102
-10-1
-1
-10
VI(on)
(V)
-10-1
(1)
(2)
(3)
IC (mA)
-10-1 -10-1
006aac839
-1
-10
VI(off)
(V)
-10-1
(1)
(2)
(3)
PDTA143E_SER All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 8 — 8 December 2011 9 of 17
NXP Semiconductors PDTA143E series
PNP resistor-equipped transistors; R1 = 4.7 k, R2 = 4.7 k
8. Test information
8.1 Quality information
This product has been qualified in accordance with the Automotive Electronics Council
(AEC) standard Q101 - Stress test qualification for discrete semiconductors, and is
suitable for use in automotive applications.
f=1MHz; T
amb =25CV
CE =5V; T
amb =25C
Fig 10. Collector capacitance as a function of
collector-base voltage; typical values Fig 11. Transition frequency as a fu nc tio n o f c oll e cto r
current; typical values of built-in transistor
VCB (V)
0 -50-40-20 -30-10
006aac840
4
2
6
8
Cc
(pF)
0
006aac763
IC (mA)
-10-1 -102
-10-1
102
103
fT
(MHz)
10
PDTA143E_SER All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 8 — 8 December 2011 10 of 17
NXP Semiconductors PDTA143E series
PNP resistor-equipped transistors; R1 = 4.7 k, R2 = 4.7 k
9. Package outline
10. Packing information
[1] For further information and the availability of packing methods, see Section 14.
Fig 12. Package outline PDTA143EE ( SOT416/SC-75) Fig 13. Package outline PDTA143EM (SOT883/SC-101)
Fig 14. Package outline PDTA143ET (SOT23) Fig 15. Package outline PDTA143EU (SOT323/SC-70)
04-11-04Dimensions in mm
0.95
0.60
1.8
1.4
1.75
1.45 0.9
0.7
0.25
0.10
1
0.30
0.15
12
30.45
0.15
03-04-03Dimensions in mm
0.62
0.55
0.55
0.47 0.50
0.46
0.65
0.20
0.12
3
21
0.30
0.22
0.30
0.22
1.02
0.95
0.35
04-11-04Dimensions in mm
0.45
0.15
1.9
1.1
0.9
3.0
2.8
2.5
2.1 1.4
1.2
0.48
0.38 0.15
0.09
12
3
04-11-04Dimensions in mm
0.45
0.15
1.1
0.8
2.2
1.8
2.2
2.0 1.35
1.15
1.3
0.4
0.3 0.25
0.10
12
3
Table 9. Packing methods
The indicated -xxx are the last three digits of the 12NC ordering code.[1]
Type number Package Description Packing quantity
3000 5000 10000
PDTA143EE SOT416 4 mm pitch, 8 mm tape and reel -115 - -135
PDTA143EM SOT883 2 mm pitch, 8 mm tape and reel - - -315
PDTA143ET SOT23 4 mm pitch, 8 mm tape and reel -215 - -235
PDTA143EU SOT323 4 mm pitch, 8 mm tape and reel -115 - -135
PDTA143E_SER All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 8 — 8 December 2011 11 of 17
NXP Semiconductors PDTA143E series
PNP resistor-equipped transistors; R1 = 4.7 k, R2 = 4.7 k
11. Soldering
Reflow soldering is the only recommended soldering method.
Fig 16. Reflow soldering footprint PDTA143EE (SOT416/SC-75)
Reflow soldering is the only recommended soldering method.
Fig 17. Reflow soldering footprint PDTA143EM (SOT883/SC-101)
solder lands
solder resist
occupied area
solder paste
sot416_fr
0.85
1.7
2.2
2
0.5
(3×)
0.6
(3×)
1
1.3
Dimensions in mm
solder lands
solder resist
occupied area
solder paste
sot883_fr
1.3
0.3
0.6 0.7
0.4
0.9
0.3
(2×)
0.4
(2×)
0.25
(2×)
R0.05 (12×)
0.7
Dimensions in mm
PDTA143E_SER All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 8 — 8 December 2011 12 of 17
NXP Semiconductors PDTA143E series
PNP resistor-equipped transistors; R1 = 4.7 k, R2 = 4.7 k
Fig 18. Reflow soldering footprint PDTA143ET (SOT23)
Fig 19. Wave soldering footprint PDTA143ET (SOT23)
solder lands
solder resist
occupied area
preferred transport direction during soldering
sot023_fw
2.8
4.5
1.4
4.6
1.4
(2×)
1.2
(2×)
2.2
2.6
Dimensions in mm
PDTA143E_SER All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 8 — 8 December 2011 13 of 17
NXP Semiconductors PDTA143E series
PNP resistor-equipped transistors; R1 = 4.7 k, R2 = 4.7 k
Fig 20. Reflow soldering footprint PDTA143EU (SOT323/SC-70)
Fig 21. Wave soldering footprint PDTA143EU (SOT323/SC-70)
solder lands
solder resist
occupied area
solder paste
sot323_fr
2.65
2.35 0.6
(3×)
0.5
(3×)
0.55
(3×)
1.325
1.85
1.3
3
2
1
Dimensions in mm
sot323_fw
3.65 2.1
1.425
(3×)
4.6
09
(2×)
2.575
1.8
solder lands
solder resist
occupied area
preferred transport
direction during soldering
Dimensions in mm
PDTA143E_SER All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 8 — 8 December 2011 14 of 17
NXP Semiconductors PDTA143E series
PNP resistor-equipped transistors; R1 = 4.7 k, R2 = 4.7 k
12. Revision history
Table 10. Revision history
Document ID Release date Data sheet status Change notice Supersedes
PDTA143E_SER v.8 20111208 Product data sheet - PDTA143E_SERIES v.7
Modifications: The format of this document has been redesigned to comply with the new identity
guidelines of NXP Semiconductors.
Legal texts have been adapted to the new company name where appropriate.
Type numbers PDTA143EEF, PDTA1 43EK and PDTA143ES removed.
Section 1 “Product profile: updated
Section 3 “Ordering information: added
Section 4 “Marking: updated
Figure 1 to 11: added
Section 6 “Thermal characteristics: updated
Table 8 “Characteristics: Vi(on) redefined to VI(on) on-state input voltage, Vi(off) redefined to
VI(off) off-state input voltage, ICEO updated, fT added
Section 8 “Test information: added
Section 9 “Package outline: superseded by minimized package outline drawings
Section 10 “Packing information: added
Section 11 “Soldering: added
Section 13 “Legal information: updated
PDTA143E_SERIES v.7 20040804 Product data sheet - PDTA143E_SERIES v.6
PDTA143E_SERIES v.6 20030908 Product specification - PDTA143E_SERIES v.5
PDTA143E_SERIES v.5 20030411 Product specification - -
PDTA143E_SER All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 8 — 8 December 2011 15 of 17
NXP Semiconductors PDTA143E series
PNP resistor-equipped transistors; R1 = 4.7 k, R2 = 4.7 k
13. Legal information
13.1 Data sheet status
[1] Please consult the most recently issued document before initiating or completing a design.
[2] The term ‘short data sheet’ is explained in section “Definitions”.
[3] The product status of de vice(s) descr ibed in th is docume nt may have cha nged since this docume nt was publis hed and ma y dif fer in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
13.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
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Short data sheet — A short dat a sheet is an extract from a full data sheet
with the same product type number(s) and tit le. A short data sh eet is intended
for quick reference only and shou ld not be rel ied u pon to cont ain det ailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall pre vail.
Product specificat io nThe information and data provided in a Product
data sheet shall define the specification of the product as agreed between
NXP Semiconductors and its customer, unless NXP Semiconductors and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the NXP Semiconductors product is
deemed to off er functions and qualities beyond tho se described in the
Product data sheet.
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Limited warr a nty and liability — Information in this document is believed to
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Notwithstanding any damages that customer might incur for any reason
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damage. NXP Semiconductors and its suppliers accept no liability for
inclusion and/or use of NXP Semiconducto rs products in such equipment or
applications and ther efore such inclu sion and/or use is at the cu stomer’s own
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Applications — Applications that are described herein for any of these
products are for il lustrative purposes only. NXP Semiconductors makes no
representation or warranty tha t such application s will be suitable for the
specified use without further testing or modification.
Customers are responsible for the design and ope ration of their applications
and products using NXP Semiconductors product s, and NXP Semiconductors
accepts no liability for any assistance with applications or customer product
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products planned, as well as fo r the planned application and use of
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applications and products.
NXP Semiconductors does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default in the
customer’s applications or products, or the application or use by customer’s
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testing for th e customer’s applications and products using NXP
Semiconductors products in order to avoid a default of the applications and
the products or of the application or use by customer’s third party
customer(s). NXP does not accept any liability in this respect.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanent ly and irreversibly affect
the quality and reliability of the device.
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construed as an of fer t o sell product s that is open for accept ance or t he grant,
conveyance or implication of any license under any copyri ghts, patents or
other industrial or intellectual property rights.
Document status[1][2] Product status[3] Definition
Objective [short] data sheet Development This document contain s data from the objective specification for product development.
Preliminary [short] dat a sheet Qualification This document contains data from the preliminary specification.
Product [short] dat a sheet Production This document contains the product specification.
PDTA143E_SER All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 8 — 8 December 2011 16 of 17
NXP Semiconductors PDTA143E series
PNP resistor-equipped transistors; R1 = 4.7 k, R2 = 4.7 k
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
13.4 Trademarks
Notice: All refe renced brands, produc t names, service names and trademarks
are the property of their respect i ve ow ners.
14. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
NXP Semiconductors PDTA143E series
PNP resistor-equipped transistors; R1 = 4.7 k, R2 = 4.7 k
© NXP B.V. 2011. All rights reserved.
For more information, please visit: http://www.nxp.co m
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 8 December 2011
Documen t identifier: PDTA143E_SER
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
15. Contents
1 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.1 General description . . . . . . . . . . . . . . . . . . . . . 1
1.2 Features and benefits. . . . . . . . . . . . . . . . . . . . 1
1.3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.4 Quick reference data . . . . . . . . . . . . . . . . . . . . 1
2 Pinning information. . . . . . . . . . . . . . . . . . . . . . 2
3 Ordering information. . . . . . . . . . . . . . . . . . . . . 2
4 Marking. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
5 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3
6 Thermal characteristics . . . . . . . . . . . . . . . . . . 4
7 Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 7
8 Test information. . . . . . . . . . . . . . . . . . . . . . . . . 9
8.1 Quality information . . . . . . . . . . . . . . . . . . . . . . 9
9 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 10
10 Packing information . . . . . . . . . . . . . . . . . . . . 10
11 Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
12 Revision history. . . . . . . . . . . . . . . . . . . . . . . . 14
13 Legal information. . . . . . . . . . . . . . . . . . . . . . . 15
13.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 15
13.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
13.3 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 15
13.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 16
14 Contact information. . . . . . . . . . . . . . . . . . . . . 16
15 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17