1. General description
The 74LV123 is a low-voltage Si-gate CMOS device and is pin and function compatible
with the 74HC123; 74HCT123. It is a dual retriggerable monostable multivibrator which
uses three methods to control the output pulse width:
1. The basic pulse time is programmed by the selection of an external resistor (REXT)
and capacitor (CEXT). These are norma lly con n ec ted as sh own in Figure 9.
2. Once triggered, the basic output pulse width may be extended by retriggering the
gated active LOW- going edge input (nA) or the active HIGH-going edge in put (nB). By
repeating this process, the ou tput pulse peri od (nQ = HIGH, n Q = LOW) can be made
as long as desired (see Figure 12).
3. Alternatively, an output delay can be ter mina ted at an y time by a LOW-going edg e on
input nRD, which also inhibits the triggering (see Figure 13).
Schmitt-trigger action in the nA and nB inputs makes the circuit highly tolerant of slower
input rise and fall times.
2. Features and benefits
Optimized for low-voltage applications: 1.0 V to 5.5 V
Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V
Typical output ground bounce: < 0.8 V at VCC = 3.3 V and Tamb = 25 C
Typical HIGH-leve l ou tpu t vo ltage (VOH) undershoot: > 2 V at VCC = 3.3 V and
Tamb = 25 C
DC triggered from active HIGH or active LOW inputs
Retriggerable for very long pulses up to 100 % duty factor
Direct reset termin ate s ou tp ut puls es
Schmitt-trigger action on all inputs except for the reset input
74LV123
Dual retriggerable monostable multivibrator with reset
Rev. 7 — 12 December 2011 Product data sheet
74LV123 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 7 — 12 December 2011 2 of 24
NXP Semiconductors 74LV123
Dual retriggerable monostable multivibrator with reset
3. Ordering information
4. Functional diagram
Tabl e 1. Ordering information
Type number Package
Temperature range Name Description Version
74LV123N 40 Cto+125C DIP16 plastic dual in-line package; 16 leads (300 mil) SOT38-4
74LV123D 40 Cto+125C SO16 plastic small outline package; 16 leads; body width
3.9 mm SOT109-1
74LV123DB 40 Cto+125C SSOP16 plastic shrink small outline package; 16 leads; body width
5.3 mm SOT338-1
74LV123PW 40 Cto+125C TSSOP16 plastic thin shrink small outline package; 16 leads; body
width 4.4 mm SOT403-1
74LV123BQ 40 Cto+125C DHVQFN16 plastic dual in-line compatible thermal enhanced very thin
quad flat package; no leads; 16 terminals;
body 2.5 3.5 0.85 mm
SOT763-1
Fig 1. Logic symbol Fig 2. IEC logic symbol
001aae521
14
1
2
3
1A
1B
1RD
9
10
11
2A
2B
2RD
15
S
Q
Q
T
RD
13
4
1CEXT
1REXT/CEXT
1Q
1Q
6
7
5
12
2CEXT
2REXT/CEXT
2Q
2Q
1
2
3
13
CX
&
RCX
R
R
14
4
15
001aae522
9
10
11
5
CX
&
RCX
6
12
7
74LV123 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 7 — 12 December 2011 3 of 24
NXP Semiconductors 74LV123
Dual retriggerable monostable multivibrator with reset
Fig 3. Functional dia g ra m
1Q
Q
2RD
RD
S13
1REXT/CEXT
15
1CEXT
14
1Q
Q4
9
001aaa610
1RD
2A
1
1A
10
2B
2
11
3
1B
T
Q
RD
S
2REXT/CEXT
7
2CEXT
6
2Q
5
Q2Q
12
T
74LV123 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 7 — 12 December 2011 4 of 24
NXP Semiconductors 74LV123
Dual retriggerable monostable multivibrator with reset
Fig 4. Logic diagram
001aae524
V
CC
nREXT/CEXT
Q
Q
CL CL
R
CL
CLCL V
CC
V
CC
RR
RD
R
A
B
74LV123 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 7 — 12 December 2011 5 of 24
NXP Semiconductors 74LV123
Dual retriggerable monostable multivibrator with reset
5. Pinning information
5.1 Pinning
5.2 Pin description
(1) The die substrate is attached to this
pad using conductive die attach
material. It cannot be used as a supply
pin or input.
Fig 5. Pin configuration for DIP16, SO16,
SSOP16 and TSSOP16 Fig 6. Pin configuration for DHVQFN16
74LV123
1A V
CC
1B 1REXT/CEXT
1RD 1CEXT
1Q 1Q
2Q 2Q
2CEXT 2RD
2REXT/CEXT 2B
GND 2A
001aag678
1
2
3
4
5
6
7
8
10
9
12
11
14
13
16
15
001aag650
74LV123
2REXT/CEXT 2B
2CEXT 2RD
2Q 2Q
1Q 1Q
1RD 1CEXT
1B 1REXT/CEXT
GND
2A
1A
VCC
Transparent top view
7 10
6 11
5 12
413
3 14
2 15
8
9
1
16
terminal 1
index area
VCC(1)
Table 2. Pin description
Symbol Pin Description
1A 1 negative-edge triggered input 1
1B 2 positive-edge triggered input 1
1RD 3 direct reset LOW and positive-edge triggered input 1
1Q 4 active LOW output 1
2Q 5 active HIGH output 2
2CEXT 6 external capacitor connection 2
2REXT/CEXT 7 external resistor and capacitor connection 2
GND 8 ground (0 V)
2A 9 negative-edge triggered input 2
2B 10 positive-edge triggered inpu t 2
2RD 11 direct reset LOW and positive-edge triggered input 2
2Q 12 active LOW output 2
1Q 13 active HIGH output 1
1CEXT 14 external capacitor connection 1
1REXT/CEXT 15 external resistor and capacitor connection 1
VCC 16 supply voltage
74LV123 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 7 — 12 December 2011 6 of 24
NXP Semiconductors 74LV123
Dual retriggerable monostable multivibrator with reset
6. Functional description
[1] H = HIGH voltage level;
L = LOW voltage level;
X = don’t care;
= LOW-to-HIGH transition;
= HIGH-to-LOW transition;
= one HIGH level output pulse
= one LOW level output pulse
[2] If the monostable multivibrator was triggered before this condition was established, the pulse will continue as programmed.
Table 3. Function table[1]
Input Output
nRDnA nB nQ nQ
LXXLH
XHXL
[2] H[2]
XXLL
[2] H[2]
HL
HH
LH
74LV123 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 7 — 12 December 2011 7 of 24
NXP Semiconductors 74LV123
Dual retriggerable monostable multivibrator with reset
7. Limiting values
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] For DIP16 package: Ptot derates linearly with 12 mW/K above 70 C.
[3] For SO16 package: Ptot derates linearly with 8 mW/K above 70 C.
[4] For SSOP16 and TSSOP16 packages: Ptot derates linearly with 5.5 mW/K above 60 C.
[5] For DHVQFN16 package: Ptot derates linearly with 4.5 mW/K above 60 C.
8. Recommended operating conditions
[1] The 74LV123 is guaranteed to function down to VCC = 1.0 V (input levels GND or VCC); Section 9 “S t atic characteristics are guaranteed
from VCC = 1.2 V to VCC = 5.5 V.
[2] Except for Schmitt-trigger inputs nA and nB.
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions Min Max Unit
VCC supply voltage 0.5 +7 V
IIK input clamping current VI<0.5 V or VI>V
CC +0.5V [1] -20 mA
IOK output clamping current VO<0.5 V or VO>V
CC +0.5V [1] -50 mA
IOoutput current except for pins nREXT/CEXT;
VO=0.5 V to (VCC +0.5V) [1] -25 mA
ICC supply current - +50 mA
IGND ground current - 50 mA
Tstg storage temperature 65 +150 C
Ptot total power dissipation Tamb =40 C to +125 C
DIP16 package [2] - 750 mW
SO16 package [3] - 500 mW
SSOP16 package [4] - 500 mW
TSSOP16 package [4] - 500 mW
DHVQFN16 package [5] - 500 mW
Table 5. Recommended operating conditions
Symbol Parameter Conditions Min Typ Max Unit
VCC supply voltage [1] 1.0 3.3 5.5 V
VIinput voltage 0 - VCC V
VOoutput voltage 0 - VCC V
Tamb ambient temperature in free air 40 +25 +125 C
t/V input transition rise and fall rate VCC = 1.0 V to 2.0 V [2] - - 500 ns/V
VCC = 2.0 V to 2.7 V - - 200 ns/V
VCC = 2.7 V to 3.6 V - - 100 ns/V
VCC = 3.6 V to 5.5 V - - 50 ns/V
74LV123 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 7 — 12 December 2011 8 of 24
NXP Semiconductors 74LV123
Dual retriggerable monostable multivibrator with reset
9. Static characteristics
Table 6. Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions Min Typ[1] Max Unit
Tamb = 40 C to +85 C
VIH HIGH-level input voltage VCC = 1.2 V 0.9 - - V
VCC = 2.0 V 1.4 - - V
VCC = 2.7 V to 3.6 V 2.0 - - V
VCC = 4.5 V to 5.5 V 0.7 VCC -- V
VIL LOW-level input voltage VCC = 1.2 V - - 0.3 V
VCC = 2.0 V - - 0.6 V
VCC = 2.7 V to 3.6 V - - 0.8 V
VCC = 4.5 V to 5.5 V - - 0.3 VCC V
VOH HIGH-level output voltage VI = VIH or VIL
lO = 100 A; VCC = 1.2 V - 1.2 - V
lO = 100 A; VCC = 2.0 V 1.8 2.0 - V
lO = 100 A; VCC = 2.7 V 2.5 2.7 - V
lO = 100 A; VCC = 3.0 V 2.8 3.0 - V
lO = 100 A; VCC = 4.5 V 4.3 4.5 - V
lO = 6 mA; VCC = 3.0 V 2.40 2.82 - V
lO = 12 mA; VCC = 4.5 V 3.60 4.20 - V
VOL LOW-level output voltage VI = VIH or VIL
IO = 100 A; VCC = 1.2 V - 0 - V
IO = 100 A; VCC = 2.0 V - 0 0.2 V
IO = 100 A; VCC = 2.7 V - 0 0.2 V
IO = 100 A; VCC = 3.0 V - 0 0.2 V
IO = 100 A; VCC = 4.5 V - 0 0.2 V
IO = 6 mA; VCC = 3.0 V - 0.25 0.40 V
IO = 12 mA; VCC = 4.5 V - 0.35 0.55 V
IIinput leakage current VI = VCC or GND; VCC = 5.5 V - - 1.0 A
ICC supply current VI = VCC or GND; IO = 0 A; VCC =5.5V - - 20.0 A
ICC additional supply current VI = V CC 0.6 V; VCC = 2.7 V to 3.6 V - - 500 A
CIinput capacitance - 3.5 - pF
Tamb = 40 C to +125 C
VIH HIGH-level input voltage VCC = 1.2 V 0.9 - - V
VCC = 2.0 V 1.4 - - V
VCC = 2.7 V to 3.6 V 2.0 - - V
VCC = 4.5 V to 5.5 V 0.7 VCC -- V
VIL LOW-level input voltage VCC = 1.2 V - - 0.3 V
VCC = 2.0 V - - 0.6 V
VCC = 2.7 V to 3.6 V - - 0.8 V
VCC = 4.5 V to 5.5 V - - 0.3 VCC V
74LV123 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 7 — 12 December 2011 9 of 24
NXP Semiconductors 74LV123
Dual retriggerable monostable multivibrator with reset
[1] All typical values are measured at Tamb = 25 C.
VOH HIGH-level output voltage VI = VIH or VIL
lO = 100 A; VCC = 1.2 V - - - V
lO = 100 A; VCC = 2.0 V 1.8 - - V
lO = 100 A; VCC = 2.7 V 2.5 - - V
lO = 100 A; VCC = 3.0 V 2.8 - - V
lO = 100 A; VCC = 4.5 V 4.3 - - V
lO = 6 mA; VCC = 3.0 V 2.2 - - V
lO = 12 mA; VCC = 4.5 V 3.5 - - V
VOL LOW-level output voltage VI = VIH or VIL
IO = 100 A; VCC = 1.2 V - - - V
IO = 100 A; VCC = 2.0 V - - 0.2 V
IO = 100 A; VCC = 2.7 V - - 0.2 V
IO = 100 A; VCC = 3.0 V - - 0.2 V
IO = 100 A; VCC = 4.5 V - - 0.2 V
IO = 6 mA; VCC = 3.0 V - - 0.5 V
IO = 12 mA; VCC = 4.5 V - - 0.65 V
IIinput leakage current VI = VCC or GND; VCC = 5.5 V - - 1.0 A
ICC supply current VI = VCC or GND; IO = 0 A; VCC =5.5V - - 160 A
ICC additional supply current VI = V CC 0.6 V; VCC = 2.7 V to 3.6 V - - 850 A
Table 6. Static characteristics …continued
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions Min Typ[1] Max Unit
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Product data sheet Rev. 7 — 12 December 2011 10 of 24
NXP Semiconductors 74LV123
Dual retriggerable monostable multivibrator with reset
10. Dynamic characteristics
Table 7. Dynamic characteristics
GND = 0 V; tr = tf
2.5 ns; for test circuit see Figure 8.
Symbol Parameter Conditions 40 C to +85 C40 C to +125 CUnit
Min Typ[1] Max Min Max
Propagation delay; see Figure 7
tpd propagation delay nRD, nA and nB to nQ [2]
VCC = 1.2 V - 120 - - - ns
VCC = 2.0 V - 40 76 - 92 ns
VCC = 2.7 V - 30 56 - 68 ns
VCC = 3.0 V to 3.6 V - 25 48 - 57 ns
VCC = 4.5 V to 5.5 V - 18 40 - 46 ns
nRD to nQ (reset) [2]
VCC = 1.2 V - 100 - - - ns
VCC = 2.0 V - 30 57 - 68 ns
VCC = 2.7 V - 23 43 - 51 ns
VCC = 3.0 V to 3.6 V - 20 38 - 45 ns
VCC = 4.5 V to 5.5 V - 14 31 - 36 ns
Inputs nA, nB and nRD; see Figure 7
tWpulse width nA = LOW
VCC = 2.0 V 30 5 - 40 - ns
VCC = 2.7 V 25 3.5 - 30 - ns
VCC = 3.0 V to 3.6 V 20 3.0 - 25 - n s
VCC = 4.5 V to 5.5 V 15 2.5 - 20 - n s
nB = HIGH
VCC = 2.0 V 30 13 - 40 - ns
VCC = 2.7 V 25 8 - 30 - ns
VCC = 3.0 V to 3.6 V 20 7 - 25 - n s
VCC = 4.5 V to 5.5 V 15 5 - 20 - n s
nRD = LOW; see Figure 13
VCC = 2.0 V 35 6 - 45 - ns
VCC = 2.7 V 30 5 - 40 - ns
VCC = 3.0 V to 3.6 V 25 4 - 30 - n s
VCC = 4.5 V to 5.5 V 20 3 - 25 - n s
trtrig retrigger time nB to nA; see Figure 12
VCC = 2.0 V - 70 - - - ns
VCC = 2.7 V - 55 - - - ns
VCC = 3.0 V to 3.6 V - 45 - - - n s
VCC = 4.5 V to 5.5 V - 40 - - - n s
74LV123 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 7 — 12 December 2011 11 of 24
NXP Semiconductors 74LV123
Dual retriggerable monostable multivibrator with reset
[1] All typical values are measured at Tamb = 25 C and nominal supply values (VCC = 3.3 V and 5.0 V).
[2] tpd is the same as tPLH and tPHL; CEXT = 0 pF; REXT =5 k.
[3] For other REXT and CEXT combinations see Figure 11 and Section 12.1.1 “Basic timing.
[4] CEXT has no limits.
[5] CPD is used to determine the dynamic power dissipation (PD in W).
PD=C
PD VCC2fiN+(CLVCC2fo) where:
fi= input frequency in MHz;
fo= output frequency in MHz;
CL= output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
(CLVCC2fo) = sum of the outputs.
Outputs; nQ = LOW and nQ = HIGH, see Figure 7
tWpulse width CEXT = 100 nF; REXT = 10 k
VCC = 2.0 V -470- - -ns
VCC = 2.7 V - 460 - - - ns
VCC = 3.0 V to 3.6 V - 450 - - - ns
VCC = 4.5 V to 5.5 V - 430 - - - ns
CEXT = 0 pF; REXT = 5 k
VCC = 2.0 V - 100 - - - ns
VCC = 2.7 V - 90 - - - ns
VCC = 3.0 V to 3.6 V - 80 - - - n s
VCC = 4.5 V to 5.5 V - 70 - - - n s
External component s
REXT external
resistance see Figure 11 [3]
VCC = 1.2 V 10 - 1000 - - k
VCC = 2.0 V 5 - 1000 - - k
VCC = 2.7 V 3 - 1000 - - k
VCC = 3.0 V to 3.6 V 2 - 1000 - - k
VCC = 4.5 V to 5.5 V 2 - 1000 - - k
CEXT external
capacitance see Figure 11 [3][4]
VCC = 1.2V --- - -pF
VCC = 2.0V --- - -pF
VCC = 2.7V --- - -pF
VCC = 3.0 V to 3.6 V - - - - - pF
VCC = 4.5 V to 5.5 V - - - - - pF
Dynamic power dissipation
CPD power dissipation
capacitance VCC = 3.3 V; VI = GND to VCC [5] -60- - -pF
Table 7. Dynamic characteristics …continued
GND = 0 V; tr = tf
2.5 ns; for test circuit see Figure 8.
Symbol Parameter Conditions 40 C to +85 C40 C to +125 CUnit
Min Typ[1] Max Min Max
74LV123 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 7 — 12 December 2011 12 of 24
NXP Semiconductors 74LV123
Dual retriggerable monostable multivibrator with reset
11. Waveforms
Measurement points are given in Table 8.
Fig 7. Propagation delays from inputs (nA, nB, nRD) to outputs (nQ, nQ)
001aae528
nB input
(nA LOW)
tW
tW
tPLH
VM
VM
VM
tW
tPLH
tW
tPHL
tPHL
VM
tW
tPLH
nA input
(nB HIGH)
nRD input
nQ output
nQ output
VM
tPHL
tPHL tPLH
RESET
Table 8. Measurement points
VCC VM
2.7 V 1.5 V
< 2.7 V 0.5 VCC
Test data is given in Table 9.
Definitions for test circuit:
RL = Load resistance.
CL = Load capacitance including jig and probe capacitance.
RT = Termination resistance should be equal to Zo of the pulse generator.
Fig 8. Load circuitry for switching times
001aae533
VCC
VIVO
DUT
CL
50 pF
RTRL
1 kΩ
PULSE
GENERATOR
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Product data sheet Rev. 7 — 12 December 2011 13 of 24
NXP Semiconductors 74LV123
Dual retriggerable monostable multivibrator with reset
12. Application information
12.1 Timing components
12.1.1 Basic timing
The basic output pulse wid th is essentially determined by the values of the external timing
components REXT and CEXT.
If CEXT > 10 nF, the following formula is valid: tW = K REXT CEXT (typ.) where:
tW = output pulse width in ns
REXT = external resistor in k
CEXT = external capacitor in pF
K = constant: this is 0.45 for VCC = 5.0 V and 0.48 for VCC = 2.0 V (see Figure 10)
The inherent test jig and pin capacitance at pin 15 and pin 7 (nREXT/CEXT) is
approximately 7 pF.
Table 9. Test data
Supply voltage Input Load Test
VCC VItr, tfCLRL
< 2.7 V VCC 2.5 ns 50 pF 1 ktPHL, tPLH
2.7 V to 3.6 V 2.7 V 2.5 ns 50 pF 1 k tPHL, t PLH
4.5 V VCC 2.5 ns 50 pF 1 ktPHL, tPLH
(1) For minimum noise generation it is recommended to ground pins 6 (2CEXT) and 14 (1CEXT)
externally to pin 8 (GND).
Fig 9. Timing components connections
001aae525
CEXT REXT
nA
nB
VCC
nCEXT
nRD
nREXT/CEXT
nQ
nQ
GND
74LV123
13 (5)
4 (12)
15 (7)14 (6)
3 (11)
8
1 (9)
2 (10)
(1)
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Product data sheet Rev. 7 — 12 December 2011 14 of 24
NXP Semiconductors 74LV123
Dual retriggerable monostable multivibrator with reset
12.1.2 Retrigger timing
The time to retrigger the monostable multivibrator depends on the values of REXT and
CEXT. The output pulse width will only be extended when the time between the active
going edges of the trigger pulses meets the minimum retrigger time. If CEXT > 10 pF, the
next formula for the set-up time of a retrigger pulse is valid:
at VCC = 5.0 V: trtrig = 30 + 0.19REXT CEXT0.9 + 13 REXT1.05 (typ.)
at VCC = 3.0 V: trtrig = 41 + 0.15REXT CEXT0.9 1 REXT (typ.)
where:
trtrig = retrigger time in ns
CEXT = external capacitor in pF
REXT = external resistor in k
CEXT =10nF; R
EXT = 10 k to 100 k VCC = 3.3 V and Tamb = 25 C
Fig 10. Typical ‘K’ factor as a function of VCC Fig 11. Typical output pulse width as a function of the
external capacitance values
001aae529
VCC (V)
0642
0.4
0.2
0.6
0.8
'K'
factor
0
001aae530
103
102
105
104
106
tW
(ns)
0
Cext (pF)
110
4
103
10 102
REXT = 100 kΩ
50 kΩ
10 kΩ
2 kΩ
nRD = HIGH
Fig 12. Output pu lse control using retrigg e r pu ls e nA
74LV123 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 7 — 12 December 2011 15 of 24
NXP Semiconductors 74LV123
Dual retriggerable monostable multivibrator with reset
12.1.3 Reset timing
12.2 Power considerations
12.2.1 Power-up
When the monostable multivibrator is powered-up, it may produce an output pulse with a
pulse width defined by the values of REXT and CEXT. This output pulse can be eliminated
using the RC circuit on pin nRD shown in Figure 14.
12.2.2 Power-down
A large capacitor (CEXT) may cause problems when powering-down the monostable due
to the energy stored in this capacitor. When a system containing this device is
powered-down or a rapid decrease of VCC to zero occurs, the monostable may sustain
damage, due to the capacitor discharging through the input protection diodes. To avoid
this possibility, connect a damping diode DEXT (preferably a germaniu m or Schottky type
diode) able to withstand large current surges - see Figure 14.
nA = LOW
Fig 13. Output pulse control using reset input nRD
001aae527
nB input
nQ output
nRD input
t
W
t
W
Fig 14. Power-up and po we r-do wn circuit
001aae532
VCC
RESET nRD
CEXT REXT
DEXT
nA
nB
VCC
nCEXTGND nREXT/CEXT
nQ
nQ
74LV123 13 (5)
4 (12)
15 (7)14 (6)8
1 (9)
2 (10)
3 (11)
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Product data sheet Rev. 7 — 12 December 2011 16 of 24
NXP Semiconductors 74LV123
Dual retriggerable monostable multivibrator with reset
13. Package outline
Fig 15. Package outline SOT38-4 (DIP16)
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC JEITA
SOT38-4 95-01-14
03-02-13
MH
c
(e )
1
ME
A
L
seating plane
A1
wM
b1
b2
e
D
A2
Z
16
1
9
8
E
pin 1 index
b
0 5 10 mm
scale
Note
1. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included.
UNIT A
max. 12 b1(1) (1) (1)
b2cD E e M Z
H
L
mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
A
min. A
max. bmax.
w
ME
e1
1.73
1.30 0.53
0.38 0.36
0.23 19.50
18.55 6.48
6.20 3.60
3.05 0.2542.54 7.62 8.25
7.80 10.0
8.3 0.764.2 0.51 3.2
inches 0.068
0.051 0.021
0.015 0.014
0.009
1.25
0.85
0.049
0.033 0.77
0.73 0.26
0.24 0.14
0.12 0.010.1 0.3 0.32
0.31 0.39
0.33 0.030.17 0.02 0.13
DIP16: plastic dual in-line package; 16 leads (300 mil) SOT38-4
74LV123 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 7 — 12 December 2011 17 of 24
NXP Semiconductors 74LV123
Dual retriggerable monostable multivibrator with reset
Fig 16. Pa ckage outline SOT109-1 (SO16)
X
wM
θ
A
A1
A2
bp
D
HE
Lp
Q
detail X
E
Z
e
c
L
vMA
(A )
3
A
8
9
1
16
y
pin 1 index
UNIT A
max. A1A2A3bpcD
(1) E(1) (1)
eH
ELL
pQZywv θ
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC JEITA
mm
inches
1.75 0.25
0.10 1.45
1.25 0.25 0.49
0.36 0.25
0.19 10.0
9.8 4.0
3.8 1.27 6.2
5.8 0.7
0.6 0.7
0.3 8
0
o
o
0.25 0.1
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
Note
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.
1.0
0.4
SOT109-1 99-12-27
03-02-19
076E07 MS-012
0.069 0.010
0.004 0.057
0.049 0.01 0.019
0.014 0.0100
0.0075 0.39
0.38 0.16
0.15 0.05
1.05
0.041
0.244
0.228 0.028
0.020 0.028
0.012
0.01
0.25
0.01 0.004
0.039
0.016
0 2.5 5 mm
scale
SO16: plastic small outline package; 16 leads; body width 3.9 mm SOT109-1
74LV123 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 7 — 12 December 2011 18 of 24
NXP Semiconductors 74LV123
Dual retriggerable monostable multivibrator with reset
Fig 17. Pa ckage outline SOT338-1 (SSOP16)
UNIT A1A2A3bpcD
(1) E(1) eH
ELL
pQZywv θ
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC JEITA
mm 0.21
0.05 1.80
1.65 0.25 0.38
0.25 0.20
0.09 6.4
6.0 5.4
5.2 0.65 1.25
7.9
7.6 1.03
0.63 0.9
0.7 1.00
0.55 8
0
o
o
0.130.2 0.1
DIMENSIONS (mm are the original dimensions)
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
SOT338-1 99-12-27
03-02-19
(1)
wM
bp
D
HE
E
Z
e
c
vMA
X
A
y
18
16 9
θ
A
A1
A2
Lp
Q
detail X
L
(A )
3
MO-150
pin 1 index
0 2.5 5 mm
scale
SSOP16: plastic shrink small outline package; 16 leads; body width 5.3 mm SOT338-1
A
max.
2
74LV123 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 7 — 12 December 2011 19 of 24
NXP Semiconductors 74LV123
Dual retriggerable monostable multivibrator with reset
Fig 18. Package outline SOT403-1 (TSSOP16)
UNIT A1A2A3bpcD
(1) E(2) (1)
eH
ELL
pQZywv θ
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC JEITA
mm 0.15
0.05 0.95
0.80 0.30
0.19 0.2
0.1 5.1
4.9 4.5
4.3 0.65 6.6
6.2 0.4
0.3 0.40
0.06 8
0
o
o
0.13 0.10.21
DIMENSIONS (mm are the original dimensions)
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
0.75
0.50
SOT403-1 MO-153 99-12-27
03-02-18
wM
bp
D
Z
e
0.25
18
16 9
θ
A
A1
A2
Lp
Q
detail X
L
(A )
3
HE
E
c
vMA
X
A
y
0 2.5 5 mm
scale
TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm SOT403-1
A
max.
1.1
pin 1 index