LM27341QMY/NOPB - Texas Instruments

LM27341/2

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BOOST

GND/DAP

VOUT

C2 L1

SYNC

AVIN

CLK

OFF

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An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,

intellectual property matters and other important disclaimers. PRODUCTION DATA.

LM27341

LM27342

LM27341-Q1

LM27342-Q1

SNVS497F –NOVEMBER 2008–REVISED SEPTEMBER 2016

LM2734x and LM2734x-Q1 2-MHz, 1.5-A or 2-A, Wide Input Range, Step-Down, DC-DC

Regulator With Frequency Synchronization

1 Features

1• Space-Saving, 3 mm × 3 mm 10-Pin WSON and

MSOP-PowerPAD Packages

• Wide Input Voltage Range: 3 V to 20 V

• Wide Output Voltage Range: 1 V to 18 V

• LM27341 Delivers 1.5-A Maximum Output Current

• LM27342 Delivers 2-A Maximum Output Current

• High Switching Frequency: 2 MHz

• Frequency Synchronization:

1 MHz < fSW < 2.35 MHz

• 150-mΩNMOS Switch With Internal Bootstrap

Supply

• 70-nA Shutdown Current

• Internal Voltage Reference Accuracy of 1%

• Peak Current-Mode, PWM Operation

• Thermal Shutdown

• LM27341-Q1 and LM27342-Q1 are AEC-Q100

Grade 1 Qualified and Manufactured on an

Automotive Grade Flow

2 Applications

• Local 12-V to Vcore Step-Down Converters

• Radio Power Supply

• Core Power in HDDs

• Set-Top Boxes

• Automotive

• USB Powered Devices

• DSL Modems

3 Description

The LM2734x and LM2734x-Q1 regulators are

monolithic, high-frequency, PWM step-down DC-DC

converters in 10-pin WSON and 10-pin MSOP-

PowerPAD packages. They contain all the active

functions to provide local DC-DC conversion with fast

transient response and accurate regulation in the

smallest possible PCB area.

With a minimum of external components, the

LM2734x and LM2734x-Q1 are easy to use. The

ability to drive 1.5-A or 2-A loads respectively, with an

internal 150-mΩNMOS switch results in the best

power density available. The world-class control

circuitry allows for on-times as low as 65 ns, thus

supporting exceptionally high frequency conversion.

Switching frequency is internally set to 2 MHz and

synchronizable from 1 to 2.35 MHz, which allows the

use of extremely small surface mount inductors and

chip capacitors. Even though the operating frequency

is very high, efficiencies up to 90% are easy to

achieve. External shutdown is included, which

features an ultra-low shutdown current of 70 nA. The

LM2734x and LM2734x-Q1 use peak current-mode

control and internal compensation to provide high-

performance regulation over a wide range of

operating conditions. Additional features include

internal soft-start circuitry to reduce inrush current,

pulse-by-pulse current limit, thermal shutdown, and

output overvoltage protection.

Device Information(1)

PART NUMBER PACKAGE BODY SIZE (NOM)

LM2734x

LM2734x-Q1 MSOP-PowerPAD (10) 4.90 mm × 3.00 mm

WSON (10) 3.00 mm × 3.00 mm

(1) For all available packages, see the orderable addendum at

the end of the data sheet.

Typical Application Circuit

LM27341

LM27342

LM27341-Q1

LM27342-Q1

SNVS497F –NOVEMBER 2008–REVISED SEPTEMBER 2016

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Product Folder Links: LM27341 LM27342 LM27341-Q1 LM27342-Q1

Table of Contents

1 Features.................................................................. 1

2 Applications ........................................................... 1

3 Description............................................................. 1

4 Revision History..................................................... 2

5 Pin Configuration and Functions......................... 3

6 Specifications......................................................... 4

6.1 Absolute Maximum Ratings ...................................... 4

6.2 ESD Ratings.............................................................. 4

6.3 Recommended Operating Conditions....................... 4

6.4 Thermal Information.................................................. 5

6.5 Electrical Characteristics........................................... 5

6.6 Typical Characteristics.............................................. 7

7 Detailed Description............................................ 12

7.1 Overview................................................................. 12

7.2 Functional Block Diagram....................................... 13

7.3 Feature Description................................................. 13

7.4 Device Functional Modes........................................ 16

8 Application and Implementation ........................ 17

8.1 Application Information............................................ 17

8.2 Typical Applications ................................................ 28

9 Power Supply Recommendations...................... 41

10 Layout................................................................... 41

10.1 Layout Guidelines ................................................. 41

10.2 Layout Example ................................................... 42

11 Device and Documentation Support................. 43

11.1 Device Support...................................................... 43

11.2 Documentation Support ........................................ 43

11.3 Related Links ........................................................ 43

11.4 Receiving Notification of Documentation Updates 43

11.5 Community Resources.......................................... 43

11.6 Trademarks........................................................... 43

11.7 Electrostatic Discharge Caution............................ 44

11.8 Glossary................................................................ 44

12 Mechanical, Packaging, and Orderable

Information........................................................... 44

4 Revision History

NOTE: Page numbers for previous revisions may differ from page numbers in the current version.

Changes from Revision E (April 2013) to Revision F Page

• Added ESD Ratings table, Feature Description section, Device Functional Modes,Application and Implementation

section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and

Mechanical, Packaging, and Orderable Information section.................................................................................................. 1

• Changed values in the Thermal Information table to align with JEDEC standards................................................................ 5

Changes from Revision D (April 2013) to Revision E Page

• Changed layout of National Semiconductor Data Sheet to TI format .................................................................................... 1

1SW 10 PVIN

2SW 9 PVIN

3BOOST 8 AVIN

4EN 7 GND

5SYNC 6 FB

Not to scale

DAP

1SW 10 PVIN

2SW 9 PVIN

3BOOST 8 AVIN

4EN 7 GND

5SYNC 6 FB

Not to scale

DAP

LM27341

LM27342

LM27341-Q1

LM27342-Q1

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SNVS497F –NOVEMBER 2008–REVISED SEPTEMBER 2016

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5 Pin Configuration and Functions

DSC Package

10-Pin WSON

Top View DGQ Package

10-Pin MSOP-PowerPAD

Top View

(1) G = Ground, I = Input, O = Output

Pin Functions

PIN TYPE(1) DESCRIPTION

NO. NAME

1, 2 SW O Output switch. Connects to the inductor, catch diode, and bootstrap capacitor.

3 BOOST I Boost voltage that drives the internal NMOS control switch. A bootstrap capacitor is connected

between the BOOST and SW pins.

4 EN I Enable control input. Logic high enables operation. Do not allow this pin to float or be greater than

VIN + 0.3 V.

5 SYNC I Frequency synchronization input. Drive this pin with an external clock or pulse train. Ground it to

use the internal clock.

6 FB I Feedback pin. Connect FB to the external resistor divider to set output voltage.

7 GND G Signal and power ground pin. Place the bottom resistor of the feedback network as close as

possible to this pin for accurate regulation.

8 AVIN I Supply voltage for the control circuitry.

9, 10 PVIN I Supply voltage for output power stage. Connect a bypass capacitor to this pin.

DAP DAP G Signal or power ground and thermal connection. Tie this directly to GND (pin 7).

See Application Information regarding optimum thermal layout.

LM27341

LM27342

LM27341-Q1

LM27342-Q1

SNVS497F –NOVEMBER 2008–REVISED SEPTEMBER 2016

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Product Folder Links: LM27341 LM27342 LM27341-Q1 LM27342-Q1

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings

only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended

Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and

specifications.

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1)(2)

MIN MAX UNIT

AVIN, PVIN –0.5 24 V

SW voltage –0.5 24 V

Boost voltage –0.5 28 V

Boost to SW voltage –0.5 6 V

FB voltage –0.5 3 V

SYNC voltage –0.5 6 V

EN voltage –0.5 VIN + 0.3 V

Soldering, infrared reflow (5 s) 260 °C

Junction temperature, TJ150 °C

Storage temperature, Tstg –65 150 °C

(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

(2) Human body model, 1.5 kΩin series with 100 pF.

6.2 ESD Ratings VALUE UNIT

V(ESD) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1)(2) ±2000 V

(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur, including inoperability and degradation of

device reliability and/or performance. Functional operation of the device and/or non-degradation at the Absolute Maximum Ratings or

other conditions beyond those indicated in the recommended Operating Ratings is not implied. The recommended Operating Ratings

indicate conditions at which the device is functional and should not be operated beyond such conditions.

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)(1)

MIN MAX UNIT

AVIN, PVIN 3 20 V

SW voltage –0.5 20 V

Boost voltage –0.5 24 V

Boost to SW voltage 3 5.5 V

Junction temperature –40 125 °C

LM27341

LM27342

LM27341-Q1

LM27342-Q1

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SNVS497F –NOVEMBER 2008–REVISED SEPTEMBER 2016

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(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application

report.

(2) Thermal shutdown will occur if the junction temperature exceeds 165°C. The maximum power dissipation is a function of TJ(MAX), RθJA

and TA. The maximum allowable power dissipation at any ambient temperature is PD= (TJ(MAX) – TA)/ RθJA. All numbers apply for

packages soldered directly onto a 3" × 3" PCB with 2 oz. copper on 4 layers in still air.

6.4 Thermal Information

THERMAL METRIC(1) LM2734x, LM2734x-Q1

UNITDSC (WSON) DGQ (MSOP-PowerPAD)

10 PINS 10 PINS

RθJA Junction-to-ambient thermal resistance(2) 47.6 49.5 °C/W

RθJC(top) Junction-to-case (top) thermal resistance 36.5 53.6 °C/W

RθJB Junction-to-board thermal resistance 22.5 33.7 °C/W

ψJT Junction-to-top characterization parameter 0.4 3.9 °C/W

ψJB Junction-to-board characterization parameter 22.7 33.4 °C/W

RθJC(bot) Junction-to-case (bottom) thermal resistance 4.7 3.5 °C/W

6.5 Electrical Characteristics

TJ= 25°C, VIN = 12 V, and VBOOST – VSW = 4.3 V (unless otherwise noted)

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

SYSTEM PARAMETERS

VFB Feedback voltage TJ= 0°C to 85°C 0.99 1 1.01 V

TJ= –40°C to 125°C 0.984 1 1.014

ΔVFB/ΔVIN Feedback voltage line

regulation VIN = 3 V to 20 V 0.003% V

IFB Feedback input bias current TJ= 25°C 20 nA

TJ= –40°C to 125°C 100

OVP Overvoltage protection VFB at which PWM halts 1.13 V

UVLO Undervoltage lockout VIN rising until VSW is

switching TJ= 25°C 2.75

TJ= –40°C to 125°C 2.6 2.9

Undervoltage hysteresis VIN falling from UVLO TJ= 25°C 0.47

TJ= –40°C to 125°C 0.3 0.6

SS Soft-start time 0.5 1 1.5 ms

IQQuiescent current IQ= IQ_AVIN + IQ_PVIN VFB = 1.1 (not switching) 2.4 mA

VEN = 0 V (shutdown) 70 nA

IBOOST Boost pin current fSW= 2 MHz TJ= 25°C 8.2 mATJ= –40°C to 125°C 10

fSW= 1 MHz 4.4 6

OSCILLATOR

fSW Switching frequency SYNC = GND TJ= 25°C 2 MHz

TJ= –40°C to 125°C 1.75 2.3

VFB_FOLD FB pin voltage SYNC input is overridden 0.53 V

fFOLD_MIN Frequency foldback

minimum VFB = 0 V 220 250 kHz

LOGIC INPUTS (EN, SYNC)

fSYNC SYNC frequency range 1 2.35 MHz

VIL EN, SYNC logic low

threshold Logic falling edge 0.4 V

VIH EN, SYNC logic high

threshold Logic rising edge 1.8

tSYNC_HIGH SYNC, time required above

VIH to ensure a logical high 100 ns

LM27341

LM27342

LM27341-Q1

LM27342-Q1

SNVS497F –NOVEMBER 2008–REVISED SEPTEMBER 2016

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Product Folder Links: LM27341 LM27342 LM27341-Q1 LM27342-Q1

Electrical Characteristics (continued)

TJ= 25°C, VIN = 12 V, and VBOOST – VSW = 4.3 V (unless otherwise noted)

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

tSYNC_LOW SYNC, time required below

VIL to ensure a logical low 100 ns

ISYNC SYNC pin current VSYNC < 5 V 20 nA

IEN Enable pin current VEN = 3 V 6 15 µA

VIN = VEN = 20 V 50 100

INTERNAL MOSFET

RDS(ON) Switch ON-resistance TJ= 25°C 150 mΩ

TJ= –40°C to 125°C 320

ICL Switch current limit TJ= –40°C to 125°C LM27342 2.5 4 A

LM27341 2 3.7

DMAX Maximum duty cycle SYNC = GND TJ= 25°C 93%

TJ= –40°C to 125°C 85%

tMIN Minimum ON-time 65 ns

ISW Switch leakage current 40 nA

BOOST LDO

VLDO Boost LDO output voltage 3.9 V

THERMAL

TSHDN

Thermal shutdown

temperature Junction temperature rising 165 °C

Thermal shutdown

hysteresis Junction temperature falling 15

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LM27342

LM27341-Q1

LM27342-Q1

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6.6 Typical Characteristics

TA= 25°C, VIN = 12 V, and VBOOST – VSW = 4.3 V (unless otherwise noted)

VOUT = 5 V fSW = 2 MHz

Figure 1. Efficiency vs Load Current

See Figure 34

VOUT = 5 V IOUT = 100 mA – 2 A at Slewrate = 2 A / µs

Figure 2. Load Transient

See Figure 34

VOUT = 3.3 V fSW = 2 MHz

Figure 3. Efficiency vs Load Current

See Figure 40

VOUT = 3.3 V IOUT = 100 mA – 2 A at Slewrate = 2 A / µs

Figure 4. Load Transient

See Figure 40

VOUT = 1.8 V fSW = 2 MHz

Figure 5. Efficiency vs Load Current

See Figure 49

VOUT = 1.8 V IOUT = 100 mA – 2 A at Slewrate = 2 A / µs

Figure 6. Load Transient

See Figure 49

LM27341

LM27342

LM27341-Q1

LM27342-Q1

SNVS497F –NOVEMBER 2008–REVISED SEPTEMBER 2016

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Product Folder Links: LM27341 LM27342 LM27341-Q1 LM27342-Q1

Typical Characteristics (continued)

TA= 25°C, VIN = 12 V, and VBOOST – VSW = 4.3 V (unless otherwise noted)

VIN = 10 V to 15 V VOUT = 3.3 V No CFF

Figure 7. Line Transient

See Figure 43

VIN = 10 V to 15 V VOUT = 3.3 V

Figure 8. Line Transient

See Figure 40

Figure 9. Short Circuit Figure 10. Short-Circuit Release

Figure 11. Soft Start With EN Tied to VIN Figure 12. Soft Start With EN Tied to VIN

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Typical Characteristics (continued)

TA= 25°C, VIN = 12 V, and VBOOST – VSW = 4.3 V (unless otherwise noted)

VIN = 12 V L = 2.2 µH Iout =1 A

VOUT = 5 V COUT = 44 µF

Figure 13. Bode Plot

See Figure 34

VIN = 12 V L = 1.5 µH Iout =1 A

VOUT = 3.3 V COUT = 44 µF

Figure 14. Bode Plot

See Figure 40

VIN = 5 V L = 1.0 µH Iout =1 A

VOUT = 1.8 V COUT = 44 µF

Figure 15. Bode Plot

See Figure 49

VIN = 5 V L = 0.56 µH Iout =1 A

VOUT = 1.2 V COUT = 68 µF

Figure 16. Bode Plot

See Figure 55

Figure 17. Sync Functionality Figure 18. Loss of Synchronization

LM27341

LM27342

LM27341-Q1

LM27342-Q1

SNVS497F –NOVEMBER 2008–REVISED SEPTEMBER 2016

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Product Folder Links: LM27341 LM27342 LM27341-Q1 LM27342-Q1

Typical Characteristics (continued)

TA= 25°C, VIN = 12 V, and VBOOST – VSW = 4.3 V (unless otherwise noted)

VSYNC = GND fSW = 2 MHz

Figure 19. Oscillator Frequency vs Temperature Figure 20. Oscillator Frequency vs VFB

Figure 21. VFB vs Temperature Figure 22. VFB vs VIN

VIN = 12 V

Figure 23. Current Limit vs Temperature Figure 24. RDSON vs Temperature

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Typical Characteristics (continued)

TA= 25°C, VIN = 12 V, and VBOOST – VSW = 4.3 V (unless otherwise noted)

IQ= IAVIN + IPVIN

Figure 25. IQ(Shutdown) vs Temperature Figure 26. IEN vs VEN

VIN

-VD1

tON

Inductor Current

D = tON/TSW

VSW

tOFF

TSW

SW Voltage

'iL

IOUT

ILPK

LM27341

LM27342

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LM27342-Q1

SNVS497F –NOVEMBER 2008–REVISED SEPTEMBER 2016

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Product Folder Links: LM27341 LM27342 LM27341-Q1 LM27342-Q1

7 Detailed Description

7.1 Overview

The LM2734x and LM2734x-Q1 are a constant-frequency, peak current-mode PWM buck regulator IC that

delivers a 1.5-A or 2-A load current. The regulator has a preset switching frequency of 2 MHz. This high

frequency allows the LM2734x and LM2734x-Q1 to operate with small surface-mount capacitors and inductors,

resulting in a DC-DC converter that requires a minimum amount of board space. The LM2734x and LM2734x-Q1

are internally compensated, which reduces design time, and requires few external components.

The following operating description of the LM2734x and LM2734x-Q1 refers to Functional Block Diagram and to

the waveforms in Figure 27. The LM2734x and LM2734x-Q1 supply a regulated output voltage by switching the

internal NMOS switch at a constant frequency and varying the duty cycle. A switching cycle begins at the falling

edge of the reset pulse generated by the internal oscillator. When this pulse goes low, the output control logic

turns on the internal NMOS switch. During this on-time, the SW pin voltage (VSW) swings up to approximately

VIN, and the inductor current (iL) increases with a linear slope. The current-sense amplifier measures iL, which

generates an output proportional to the switch current typically called the sense signal. The sense signal is

summed with the regulator’s corrective ramp and compared to the error amplifier’s output, which is proportional

to the difference between the feedback voltage (VFB) and VREF. When the output of the PWM comparator goes

high, the switch turns off until the next switching cycle begins. During the switch off-time (tOFF), inductor current

discharges through the catch diode D1, which forces the SW pin (VSW) to swing below ground by the forward

voltage (VD1) of the catch diode. The regulator loop adjusts the duty cycle (D) to maintain a constant output

voltage.

Figure 27. LM2734x Waveforms of SW Pin Voltage and Inductor Current

RSENSE

PWM Logic

Driver

Switch

0.15 Ÿ

Error

Amplifier

SYNC

Freq. Foldback Amplifier

VREF

1.0V

1.13V

OVP Comparator

0.53V

Thermal

Shutdown

Current

Limit

LDO

PVIN

AVIN

BOOST

SW L

VOUT

GND

Under

Voltage

Lockout

Corrective

Ramp

ISENSE

Reset

Pulse

PWM

Comparator

Error

Signal

Oscillator Internal

Compensation

Soft Start

Current Sense

Amplifier

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7.2 Functional Block Diagram

7.3 Feature Description

7.3.1 Boost Function

Capacitor C2in Functional Block Diagram, commonly referred to as CBOOST, is used to store a voltage VBOOST.

When LM2734x and LM2734x-Q1 start up, an internal LDO charges CBOOST through an internal diode, to a

voltage sufficient to turn the internal NMOS switch on. The gate drive voltage supplied to the internal NMOS

switch is VBOOST – VSW.

During a normal switching cycle, when the internal NMOS control switch is off (tOFF) (see Figure 27), VBOOST

equals VLDO minus the forward voltage of the internal diode (VD2). At the same time the inductor current (iL)

forward biases the catch diode D1 forcing the SW pin to swing below ground by the forward voltage drop of the

catch diode (VD1). Therefore, the voltage stored across CBOOST is calculated with Equation 1 and Equation 2.

VBOOST – VSW = VLDO – VD2 + VD1 (1)

VBOOST = VSW + VLDO – VD2 + VD1 (2)

When the NMOS switch turns on (tON), the switch pin rises to Equation 3.

VSW = VIN – (RDSON × IL) (3)

Then the D1 undergoes reverse biasing, and forces VBOOST to rise. The voltage at VBOOST is then calculated with

Equation 4.

VBOOST = VIN – (RDSON × IL)+VLDO – VD2 + VD1 (4)

Which is approximately calculated with Equation 5.

VIN + VLDO – 0.4 V (5)

VBOOST has pulled itself up by its bootstraps, or boosted to a higher voltage.

LM27342

VIN PVIN

BOOST

GND/DAP

VOUT

C2 L1

SYNC

AVIN

CLK

OFF

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Feature Description (continued)

7.3.2 Low Input Voltage Considerations

When the input voltage is below 5 V and the duty cycle is greater than 75%, the gate drive voltage developed

across CBOOST might not be sufficient for proper operation of the NMOS switch. In this case, CBOOST must be

charged through an external Schottky diode attached to a 5-V voltage rail (see Figure 28). This ensures that the

gate drive voltage is high enough for proper operation of the NMOS switch in the triode region. Maintain VBOOST –

VSW less than the 6-V absolute maximum rating.

Figure 28. External Diode Charges CBOOST

7.3.3 High Output Voltage Considerations

When the output voltage is greater than 3.3 V, a minimum load current is required to charge CBOOST (see

Figure 29). The minimum load current forward biases the catch diode D1 forcing the SW pin to swing below

ground. This allows CBOOST to charge, ensuring that the gate drive voltage is high enough for proper operation.

The minimum load current depends on many factors including the inductor value.

Figure 29. Minimum Load Current for L = 1.5 µH

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Feature Description (continued)

7.3.4 Frequency Synchronization

The LM2734x and LM2734x-Q1 switching frequency can be synchronized to an external clock, between 1 MHz

and 2.35 MHz, applied at the SYNC pin. At the first rising edge applied to the SYNC pin, the internal oscillator is

overridden and subsequent positive edges initiate switching cycles. If the external SYNC signal is lost during

operation, the LM2734x and LM2734x-Q1 revert to its internal 2-MHz oscillator within 1.5 µs. To disable

frequency synchronization and use the internal 2-MHz oscillator, connect the SYNC pin to GND.

The SYNC pin gives the designer the flexibility to optimize their design. A lower switching frequency can be

chosen for higher efficiency. A higher switching frequency can be chosen to keep EMI out of sensitive ranges

such as the AM radio band. Synchronization can also be used to eliminate beat frequencies generated by the

interaction of multiple switching power converters. Synchronizing multiple switching power converters result in

cleaner power rails.

The selected switching frequency (fSYNC) and the minimum on-time (tMIN) limit the minimum duty cycle (DMIN) of

the device as calculated with Equation 6.

DMIN = tMIN × fSYNC (6)

Operation below DMIN is not recommended. The LM2734x and LM2734x-Q1 skip pulses to keep the output

voltage in regulation, and the current limit is not ensured. The switching is in phase but no longer at the same

switching frequency as the SYNC signal.

7.3.5 Current Limit

The LM2734x and LM2734x-Q1 use cycle-by-cycle current limiting to protect the output switch. During each

switching cycle, a current limit comparator detects if the output switch current exceeds 2 A minimum (LM27341)

or 2.5 A minimum (LM27342), and turns off the switch until the next switching cycle begins.

7.3.6 Frequency Foldback

The LM2734x and LM2734x-Q1 employ frequency foldback to protect the device from current run-away during

output short-circuit. Once the FB pin voltage falls below regulation, the switch frequency smoothly reduce with

the falling FB voltage until the switch frequency reaches 220 kHz (typical). If the device is synchronized to an

external clock, synchronization is disabled until the FB pin voltage exceeds 0.53 V.

7.3.7 Output Overvoltage Protection

The overvoltage comparator turns off the internal power NFET when the FB pin voltage exceeds the internal

reference voltage by 13% (VFB > 1.13 × VREF). With the power NFET turned off the output voltage decreases

toward the regulation level.

7.3.8 Undervoltage Lockout

Undervoltage lockout (UVLO) prevents the LM2734x and LM2734x-Q1 from operating until the input voltage

exceeds 2.75 V (typical).

The UVLO threshold has approximately 470 mV of hysteresis, so the part operates until VIN drops below

2.28 V (typical). Hysteresis prevents the part from turning off during power up if VIN has finite impedance.

7.3.9 Thermal Shutdown

Thermal shutdown limits total power dissipation by turning off the internal NMOS switch when the IC junction

temperature exceeds 165°C (typical). After thermal shutdown occurs, hysteresis prevents the internal NMOS

switch from turning on until the junction temperature drops to approximately 150°C.

R3 =VIN - 1

1.8 x R4

LM27342

VIN PVIN

BOOST

GND/DAP

VOUT

C2 L1

SYNC

AVIN

CLK

LM27341

LM27342

LM27341-Q1

LM27342-Q1

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7.4 Device Functional Modes

7.4.1 Enable Pin and Shutdown Mode

Connect the EN pin to a voltage source greater than 1.8 V to enable operation of the LM2734x and LM2734x-Q1.

Apply a voltage less than 0.4 V to put the part into shutdown mode. In shutdown mode, the quiescent current

drops to typically 70 nA. Switch leakage adds another 40 nA from the input supply. For proper operation, the

LM2734x and LM2734x-Q1 EN pin must never be left floating, and the voltage must never exceed VIN + 0.3 V.

The simplest way to enable the operation of LM2734x and LM2734x-Q1 is to connect the EN pin to AVIN which

allows self start-up of the LM2734x and LM2734x-Q1 when the input voltage is applied.

When the rise time of VIN is longer than the soft-start time of the LM2734x and LM2734x-Q1, this method may

result in an overshoot in output voltage. In such applications, the EN pin voltage can be controlled by a separate

logic signal, or tied to a resistor divider, which reaches 1.8 V after VIN is fully established (see Figure 30). This

minimizes the potential for output voltage overshoot during a slow VIN ramp condition. Use the lowest value of

VIN, seen in your application when calculating the resistor network using Equation 7, to ensure that the 1.8 V

minimum EN threshold is reached.

Figure 30. Resistor Divider on EN

(7)

7.4.2 Soft-Start Mode

The LM2734x and LM2734x-Q1 have a fixed internal soft-start of 1 ms (typical). During soft start, the error

amplifier’s reference voltage ramps from 0 V to its nominal value of 1 V in approximately 1 ms. This forces the

regulator output to ramp in a controlled fashion, which helps reduce inrush current. Upon soft start, the part is

initially in frequency foldback and the frequency rises as FB rises. The regulator rises gradually to 2 MHz. The

LM2734x and LM2734x-Q1 allows synchronization to an external clock at FB > 0.53 V.

OUT

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8 Application and Implementation

NOTE

Information in the following applications sections is not part of the TI component

specification, and TI does not warrant its accuracy or completeness. TI’s customers are

responsible for determining suitability of components for their purposes. Customers should

validate and test their design implementation to confirm system functionality.

8.1 Application Information

8.1.1 Inductor Selection

Inductor selection is critical to the performance of the LM2734x and LM2734x-Q1. The selection of the inductor

affects stability, transient response and efficiency. A key factor in inductor selection is determining the ripple

current (ΔiL) (see Figure 27). The ripple current (ΔiL) is important in many ways.

First, by allowing more ripple current, lower inductance values can be used with a corresponding decrease in

physical dimensions and improved transient response. On the other hand, allowing less ripple current increases

the maximum achievable load current and reduce the output voltage ripple (see Output Capacitor for more

details on calculating output voltage ripple). Increasing the maximum load current is achieved by ensuring that

the peak inductor current (ILPK) never exceeds the minimum current limit of 2 A for the LM27341 or 2.5 A for the

LM27342 in Equation 8.

ILPK = IOUT +ΔiL/ 2 (8)

Secondly, the slope of the ripple current affects the current control loop. The LM2734x and LM2734x-Q1 have a

fixed slope corrective ramp. When the slope of the current ripple becomes significantly less than the converter’s

corrective ramp, the inductor pole moves from high frequencies to lower frequencies. This negates one

advantage that peak current-mode control has overvoltage-mode control, which is, a single low-frequency pole in

the power stage of the converter. This can reduce the phase margin, crossover frequency and potentially cause

instability in the converter. Contrarily, when the slope of the ripple current becomes significantly greater than the

converter’s corrective ramp, resonant peaking can occur in the control loop. This can also cause instability

(subharmonic oscillation) in the converter. For the power supply designer, this means that for lower switching

frequencies the current ripple must be increased to keep the inductor pole well above crossover. It also means

that for higher switching frequencies the current ripple must be decreased to avoid resonant peaking.

With all these factors, the desired ripple current is selected with Equation 9. The ripple ratio (r) is defined as the

ratio of inductor ripple current (ΔiL) to output current (IOUT), evaluated at maximum load.

(9)

A good compromise between physical size, transient response and efficiency is achieved when we set the ripple

ratio between 0.2 and 0.4. The recommended ripple ratio versus duty cycle shown in Figure 31 is based upon

this compromise and control loop optimizations. Note that this is just a guideline. See AN-1197 Selecting

Inductors for Buck Converters for further considerations.

OUT D1 MIN

OUT sw

V V

L (1 D )

I r f



u 

u u

OUT D1

IN D1 DS

V V

DV V V



 

OUT

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Application Information (continued)

Figure 31. Recommended Ripple Ratio vs Duty Cycle

The duty cycle (D) can be approximated quickly using the ratio of output voltage (VOUT) to input voltage (VIN) in

Equation 10.

(10)

The application's lowest input voltage must be used to calculate the ripple ratio. The catch diode forward voltage

drop (VD1) and the voltage drop across the internal NFET (VDS) must be included to calculate a more accurate

duty cycle. Calculate D by using Equation 11.

(11)

VDS can be approximated with Equation 12.

VDS = IOUT × RDS(ON) (12)

The diode forward drop (VD1) can range from 0.3 V to 0.5 V depending on the quality of the diode. The lower VD1

is, the higher the operating efficiency of the converter.

Now that the ripple current or ripple ratio is determined, the required inductance is calculated with Equation 13.

where

• DMIN is the duty cycle calculated with the maximum input voltage

• fsw is the switching frequency

• IOUT is the maximum output current of 2 A (13)

Using IOUT = 2 A minimizes the inductor's physical size.

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Application Information (continued)

8.1.1.1 Inductor Calculation Example

Operating conditions for the LM27342 are listed in Table 1.

Table 1. Operating Conditions for Inductor Example

OPERATING PARAMETERS

VIN = 7 – 16 V VOUT = 3.3 V IOUT = 2 A

fSW = 2 MHz VD1 = 0.5 V

First the maximum duty cycle is calculated with Equation 14.

DMAX = (VOUT + VD1) / (VIN + VD1 – VDS)

= (3.3 V + 0.5 V) / (7 V + 0.5 V – 0.3 V)

= 0.528 (14)

Using Figure 31 gives us a recommended ripple ratio = 0.4.

Now the minimum duty cycle is calculated with Equation 15.

DMIN = (VOUT + VD1) / (VIN + VD1 – VDS)

= (3.3 V + 0.5 V) / (16 V + 0.5 V – 0.3 V)

= 0.235 (15)

The inductance can now be calculated with Equation 16.

L = (1 – DMIN) × (VOUT + VD1) / (IOUT × r × fsw)

= (1 – 0.235) × (3.3 V + .5 V) / (2 A × 0.4 × 2 MHz)

= 1.817 µH (16)

This is close to the standard inductance value of 1.8 µH. This leads to a 1% deviation from the recommended

ripple ratio, which is now 0.4038.

Finally, we check that the peak current does not reach the minimum current limit of 2.5 A with Equation 17.

ILPK = IOUT × (1 + r / 2)

= 2 A × (1 + .4038 / 2)

= 2.404 A (17)

The peak current is less than 2.5 A, so the DC load specification can be met with this ripple ratio. To design for

the LM27341 simply replace IOUT = 1.5 A in the equations for ILPK and see that ILPK does not exceed the

LM27341's current limit of 2 A (minimum).

8.1.2 Inductor Material Selection

When selecting an inductor, make sure that it is capable of supporting the peak output current without saturating.

Inductor saturation results in a sudden reduction in inductance and prevent the regulator from operating correctly.

To prevent the inductor from saturating over the entire –40 °C to 125 °C range, pick an inductor with a saturation

current higher than the upper limit of ICL listed in Electrical Characteristics.

Ferrite core inductors are recommended to reduce AC loss and fringing magnetic flux. The drawback of ferrite

core inductors is their quick saturation characteristic. The current limit circuit has a propagation delay and so is

oftentimes not fast enough to stop a saturated inductor from going above the current limit. This has the potential

to damage the internal switch. To prevent a ferrite core inductor from getting into saturation, the inductor

saturation current rating must be higher than the switch current limit ICL. The LM2734x and LM2734x-Q1 are

quite robust in handling short pulses of current that are a few amps above the current limit. Saturation protection

is provided by a second current limit which is 30% higher than the cycle by cycle current limit. When the

saturation protection is triggered the part turns off the output switch and attempt to soft start. When a

compromise must be made, pick an inductor with a saturation current just above the lower limit of the ICL. Be

sure to validate the short-circuit protection over the intended temperature range.

An inductor's saturation current is usually lower when hot. So consult the inductor vendor if the saturation current

rating is only specified at room temperature.

OUT L ESR SW OUT

V i (R )

8 f C

' ' u

u u

RMS IN OUT r

I I D (1 D )

 u u  

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Soft saturation inductors such as the iron powder types can also be used. Such inductors do not saturate

suddenly and therefore are safer when there is a severe overload or even shorted output. Their physical sizes

are usually smaller than the Ferrite core inductors. The downside is their fringing flux and higher power

dissipation due to relatively high AC loss, especially at high frequencies.

8.1.3 Input Capacitor

An input capacitor is necessary to ensure that VIN does not drop excessively during switching transients. The

primary specifications of the input capacitor are capacitance, voltage, RMS current rating, and Equivalent Series

Inductance (ESL). The recommended input capacitance is 10 µF, although 4.7 µF works well for input voltages

below 6 V. The input voltage rating is specifically stated by the capacitor manufacturer. Make sure to check any

recommended deratings and also verify if there is any significant change in capacitance at the operating input

voltage and the operating temperature. The input capacitor maximum RMS input current rating (IRMS-IN) must be

greater than Equation 18.

where

• r is the ripple ratio defined earlier

• IOUT is the output current

• D is the duty cycle (18)

Equation 18 shows that maximum RMS capacitor current occurs when D = 0.5. Always calculate the RMS at the

point where the duty cycle, D, is closest to 0.5. The ESL of an input capacitor is usually determined by the

effective cross sectional area of the current path. A large leaded capacitor has high ESL and a 0805 ceramic

chip capacitor has very low ESL. At the operating frequencies of the LM2734x and LM2734x-Q1, certain

capacitors may have an ESL so large that the resulting impedance (2πfL) is higher than that required to provide

stable operation. As a result, TI strongly recommends surface-mount capacitors. Sanyo POSCAP, Tantalum or

Niobium, Panasonic SP or Cornell Dubilier Low ESR are all good choices for input capacitors and have

acceptable ESL. Multilayer ceramic capacitors (MLCC) have very low ESL. For MLCCs, TI recommends using

X7R or X5R dielectrics. Consult the capacitor manufacturer's data sheet to see how rated capacitance varies

over operating conditions.

8.1.4 Output Capacitor

The output capacitor is selected based upon the desired output ripple and transient response. The LM2734x and

LM2734x-Q1 loop compensation is designed for ceramic capacitors. A minimum of 22 µF is required at 2 MHz

(33 µF at 1 MHz) while 47 µF to 100 µF is recommended for improved transient response and higher phase

margin. The output voltage ripple of the converter is calculated with Equation 19.

(19)

When using MLCCs, the ESR is typically so low that the capacitive ripple may dominate. When this occurs, the

output ripple is approximately sinusoidal and 90° phase shifted from the switching action. Another benefit of

ceramic capacitors is their ability to bypass high-frequency noise. A certain amount of switching edge noise

couples through parasitic capacitances in the inductor to the output. A ceramic capacitor bypasses this noise

while a tantalum does not.

The transient response is determined by the speed of the control loop and the ability of the output capacitor to

provide the initial current of a load transient. Capacitance can be increased significantly with little detriment to the

regulator stability. However, increasing the capacitance provides dimininshing improvement over 100 µF in most

applications, because the bandwidth of the control loop decreases as output capacitance increases. If improved

transient performance is required, add a feedforward capacitor. This becomes especially important for higher

output voltages where the bandwidth of the LM2734x and LM2734x-Q1 is lower (see Feedforward Capacitor

(Optional) and Frequency Synchronization for more information).

OUT

OUT OUT

OUT

V C

CFF I R1



OUT

REF

R1 1 R2

§ ·

 u

¨ ¸

RMS OUT OUT r

I I 12

 u

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Check the RMS current rating of the capacitor. The RMS current rating of the capacitor chosen must also meet

the following condition with Equation 20.

where

• IOUT is the output current

• r is the ripple ratio (20)

8.1.5 Catch Diode

The catch diode (D1) conducts during the switch off-time. A Schottky diode is recommended for its fast switching

times and low forward voltage drop. The catch diode must be chosen so that its current rating is greater than

Equation 21.

ID1 = IOUT × (1 - D) (21)

The reverse breakdown rating of the diode must be at least the maximum input voltage plus appropriate margin.

To improve efficiency, choose a Schottky diode with a low forward voltage drop.

8.1.6 Boost Diode (Optional)

For circuits with input voltages VIN < 5 V and duty cycles (D) > 0.75 V, TI recommends a small-signal Schottky

diode. A good choice is the BAT54 small signal diode. The cathode of the diode is connected to the BOOST pin

and the anode to a 5-V voltage rail.

8.1.7 Boost Capacitor

A ceramic 0.1-µF capacitor with a voltage rating of at least 6.3 V is sufficient. The X7R and X5R MLCCs provide

the best performance.

8.1.8 Output Voltage

The output voltage is set using the following equation where R2 is connected between the FB pin and GND, and

R1 is connected between VOUT and the FB pin in Equation 22. A good starting value for R2 is 1 kΩ.

(22)

8.1.9 Feedforward Capacitor (Optional)

A feedforward capacitor (CFF) can improve the transient response of the converter. Place CFF in parallel with R1.

The value of CFF must place a zero in the loop response at, or above, the pole of the output capacitor and RLOAD

as calculated in Equation 23. The CFF capacitor increases the crossover frequency of the design, thus a larger

minimum output capacitance is required for designs using CFF. CFF must only be used with an output capacitance

greater than or equal to 44 µF.

(23)

8.1.10 Calculating Efficiency and Junction Temperature

The complete LM2734x and LM2734x-Q1 DC-DC converter efficiency can be calculated with Equation 24 or

Equation 25.

(24)

OUT D1 DCR

IN D1 DS

V V V

DV V V

 

 

OUT D1

IN D1 DS

V V

DV V V



 

OUT

OUT LOSS

P P



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(25)

To determine the most significant power losses, see the following equations. Other losses totaling less than 2%

are not discussed.

Power loss (PLOSS) is the sum of two basic types of losses in the converter, switching and conduction.

Conduction losses usually dominate at higher output loads, where as switching losses remain relatively fixed and

dominate at lower output loads. The first step in determining the losses is to calculate the duty cycle (D) with

Equation 26.

(26)

VDS is the voltage drop across the internal NFET when it is on, and is equal to Equation 27.

VDS = IOUT × RDSON (27)

VDis the forward voltage drop across the Schottky diode. It can be obtained from the Electrical Characteristics

section of the Schottky diode data sheet. If the voltage drop across the inductor (VDCR) is accounted for, the

equation changes to Equation 28.

(28)

VDCR usually gives only a minor duty cycle change, and has been omitted in the examples for simplicity.

8.1.10.1 Schottky Diode Conduction Losses

The conduction losses in the free-wheeling Schottky diode are calculated with Equation 29.

PDIODE = VD1 × IOUT (1 – D) (29)

Often this is the single most significant power loss in the circuit. Care must be taken to choose a Schottky diode

that has a low forward voltage drop.

8.1.10.2 Inductor Conduction Losses

Another significant external power loss is the conduction loss in the output inductor. The equation can be

simplified to Equation 30.

PIND = IOUT2× RDCR (30)

8.1.10.3 MOSFET Conduction Losses

The LM2734x and LM2734x-Q1 conduction loss is mainly associated with the internal NFET calculated with

Equation 31.

PCOND = IOUT2× RDSON × D (31)

8.1.10.4 MOSFET Switching Losses

Switching losses are also associated with the internal NFET. They occur during the switch on and off transition

periods, where voltages and currents overlap resulting in power loss. The simplest means to determine this loss

is to empirically measuring the rise and fall times (10% to 90%) of the switch at the switch node with

Equation 32,Equation 33, and Equation 34. Typical values are listed in Table 2.

PSWF = 1 / 2 (VIN × IOUT × fSW × tFALL) (32)

PSWR = 1 / 2 (VIN × IOUT × fSW × tRISE) (33)

PSW = PSWF + PSWR (34)

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Table 2. Typical Rise and Fall Times vs Input Voltage

VIN tRISE tFALL

5 V 8 ns 8 ns

10 V 9 ns 9 ns

15 V 10 ns 10 ns

8.1.10.5 IC Quiescent Losses

Another loss is the power required for operation of the internal circuitry calculated with Equation 35.

PQ= IQ× VIN (35)

IQis the quiescent operating current, and is typically around 2.4 mA.

8.1.10.6 MOSFET Driver Losses

The other operating power that needs calculation is that required to drive the internal NFET with Equation 36.

PBOOST = IBOOST × VBOOST (36)

VBOOST is normally between 3 VDC and 5 VDC. The IBOOST rms current is dependant on switching frequency fSW.

IBOOST is approximately 8.2 mA at 2 MHz and 4.4 mA at 1 MHz.

8.1.10.7 Total Power Losses

Total power losses is calculated with Equation 37.

PLOSS = PCOND + PSWR + PSWF + PQ+ PBOOST + PDIODE + PIND (37)

Losses internal to the LM2734x and LM2734x-Q1 is calculated with Equation 38.

PINTERNAL = PCOND + PSWR + PSWF + PQ+ PBOOST (38)

8.1.10.8 Efficiency Calculation Example

Operating conditions are listed in Table 3.

Table 3. Operating Conditions for Efficiency Calculation

OPERATING PARAMETERS

VIN = 12 V VOUT = 3.3 V IOUT = 2 A

fSW = 2 MHZ VD1 = 0.5 V RDCR = 20 mΩ

Internal power losses are calculated with Equation 39 through Equation 43.

PCOND = IOUT2× RDSON × D

= 22× 0.15 Ω× 0.314

= 188 mW (39)

PSW = (VIN × IOUT × fSW × tFALL)

= (12 V × 2A × 2 MHz × 10 ns)

= 480 mW (40)

PQ= IQ× VIN

= 2.4 mA × 12 V

= 29 mW (41)

PBOOST = IBOOST × VBOOST

= 8.2 mA × 4.5 V

= 37 mW (42)

PINTERNAL = PCOND + PSW + PQ+ PBOOST= 733 mW (43)

Total power losses are calculated with Equation 44 through Equation 46.

PDIODE = VD1 × IOUT (1 – D)

= 0.5 V × 2 × (1 – 0.314)

= 686 mW (44)

PIND = IOUT2× RDCR

J A

JA T T

RPower



RPower

OUT

OUT LOSS

P 6.6W 81%

P P 6.6W 1.499W

 

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= 22× 20 mΩ

= 80 mW (45)

PLOSS = PINTERNAL + PDIODE + PIND = 1.499 W (46)

The efficiency can now be estimated with Equation 47.

(47)

With this information, we can estimate the junction temperature of the LM2734x and LM2734x-Q1.

8.1.10.9 Calculating Junction Temperature

The thermal definitions are:

• TJ= IC junction temperature

• TA= Ambient temperature

• RθJC = Thermal resistance from IC junction to device case

• RθJA = Thermal resistance from IC junction to ambient air

Figure 32. Cross-Sectional View of Integrated Circuit Mounted on a Printed Circuit Board

Heat in the LM2734x and LM2734x-Q1 due to internal power dissipation is removed through conduction and/or

convection.

8.1.10.9.1 Conduction

Heat transfer occurs through cross sectional areas of material. Depending on the material, the transfer of heat

can be considered to have poor-to-good thermal conductivity properties (insulator versus conductor).

Heat transfer goes from Silicon →Lead Frame →PCB.

8.1.10.9.2 Convection

Heat transfer is by means of airflow. This could be from a fan or natural convection. Natural convection occurs

when air currents rise from the hot device to cooler air.

Thermal impedance is defined with Equation 48.

(48)

Thermal impedance from the silicon junction to the ambient air is defined with Equation 49.

(49)

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This impedance can vary depending on the thermal properties of the PCB. This includes PCB size, weight of

copper used to route traces , the ground plane, and the number of layers within the PCB. The type and number

of thermal vias can also make a large difference in the thermal impedance. Thermal vias are necessary in most

applications. They conduct heat from the surface of the PCB to the ground plane. Six to nine thermal vias must

be placed under the exposed pad to the ground plane. Placing more than nine thermal vias results in only a

small reduction to RθJA for the same copper area. These vias must have 8-mil holes to avoid wicking solder away

from the DAP. See AN-1187 Leadless Leadframe Package (SNOA401) and AN-1520 A Guide to Board Layout

for Best Thermal Resistance for Exposed Packages (SNVA183) for more information on package thermal

performance. If a compromise for cost needs to be made, the thermal vias for the MSOP-PowerPAD package

can range from 8 mils to 14 mils, increasing the possibility of solder wicking.

To predict the silicon junction temperature for a given application, three methods can be used. The first is useful

before prototyping and the other two can more accurately predict the junction temperature within the application.

8.1.10.9.3 Method 1

The first method predicts the junction temperature by extrapolating a best guess RθJA from the table or graph.

The tables and graph are for natural convection. The internal dissipation can be calculated using the efficiency

calculations. This allows the user to make a rough prediction of the junction temperature in their application.

Methods two and three can later be used to determine the junction temperature more accurately.

Table 4 and Table 5 have values of RθJA for the WSON and the MSOP-PowerPAD packages.

Table 4. RθJA Values for the MSOP-PowerPAD at 1-W Dissipation

NUMBER OF

BOARD LAYERS SIZE OF BOTTOM LAYER

COPPER CONNECTED TO DAP SIZE OF TOP LAYER COPPER

CONNECTED TO DAP NUMBER OF 10 MIL

THERMAL VIAS RθJA

2 0.25 in20.05 in28 80.6°C/W

2 0.5625 in20.05 in28 70.9°C/W

2 1 in20.05 in28 62.1°C/W

2 1.3225 in20.05 in28 54.6°C/W

4 (eval board) 3.25 in22.25 in214 35.3°C/W

Table 5. RθJA Values for the WSON at 1-W Dissipation

NUMBER OF

BOARD LAYERS SIZE OF BOTTOM LAYER

COPPER CONNECTED TO DAP SIZE OF TOP LAYER COPPER

CONNECTED TO DAP NUMBER OF 8 MIL

THERMAL VIAS RθJA

2 0.25 in20.05 in28 78°C/W

2 0.5625 in20.05 in28 65.6°C/W

2 1 in20.05 in28 58.6°C/W

2 1.3225 in20.05 in28 50°C/W

4 (eval board) 3.25 in22.25 in215 30.7°C/W

J C

JC T T

RPower

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Eight thermal vias and natural convection

Figure 33. Estimate of Thermal Resistance vs Ground Copper Area

8.1.10.9.4 Method 2

The second method requires the user to know the thermal impedance of the silicon junction to case. RθJC is

approximately 9.5°C/W for the MSOP-PowerPAD package or 9.1°C/W for the WSON. The case temperature

must be measured on the bottom of the PCB at a thermal through directly under the DAP of the LM2734x and

LM2734x-Q1. The solder resist must be removed from this area for temperature testing. The reading is more

accurate if it is taken midway between pins 2 and 9, where the NMOS switch is placed. Knowing the internal

dissipation from Method 1, calculate the case temperature (TC) with Equation 50 and Equation 51.

(50)

TJ= (RθJC × PLOSS)+TC(51)

8.1.10.9.4.1 Method 2 Example

The operating conditions are the same as the previous efficiency calculation listed in Table 6.

Table 6. Operating Conditions for Efficiency Calculation

OPERATING PARAMETERS

VIN = 12 V VOUT = 3.3 V IOUT = 2 A

fSW = 2 MHz VD1 = 0.5 V RDCR = 20 mΩ

Internal power losses are calculated with Equation 52 through Equation 56.

PCOND = IOUT2× RDSON × D

= 22× 0.15 Ω× 0.314

= 188 mW (52)

PSW = (VIN × IOUT × fSW × tFALL)

= (12 V × 2 A × 2 MHz × 10 ns)

= 480 mW (53)

PQ= IQ× VIN

= 1.5 mA × 12 V

= 29 mW (54)

PBOOST = IBOOST × VBOOST

= 7 mA × 4.5 V

= 37 mW (55)

PINTERNAL = PCOND + PSW + PQ+ PBOOST = 733 mW (56)

JA INTERNAL

165 C T

q 

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The junction temperature can now be estimated with Equation 57.

TJ= (RθJC × PINTERNAL)+TC(57)

A TI MSOP-PowerPAD evaluation board was used to determine the TJof the LM2734x and LM2734x-Q1. The

four layer PCB is constructed using FR4 with 2-oz copper traces. There is a ground plane on the internal layer

directly beneath the device, and a ground plane on the bottom layer. The ground plane is accessed by fourteen

10-mil vias. The board measures 2 in × 2 in (50.8 mm × 50.8 mm). It was placed in a container with no airflow.

The case temperature measured on this LM27342MY Demo Board was 48.7°C. Therefore, TJis calculated with

Equation 58 and Equation 59.

TJ= (9.5°C/W × 733 mW) + 48.7°C (58)

TJ= 55.66°C (59)

To keep the junction temperature below 125°C for this layout, the ambient temperature must stay below

94.33°C as in Equation 60,Equation 61, and Equation 62.

TA_MAX = TJ_MAX – TJ+TA(60)

TA_MAX = 125°C – 55.66°C + 25°C (61)

TA_MAX = 94.33°C (62)

8.1.10.9.5 Method 3

The third method can also give a very accurate estimate of silicon junction temperature. The first step is to

determine RθJA of the application. The LM2734x and LM2734x-Q1 has overtemperature protection circuitry.

When the silicon temperature reaches 165°C, the device stops switching. The protection circuitry has a

hysteresis of 15°C. Once the silicon temperature has decreased to approximately 150°C, the device starts

switching again. Knowing this, the RθJA for any PCB can be characterized during the early stages of the design

by raising the ambient temperature in the given application until the circuit enters thermal shutdown. If the SW-

pin is monitored, it is obvious when the internal NFET stops switching indicating a junction temperature of 165°C.

We can calculate the internal power dissipation from the above methods. All that is required for calculation is the

estimate of RDSON at 165°C. The value is approximately 0.267 Ω. With this, the junction temperature, and the

ambient temperature, RθJA, can be determined with Equation 63.

(63)

Once this is determined, the maximum ambient temperature allowed for a desired junction temperature can be

found.

8.1.10.9.5.1 Method 3 Example

The operating conditions are the same as the previous efficiency calculation listed in Table 7.

Table 7. Operating Conditions for Efficiency Calculation

OPERATING PARAMETERS

VIN = 12 V VOUT = 3.3 V IOUT = 2A

fSW = 2 MHz VD1 = 0.5 V RDCR = 20 mΩ

Internal power losses are calculated with Equation 64 through Equation 68.

PCOND = IOUT2× RDSON × D

= 22× 0.267 Ωx .314

= 335 mW (64)

PSW = (VIN × IOUT × fSW × tFALL)

= (12 V × 2 A × 2 MHz × 10 nS)

= 480 mW (65)

PQ= IQ× VIN

= 1.5 mA × 12 V

= 29 mW (66)

PBOOST = IBOOST × VBOOST

= 7 mA × 4.5 V

LM27341/2

VIN PVIN

BOOST

GND/DAP

VOUT

SYNC

AVIN

CLK

2 MHz

OFF

JA 165 C 132 C

R 37.46 C/ W

0.881W

q  q

LM27341

LM27342

LM27341-Q1

LM27342-Q1

SNVS497F –NOVEMBER 2008–REVISED SEPTEMBER 2016

www.ti.com

Product Folder Links: LM27341 LM27342 LM27341-Q1 LM27342-Q1

= 37 mW (67)

PINTERNAL = PCOND + PSW + PQ+ PBOOST = 881 mW (68)

A TI MSOP-PowerPAD evaluation board was used to determine the RθJA of the board. The four-layer PCB is

constructed using FR4 with 2oz copper traces. There is a ground plane on the internal layer directly beneath the

device, and a ground plane on the bottom layer. The ground plane is accessed by fourteen 10-mil vias. The

board measures 2 in × 2 in (50.8 mm × 50.8 mm). It was placed in an oven with no forced airflow.

The ambient temperature was raised to 132°C, and at that temperature, the device went into thermal shutdown.

RθJA can be calculated with Equation 69.

(69)

To keep the junction temperature below 125°C for this layout, the ambient temperature must stay below 92°C as

in Equation 70,Equation 71, and Equation 72.

TA_MAX = TJ_MAX – (RθJA × PINTERNAL) (70)

TA_MAX = 125°C – (37.46°C/W × 0.881 W) (71)

TA_MAX = 92°C (72)

This calculation of the maximum ambient temperature is only 2.3°C different from the calculation using method 2.

The methods described above to find the junction temperature in the MSOP-PowerPAD package can also be

used to calculate the junction temperature in the WSON package. The 10-pin WSON package has a

RθJC = 9.1°C/W, while RθJA can vary depending on the layout. RθJA can be calculated in the same manner as

described in method 3.

8.2 Typical Applications

8.2.1 LM2734x Configuration From VIN =7Vto16V,VOUT = 5 V For Full Load at 2 MHz

VIN =7Vto16V,VOUT = 5 V fSW = 2 MHz IOUT = Full load

Figure 34. LM2734x Configuration From VIN =7Vto16V,VOUT = 5 V For Full Load at 2-MHz Schematic

LM27341

LM27342

LM27341-Q1

LM27342-Q1

www.ti.com

SNVS497F –NOVEMBER 2008–REVISED SEPTEMBER 2016

Product Folder Links: LM27341 LM27342 LM27341-Q1 LM27342-Q1

Typical Applications (continued)

8.2.1.1 Design Requirements

Create 5-V output at full-rated load for VIN range of 7 V to 16 V with switching frequency FSW = 2 MHz using

external synchronization.

8.2.1.2 Detailed Design Procedure

The device must be able to operate at any voltage within the recommended operating range. The load current

must be defined to properly size the inductor, input, and output capacitors. The inductor must be able to handle

the full expected load current as well as the peak current generated during load transients and start-up. The

inrush current at start-up depends on the output capacitor selection.

Table 8 lists the bill of materials for VIN =7Vto16V,VOUT = 5 V for full load at 2 MHz. See Figure 34.

Table 8. Bill of Materials

PART NAME PART ID PART VALUE PART NUMBER MANUFACTURER

Buck regulator U1 1.5-A or 2-A Buck regulator LM2734x and LM2734x-Q1 TI

CPVIN C1 10 µF GRM32DR71E106KA12L Murata

CBOOST C2 0.1 µF GRM188R71C104KA01D Murata

COUT C3 22 µF C3225X7R1C226K TDK

COUT C4 22 µF C3225X7R1C226K TDK

CFF C5 0.18 µF 0603ZC184KAT2A AVX

Catch diode D1 Schottky diode, Vf = 0.32 V CMS06 Toshiba

Inductor L1 2.2 µH CDRHD5D28RHPNP Sumida

Feedback resistor R1 560 ΩCRCW0603560RFKEA Vishay

Feedback resistor R2 140 ΩCRCW0603140RFKEA Vishay

8.2.1.3 Application Curves

Figure 35. LM27342 Efficiency vs Load Current IOUT = 100 mA – 2 A at Slewrate = 2 A / µs

Figure 36. Transient Response

LM27341/2

VIN PVIN

BOOST

GND / DAP

VOUT

C2 L1

SYNC

AVIN

CLK

1 MHz

OFF

LM27341

LM27342

LM27341-Q1

LM27342-Q1

SNVS497F –NOVEMBER 2008–REVISED SEPTEMBER 2016

www.ti.com

Product Folder Links: LM27341 LM27342 LM27341-Q1 LM27342-Q1

8.2.2 LM2734x Configuration From VIN =7Vto16V,VOUT = 5 V For Full Load at 1 MHz

VIN =7Vto16V,VOUT = 5 V fSW = 1 MHz IOUT = Full load

Figure 37. LM2734x Configuration From VIN =7Vto16V,VOUT = 5 V For Full Load at 1-MHz Schematic

8.2.2.1 Design Requirements

Create 5-V output at full-rated load for VIN range of 7 V to 16 V with switching frequency FSW = 1 MHz using

external synchronization.

8.2.2.2 Detailed Design Procedure

The device must be able to operate at any voltage within the recommended operating range. The load current

must be defined to properly size the inductor, input, and output capacitors. The inductor must be able to handle

the full expected load current as well as the peak current generated during load transients and start-up. The

inrush current at start-up depends on the output capacitor selection.

Table 9 lists the bill of materials for VIN =7Vto16V,VOUT = 5 V for full load at 1 MHz. See Figure 37.

Table 9. Bill of Materials

PART NAME PART ID PART VALUE PART NUMBER MANUFACTURER

Buck regulator U1 1.5-A or 2-A Buck regulator LM2734x and LM2734x-Q1 TI

CPVIN C1 10 µF GRM32DR71E106KA12L Murata

CBOOST C2 0.1 µF GRM188R71C104KA01D Murata

COUT C3 47 µF GRM32ER61A476KE20L Murata

COUT C4 22 µF C3225X7R1C226K TDK

CFF C5 0.27 µF C0603C274K4RACTU Kemet

Catch diode D1 Schottky diode, Vf = 0.32 V CMS06 Toshiba

Inductor L1 3.3 µH CDRH6D26HPNP Sumida

Feedback resistor R1 560 ΩCRCW0603560RFKEA Vishay

Feedback resistor R2 140 ΩCRCW0603140RFKEA Vishay

LM27341/2

VIN PVIN

BOOST

GND/DAP

VOUT

SYNC

AVIN

CLK

2 MHz

OFF

LM27341

LM27342

LM27341-Q1

LM27342-Q1

www.ti.com

SNVS497F –NOVEMBER 2008–REVISED SEPTEMBER 2016

Product Folder Links: LM27341 LM27342 LM27341-Q1 LM27342-Q1

8.2.2.3 Application Curves

Figure 38. LM27342 Efficiency vs Load Current IOUT = 100 mA – 2 A at Slewrate = 2 A / µs

Figure 39. Transient Response

8.2.3 LM2734x Configuration From VIN =5Vto16V,VOUT = 3.3 V For Full Load at 2 MHz

VIN =5Vto16V,VOUT = 3.3 V fSW = 2 MHz IOUT = Full load

Figure 40. LM2734x Configuration From VIN =5Vto16V,VOUT = 3.3 V For Full Load at 2-MHz Schematic

8.2.3.1 Design Requirements

Create 3.3-V output at full-rated load for VIN range of 5 V to 16 V with switching frequency FSW = 2 MHz using

external synchronization.

LM27341

LM27342

LM27341-Q1

LM27342-Q1

SNVS497F –NOVEMBER 2008–REVISED SEPTEMBER 2016

www.ti.com

Product Folder Links: LM27341 LM27342 LM27341-Q1 LM27342-Q1

8.2.3.2 Detailed Design Procedure

The device must be able to operate at any voltage within the recommended operating range. The load current

must be defined to properly size the inductor, input, and output capacitors. The inductor must be able to handle

the full expected load current as well as the peak current generated during load transients and start-up. The

inrush current at start-up depends on the output capacitor selection.

Table 10 lists the bill of materials for VIN =5Vto16V,VOUT = 3.3 V for full load at 2 MHz. See Figure 40.

Table 10. Bill of Materials

PART NAME PART ID PART VALUE PART NUMBER MANUFACTURER

Buck regulator U1 1.5-A or 2-A Buck regulator LM2734x and LM2734x-Q1 TI

CPVIN C1 10 µF GRM32DR71E106KA12L Murata

CBOOST C2 0.1 µF GRM188R71C104KA01D Murata

COUT C3 22 µF C3225X7R1C226K TDK

COUT C4 22 µF C3225X7R1C226K TDK

CFF C5 0.18 µF 0603ZC184KAT2A AVX

Catch diode D1 Schottky diode, Vf = 0.32 V CMS06 Toshiba

Inductor L1 1.5 µH CDRH5D18BHPNP Sumida

Feedback resistor R1 430 ΩCRCW0603430RFKEA Vishay

Feedback resistor R2 187 ΩCRCW0603187RFKEA Vishay

8.2.3.3 Application Curves

Figure 41. LM27342 Efficiency vs Load Current IOUT = 100 mA – 2 A at Slewrate = 2 A / µs

Figure 42. Transient Response

LM27341/2

VIN PVIN

BOOST

GND/DAP

VOUT

SYNC

AVIN

LM27341

LM27342

LM27341-Q1

LM27342-Q1

www.ti.com

SNVS497F –NOVEMBER 2008–REVISED SEPTEMBER 2016

Product Folder Links: LM27341 LM27342 LM27341-Q1 LM27342-Q1

8.2.4 LM2734x Configuration From VIN =5Vto16V,VOUT = 3.3 V For Full Load at 2 MHz

With SYNC = GND

VIN =5Vto16V,VOUT = 3.3 V fSW = 2 MHz IOUT = Full load

Figure 43. LM2734x Configuration From VIN =5Vto16V,VOUT = 3.3 V

For Full Load at 2 MHz With SYNC = GND Schematic

8.2.4.1 Design Requirements

Create 3.3-V output at full-rated load for VIN range of 5 V to 16 V with switching frequency FSW = 2 MHz using

internal oscillator.

8.2.4.2 Detailed Design Procedure

The device must be able to operate at any voltage within the recommended operating range. The load current

must be defined to properly size the inductor, input, and output capacitors. The inductor must be able to handle

the full expected load current as well as the peak current generated during load transients and start-up. The

inrush current at start-up depends on the output capacitor selection.

Table 11 lists the bill of materials for VIN =5Vto16V,VOUT = 3.3 V for full load at 2 MHz with SYNC = GND.

See Figure 43.

LM27341/2

VIN PVIN

BOOST

GND / DAP

VOUT

C2 L1

SYNC

AVIN

CLK

1 MHz

OFF

LM27341

LM27342

LM27341-Q1

LM27342-Q1

SNVS497F –NOVEMBER 2008–REVISED SEPTEMBER 2016

www.ti.com

Product Folder Links: LM27341 LM27342 LM27341-Q1 LM27342-Q1

Table 11. Bill of Materials

PART NAME PART ID PART VALUE PART NUMBER MANUFACTURER

Buck regulator U1 1.5-A or 2-A Buck regulator LM2734x and LM2734x-Q1 TI

CPVIN C1 10 µF GRM32DR71E106KA12L Murata

CBOOST C2 0.1 µF GRM188R71C104KA01D Murata

COUT C3 22 µF C3225X7R1C226K TDK

COUT C4 22 µF C3225X7R1C226K TDK

Catch diode D1 Schottky diode, Vf = 0.32 V CMS06 Toshiba

Inductor L1 1.5 µH CDRH5D18BHPNP Sumida

Feedback resistor R1 430 ΩCRCW0603430RFKEA Vishay

Feedback resistor R2 187 ΩCRCW0603187RFKEA Vishay

8.2.4.3 Application Curves

Figure 44. LM27342 Efficiency vs Load Current IOUT = 100 mA – 2 A at Slewrate = 2 A / µs

Figure 45. Transient Response

8.2.5 LM2734x Configuration From VIN =5Vto16V,VOUT = 3.3 V For Full Load at 2 MHz

With SYNC = 1 MHz

VIN =5Vto16V,VOUT = 3.3 V fSW = 1 MHz IOUT = Full load

Figure 46. LM2734x Configuration From VIN =5Vto16V,VOUT = 3.3 V

For Full Load at 2 MHz With SYNC = 1-MHz Schematic

LM27341

LM27342

LM27341-Q1

LM27342-Q1

www.ti.com

SNVS497F –NOVEMBER 2008–REVISED SEPTEMBER 2016

Product Folder Links: LM27341 LM27342 LM27341-Q1 LM27342-Q1

8.2.5.1 Design Requirements

Create 1.8-V output at full-rated load for VIN range of 5 V to 16 V with switching frequency FSW = 1 MHz using

external synchronization.

8.2.5.2 Detailed Design Procedure

The device must be able to operate at any voltage within the recommended operating range. The load current

must be defined to properly size the inductor, input, and output capacitors. The inductor must be able to handle

the full expected load current as well as the peak current generated during load transients and start-up. The

inrush current at start-up depends on the output capacitor selection.

Table 12 lists the bill of materials for VIN =5Vto16V,VOUT = 3.3 V for full load at 2 MHz with SYNC = 1 MHz.

See Figure 46.

Table 12. Bill of Materials

PART NAME PART ID PART VALUE PART NUMBER MANUFACTURER

Buck regulator U1 1.5-A or 2-A Buck regulator LM2734x and LM2734x-Q1 TI

CPVIN C1 10 µF GRM32DR71E106KA12L Murata

CBOOST C2 0.1 µF GRM188R71C104KA01D Murata

COUT C3 47 µF GRM32ER61A476KE20L Murata

COUT C4 22 µF C3225X7R1C226K TDK

CFF C5 0.27 µF C0603C274K4RACTU Kemet

Catch diode D1 Schottky diode, Vf = 0.32 V CMS06 Toshiba

Inductor L1 2.7 µH CDRH5D18BHPNP Sumida

Feedback resistor R1 430 ΩCRCW0603430RFKEA Vishay

Feedback resistor R2 187 ΩCRCW0603187RFKEA Vishay

8.2.5.3 Application Curves

Figure 47. LM27342 Efficiency vs Load Current IOUT = 100 mA – 2 A at Slewrate = 2 A / µs

Figure 48. Transient Response

LM27341/2

VIN PVIN

BOOST

GND/DAP

VOUT

SYNC

AVIN

LM27341

LM27342

LM27341-Q1

LM27342-Q1

SNVS497F –NOVEMBER 2008–REVISED SEPTEMBER 2016

www.ti.com

Product Folder Links: LM27341 LM27342 LM27341-Q1 LM27342-Q1

8.2.6 LM2734x Configuration From VIN = 3.3 V to 16 V, VOUT = 1.8 V For Full Load at 2 MHz

With SYNC = 1 GND

VIN = 3.3 V to 16 V, VOUT = 1.8 V fSW = 2 MHz IOUT = Full load

Figure 49. LM2734x Configuration From VIN = 3.3 V to 16 V, VOUT = 1.8 V

For Full Load at 2 MHz With SYNC = GND Schematic

8.2.6.1 Design Requirements

Create 1.8-V output at full-rated load for VIN range of 3.3 V to 16 V with switching frequency FSW = 2 MHz using

internal oscillator.

8.2.6.2 Detailed Design Procedure

The device must be able to operate at any voltage within the recommended operating range. The load current

must be defined to properly size the inductor, input, and output capacitors. The inductor must be able to handle

the full expected load current as well as the peak current generated during load transients and start-up. The

inrush current at start-up depends on the output capacitor selection.

Table 13 lists the bill of materials for VIN = 3.3 V to 16 V, VOUT = 1.8 V for full load at 2 MHz with SYNC = GND.

See Figure 49.

Table 13. Bill of Materials

PART NAME PART ID PART VALUE PART NUMBER MANUFACTURER

Buck regulator U1 1.5-A or 2-A Buck regulator LM2734x and LM2734x-Q1 TI

CPVIN C1 10 µF GRM32DR71E106KA12L Murata

CBOOST C2 0.1 µF GRM188R71C104KA01D Murata

COUT C3 22 µF C3225X7R1C226K TDK

COUT C4 22 µF C3225X7R1C226K TDK

Catch diode D1 Schottky diode, Vf = 0.32 V CMS06 Toshiba

Inductor L1 1 µH CDRH5D18BHPNP Sumida

Feedback resistor R1 12 kΩCRCW060312K0FKEA Vishay

Feedback resistor R2 15 kΩCRCW060315K0FKEA Vishay

LM27341/2

VIN PVIN

BOOST

GND / DAP

VOUT

C2 L1

SYNC

AVIN

CLK

1 MHz

OFF

LM27341

LM27342

LM27341-Q1

LM27342-Q1

www.ti.com

SNVS497F –NOVEMBER 2008–REVISED SEPTEMBER 2016

Product Folder Links: LM27341 LM27342 LM27341-Q1 LM27342-Q1

8.2.6.3 Application Curves

Figure 50. LM27342 Efficiency vs Load Current IOUT = 100 mA – 2 A at Slewrate = 2 A / µs

Figure 51. Transient Response

8.2.7 LM2734x Configuration From VIN = 3.3 V to 16 V, VOUT = 1.8 V For Full Load at 2 MHz

With SYNC = 1 MHz

VIN = 3.3 V to 16 V, VOUT = 1.8 V fSW = 1 MHz IOUT = Full load

Figure 52. LM2734x Configuration From VIN = 3.3 V to 16 V, VOUT = 1.8 V

For Full Load at 2 MHz With SYNC = 1-MHz Schematic

8.2.7.1 Design Requirements

Create 1.8-V output at full-rated load for VIN range of 3.3 V to 16 V with switching frequency FSW = 1 MHz using

external synchronization.

8.2.7.2 Detailed Design Procedure

The device must be able to operate at any voltage within the recommended operating range. The load current

must be defined to properly size the inductor, input, and output capacitors. The inductor must be able to handle

the full expected load current as well as the peak current generated during load transients and start-up. The

inrush current at start-up depends on the output capacitor selection.

Table 14 lists the bill of materials for VIN = 3.3 V to 16 V, VOUT = 1.8 V for full load at 2 MHz with SYNC = 1 MHz.

See Figure 52.

LM27341

LM27342

LM27341-Q1

LM27342-Q1

SNVS497F –NOVEMBER 2008–REVISED SEPTEMBER 2016

www.ti.com

Product Folder Links: LM27341 LM27342 LM27341-Q1 LM27342-Q1

Table 14. Bill of Materials

PART NAME PART ID PART VALUE PART NUMBER MANUFACTURER

Buck regulator U1 1.5-A or 2-A Buck regulator LM2734x and LM2734x-Q1 TI

CPVIN C1 10 µF GRM32DR71E106KA12L Murata

CBOOST C2 0.1 µF GRM188R71C104KA01D Murata

COUT C3 22 µF C3225X7R1C226K TDK

COUT C4 22 µF C3225X7R1C226K TDK

CFF C5 3.9 nF GRM188R71H392KA01D Murata

Catch diode D1 Schottky diode, Vf = 0.32 V CMS06 Toshiba

Inductor L1 1.8 µH CDRH5D18BHPNP Sumida

Feedback resistor R1 12 kΩCRCW060312K0FKEA Vishay

Feedback resistor R2 15 kΩCRCW060315K0FKEA Vishay

8.2.7.3 Application Curves

Figure 53. LM27342 Efficiency vs Load Current IOUT = 100 mA – 2 A at Slewrate = 2 A / µs

Figure 54. Transient Response

LM27341/2

VIN PVIN

BOOST

GND/DAP

VOUT

SYNC

AVIN

CLK

2 MHz

OFF

LM27341

LM27342

LM27341-Q1

LM27342-Q1

www.ti.com

SNVS497F –NOVEMBER 2008–REVISED SEPTEMBER 2016

Product Folder Links: LM27341 LM27342 LM27341-Q1 LM27342-Q1

8.2.8 LM2734x Configuration From VIN =3.3Vto9V,VOUT = 1.2 V For Full Load at 2 MHz

With SYNC = 2 MHz

VIN =3.3Vto9V,VOUT = 1.2 V fSW = 2 MHz IOUT = Full load

Figure 55. LM2734x Configuration From VIN =3.3Vto9V,VOUT = 1.2 V

For Full Load at 2 MHz With SYNC = 2-MHz Schematic

8.2.8.1 Design Requirements

Create 1.2-V output at full-rated load for VIN range of 3.3 V to 9 V with switching frequency FSW = 2 MHz using

external synchronization.

8.2.8.2 Detailed Design Procedure

The device must be able to operate at any voltage within the recommended operating range. The load current

must be defined to properly size the inductor, input, and output capacitors. The inductor must be able to handle

the full expected load current as well as the peak current generated during load transients and start-up. The

inrush current at start-up depends on the output capacitor selection.

Table 15 lists the bill of materials for VIN =3.3Vto9V,VOUT = 1.2 V for full load at 2 MHz with SYNC = 2 MHz.

See Figure 55.

Table 15. Bill of Materials

PART NAME PART ID PART VALUE PART NUMBER MANUFACTURER

Buck regulator U1 1.5-A or 2-A Buck regulator LM2734x and LM2734x-Q1 TI

CPVIN C1 10 µF GRM32DR71E106KA12L Murata

CBOOST C2 0.1 µF GRM188R71C104KA01D Murata

COUT C3 47 µF GRM32ER61A476KE20L Murata

COUT C4 22 µF C3225X7R1C226K TDK

CFF C5 Not mounted

Catch diode D1 Schottky diode, Vf = 0.32 V CMS06 Toshiba

Inductor L1 0.56 µH CDRH2D18/HPNP Sumida

Feedback resistor R1 1.02 kΩCRCW06031K02FKEA Vishay

LM27341

LM27342

LM27341-Q1

LM27342-Q1

SNVS497F –NOVEMBER 2008–REVISED SEPTEMBER 2016

www.ti.com

Product Folder Links: LM27341 LM27342 LM27341-Q1 LM27342-Q1

Table 15. Bill of Materials (continued)

PART NAME PART ID PART VALUE PART NUMBER MANUFACTURER

Feedback resistor R2 5.1 kΩCRCW06035K10FKEA Vishay

8.2.8.3 Application Curves

Figure 56. LM27342 Efficiency vs Load Current IOUT = 100 mA – 2 A at Slewrate = 2 A / µs

Figure 57. Transient Response

LM27341

LM27342

LM27341-Q1

LM27342-Q1

www.ti.com

SNVS497F –NOVEMBER 2008–REVISED SEPTEMBER 2016

Product Folder Links: LM27341 LM27342 LM27341-Q1 LM27342-Q1

9 Power Supply Recommendations

The input voltage is rated as 3 V to 18 V; however, take care in certain circuit configurations (for example,

VBOOST derived from VIN where the requirement that VBOOST – VSW < 5.5 V must be observed). Also, for the best

efficiency, VBOOST must be at least 2.5 V above VSW. The voltage on the enable pin must not exceed VIN by more

than 0.3 V.

10 Layout

10.1 Layout Guidelines

10.1.1 Compact Layout

The performance of any switching converter depends as much upon the layout of the PCB as the component

selection. The following guidelines help the user design a circuit with maximum rejection of outside EMI and

minimum generation of unwanted EMI.

Parasitic inductance can be reduced by keeping the power path components close together and keeping the

area of the loops small, on which high currents travel. Short, thick traces or copper pours (shapes) are best. In

particular, the switch node (where L1, D1, and the SW pin connect) must be just large enough to connect all

three components without excessive heating from the current it carries. The LM2734x and LM2734x-Q1 operate

in two distinct cycles (see Figure 27) whose high current paths are shown in Figure 58.

Figure 58. Buck Converter Current Loops

The dark grey, inner loop represents the high current path during the MOSFET on-time. The light grey, outer loop

represents the high current path during the off-time.

10.1.2 Ground Plane and Shape Routing

The diagram of Figure 58 is also useful for analyzing the flow of continuous current versus the flow of pulsating

currents. The circuit paths with current flow during both the on-time and off-time are considered to be continuous

current, while those that carry current during the on-time or off-time only are pulsating currents. Preference in

routing must be given to the pulsating current paths, as these are the portions of the circuit most likely to emit

EMI. The ground plane of a PCB is a conductor and return path, and it is susceptible to noise injection just like

any other circuit path. The path between the input source and the input capacitor and the path between the catch

diode and the load are examples of continuous current paths. In contrast, the path between the catch diode and

the input capacitor carries a large pulsating current. This path must be routed with a short, thick shape,

preferably on the component side of the PCB. Multiple vias in parallel must be used right at the pad of the input

capacitor to connect the component side shapes to the ground plane. A second pulsating current loop that is

often ignored is the gate drive loop formed by the SW and BOOST pins and boost capacitor CBOOST. To minimize

this loop and the EMI it generates, keep CBOOST close to the SW and BOOST pins.

10.1.3 FB Loop

The FB pin is a high-impedance input, and the loop created by R2, the FB pin and ground must be made as

small as possible to maximize noise rejection. R2 must therefore be placed as close as possible to the FB and

GND pins of the IC.

LM27341

LM27342

LM27341-Q1

LM27342-Q1

SNVS497F –NOVEMBER 2008–REVISED SEPTEMBER 2016

www.ti.com

Product Folder Links: LM27341 LM27342 LM27341-Q1 LM27342-Q1

Layout Guidelines (continued)

10.1.4 PCB Summary

1. Minimize the parasitic inductance by keeping the power path components close together and keeping the

area of the high-current loops small.

2. The most important consideration when completing the layout is the close coupling of the GND connections

of the CIN capacitor and the catch diode D1. These ground connections must be immediately adjacent, with

multiple vias in parallel at the pad of the input capacitor connected to GND. Place CIN and D1 as close to the

IC as possible.

3. Next in importance is the location of the GND connection of the COUT capacitor, which must be near the GND

connections of CIN and D1.

4. There must be a continuous ground plane on the copper layer directly beneath the converter. This reduces

parasitic inductance and EMI.

5. The FB pin is a high impedance node and care must be taken to make the FB trace short to avoid noise

pickup and inaccurate regulation. The feedback resistors must be placed as close as possible to the IC, with

the GND of R2 placed as close as possible to the GND of the IC. The VOUT trace to R1 must be routed away

from the inductor and any other traces that are switching.

6. High AC currents flow through the VIN, SW and VOUT traces, so they must be as short and wide as possible.

However, making the traces wide increases radiated noise, so the layout designer must make this trade-off.

Radiated noise can be decreased by choosing a shielded inductor.

The remaining components must also be placed as close as possible to the IC. See AN-1229 SIMPLE

SWITCHER® PCB Layout Guidelines (SNVA054) for further considerations and the LM27342 demo board as an

example of a four-layer layout.

10.2 Layout Example

Figure 59. Top Layer and Overlay

LM27341

LM27342

LM27341-Q1

LM27342-Q1

www.ti.com

SNVS497F –NOVEMBER 2008–REVISED SEPTEMBER 2016

Product Folder Links: LM27341 LM27342 LM27341-Q1 LM27342-Q1

11 Device and Documentation Support

11.1 Device Support

11.1.1 Third-Party Products Disclaimer

TI'S PUBLICATION OF INFORMATION REGARDING THIRD-PARTY PRODUCTS OR SERVICES DOES NOT

CONSTITUTE AN ENDORSEMENT REGARDING THE SUITABILITY OF SUCH PRODUCTS OR SERVICES

OR A WARRANTY, REPRESENTATION OR ENDORSEMENT OF SUCH PRODUCTS OR SERVICES, EITHER

ALONE OR IN COMBINATION WITH ANY TI PRODUCT OR SERVICE.

11.2 Documentation Support

11.2.1 Related Documentation

For related documentation see the following:

•AN-1197 Selecting Inductors for Buck Converters (SNVA038)

•AN-1187 Leadless Leadframe Package (SNOA401)

•AN-1520 A Guide to Board Layout for Best Thermal Resistance for Exposed Packages (SNVA183)

•AN-1229 SIMPLE SWITCHER® PCB Layout Guidelines (SNVA054)

11.3 Related Links

The table below lists quick access links. Categories include technical documents, support and community

resources, tools and software, and quick access to sample or buy.

Table 16. Related Links

PARTS PRODUCT FOLDER SAMPLE & BUY TECHNICAL

DOCUMENTS TOOLS &

SOFTWARE SUPPORT &

COMMUNITY

LM27341 Click here Click here Click here Click here Click here

LM27342 Click here Click here Click here Click here Click here

LM27341-Q1 Click here Click here Click here Click here Click here

LM27342-Q1 Click here Click here Click here Click here Click here

11.4 Receiving Notification of Documentation Updates

To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper

right corner, click on Alert me to register and receive a weekly digest of any product information that has

changed. For change details, review the revision history included in any revised document.

11.5 Community Resources

The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective

contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of

Use.

TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration

among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help

solve problems with fellow engineers.

Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and

contact information for technical support.

11.6 Trademarks

E2E is a trademark of Texas Instruments.

All other trademarks are the property of their respective owners.

LM27341

LM27342

LM27341-Q1

LM27342-Q1

SNVS497F –NOVEMBER 2008–REVISED SEPTEMBER 2016

www.ti.com

Product Folder Links: LM27341 LM27342 LM27341-Q1 LM27342-Q1

11.7 Electrostatic Discharge Caution

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam

during storage or handling to prevent electrostatic damage to the MOS gates.

11.8 Glossary

SLYZ022 —TI Glossary.

This glossary lists and explains terms, acronyms, and definitions.

12 Mechanical, Packaging, and Orderable Information

The following pages include mechanical, packaging, and orderable information. This information is the most

current data available for the designated devices. This data is subject to change without notice and revision of

this document. For browser-based versions of this data sheet, refer to the left-hand navigation.

PACKAGE OPTION ADDENDUM

www.ti.com 4-Feb-2016

Addendum-Page 1

PACKAGING INFORMATION

Orderable Device Status

(1)

Package Type Package

Drawing Pins Package

Qty Eco Plan

(2)

Lead/Ball Finish

(6)

MSL Peak Temp

(3)

Op Temp (°C) Device Marking

(4/5)

Samples

LM27341MY/NOPB ACTIVE MSOP-

PowerPAD DGQ 10 1000 Green (RoHS

& no Sb/Br) CU SN Level-3-260C-168 HR -40 to 125 SSCB

LM27341QMY/NOPB ACTIVE MSOP-

PowerPAD DGQ 10 1000 Green (RoHS

& no Sb/Br) CU SN Level-3-260C-168 HR -40 to 125 SSJB

LM27341QMYX/NOPB ACTIVE MSOP-

PowerPAD DGQ 10 3500 Green (RoHS

& no Sb/Br) CU SN Level-3-260C-168 HR -40 to 125 SSJB

LM27341SD/NOPB ACTIVE WSON DSC 10 1000 Green (RoHS

& no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 L231B

LM27342MY/NOPB ACTIVE MSOP-

PowerPAD DGQ 10 1000 Green (RoHS

& no Sb/Br) CU SN Level-3-260C-168 HR -40 to 125 SSCA

LM27342MYX/NOPB ACTIVE MSOP-

PowerPAD DGQ 10 3500 Green (RoHS

& no Sb/Br) CU SN Level-3-260C-168 HR -40 to 125 SSCA

LM27342QMY/NOPB ACTIVE MSOP-

PowerPAD DGQ 10 1000 Green (RoHS

& no Sb/Br) CU SN Level-3-260C-168 HR -40 to 125 SSJA

LM27342QMYX/NOPB ACTIVE MSOP-

PowerPAD DGQ 10 3500 Green (RoHS

& no Sb/Br) CU SN Level-3-260C-168 HR -40 to 125 SSJA

LM27342SD/NOPB ACTIVE WSON DSC 10 1000 Green (RoHS

& no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 L231A

LM27342SDX/NOPB ACTIVE WSON DSC 10 4500 Green (RoHS

& no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 L231A

(1) The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs.

LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.

NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.

PREVIEW: Device has been announced but is not in production. Samples may or may not be available.

OBSOLETE: TI has discontinued the production of the device.

(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability

information and additional product content details.

TBD: The Pb-Free/Green conversion plan has not been defined.

Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that

lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.

Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between

the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.

Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight

in homogeneous material)

PACKAGE OPTION ADDENDUM

www.ti.com 4-Feb-2016

Addendum-Page 2

(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.

(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation

of the previous line and the two combined represent the entire Device Marking for that device.

(6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish

value exceeds the maximum column width.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information

provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and

continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.

TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

OTHER QUALIFIED VERSIONS OF LM27341, LM27341-Q1, LM27342, LM27342-Q1 :

•Catalog: LM27341, LM27342

•Automotive: LM27341-Q1, LM27342-Q1

NOTE: Qualified Version Definitions:

•Catalog - TI's standard catalog product

•Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects

TAPE AND REEL INFORMATION

*All dimensions are nominal

Device Package

Type Package

Drawing Pins SPQ Reel

Diameter

(mm)

Reel

Width

W1 (mm)

(mm) B0

(mm) K0

(mm) P1

(mm) W

(mm) Pin1

Quadrant

LM27341MY/NOPB MSOP-

Power

PAD

DGQ 10 1000 178.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1

LM27341QMY/NOPB MSOP-

Power

PAD

DGQ 10 1000 178.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1

LM27341QMYX/NOPB MSOP-

Power

PAD

DGQ 10 3500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1

LM27341SD/NOPB WSON DSC 10 1000 178.0 12.4 3.3 3.3 1.0 8.0 12.0 Q1

LM27342MY/NOPB MSOP-

Power

PAD

DGQ 10 1000 178.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1

LM27342MYX/NOPB MSOP-

Power

PAD

DGQ 10 3500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1

LM27342QMY/NOPB MSOP-

Power

PAD

DGQ 10 1000 178.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1

LM27342QMYX/NOPB MSOP-

Power

PAD

DGQ 10 3500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1

PACKAGE MATERIALS INFORMATION

www.ti.com 20-Sep-2016

Pack Materials-Page 1

Device Package

Type Package

Drawing Pins SPQ Reel

Diameter

(mm)

Reel

Width

W1 (mm)

(mm) B0

(mm) K0

(mm) P1

(mm) W

(mm) Pin1

Quadrant

LM27342SD/NOPB WSON DSC 10 1000 178.0 12.4 3.3 3.3 1.0 8.0 12.0 Q1

LM27342SDX/NOPB WSON DSC 10 4500 330.0 12.4 3.3 3.3 1.0 8.0 12.0 Q1

*All dimensions are nominal

Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)

LM27341MY/NOPB MSOP-PowerPAD DGQ 10 1000 210.0 185.0 35.0

LM27341QMY/NOPB MSOP-PowerPAD DGQ 10 1000 210.0 185.0 35.0

LM27341QMYX/NOPB MSOP-PowerPAD DGQ 10 3500 367.0 367.0 35.0

LM27341SD/NOPB WSON DSC 10 1000 210.0 185.0 35.0

LM27342MY/NOPB MSOP-PowerPAD DGQ 10 1000 210.0 185.0 35.0

LM27342MYX/NOPB MSOP-PowerPAD DGQ 10 3500 367.0 367.0 35.0

LM27342QMY/NOPB MSOP-PowerPAD DGQ 10 1000 210.0 185.0 35.0

LM27342QMYX/NOPB MSOP-PowerPAD DGQ 10 3500 367.0 367.0 35.0

LM27342SD/NOPB WSON DSC 10 1000 210.0 185.0 35.0

LM27342SDX/NOPB WSON DSC 10 4500 367.0 367.0 35.0

PACKAGE MATERIALS INFORMATION

www.ti.com 20-Sep-2016

Pack Materials-Page 2

MECHANICAL DATA

DGQ0010A

www.ti.com

MUC10A (Rev A)

BOTTOM VIEW

www.ti.com

PACKAGE OUTLINE

1.2±0.1

10X 0.3

0.2

10X 0.5

0.4

0.8 MAX

0.05

0.00

2±0.1

8X 0.5

3.1

2.9

B3.1

2.9

(0.2) TYP

WSON - 0.8 mm max heightDSC0010B

PLASTIC SMALL OUTLINE - NO LEAD

4214926/A 07/2014

PIN 1 INDEX AREA

0.08 SEATING PLANE

(OPTIONAL)

PIN 1 ID

0.1 C A B

0.05 C

NOTES:

1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing

per ASME Y14.5M.

2. This drawing is subject to change without notice.

3. The package thermal pad must be soldered to the printed circuit board for thermal and mechanical performance.

0.08

0.1 C A B

0.05 C

SCALE 4.000

www.ti.com

EXAMPLE BOARD LAYOUT

0.07 MIN

ALL AROUND

0.07 MAX

ALL AROUND

(1.2)

(2)

10X (0.65)

10X (0.25)

(0.35) TYP

(0.75) TYP

(2.75)

() TYP

VIA

0.2

8X (0.5)

WSON - 0.8 mm max heightDSC0010B

PLASTIC SMALL OUTLINE - NO LEAD

4214926/A 07/2014

SYMM

LAND PATTERN EXAMPLE

SCALE:20X

NOTES: (continued)

4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature

number SLUA271 (www.ti.com/lit/slua271).

SOLDER MASK

OPENING

METAL

UNDER

SOLDER MASK

DEFINED

METAL

SOLDER MASK

OPENING

SOLDER MASK DETAILS

NON SOLDER MASK

DEFINED

(PREFERRED)

www.ti.com

EXAMPLE STENCIL DESIGN

(1.13)

(0.89)

10X (0.65)

10X (0.25)

8X (0.5)

(2.75)

(0.55)

WSON - 0.8 mm max heightDSC0010B

PLASTIC SMALL OUTLINE - NO LEAD

4214926/A 07/2014

NOTES: (continued)

5. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate

design recommendations.

SYMM

METAL

TYP

SOLDER PASTE EXAMPLE

BASED ON 0.125 mm THICK STENCIL

EXPOSED PAD

84% PRINTED SOLDER COVERAGE BY AREA

SCALE:25X

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Mouser Electronics

Authorized Distributor

Click to View Pricing, Inventory, Delivery & Lifecycle Information:

Texas Instruments:

LM27341QMY/NOPB LM27341QMYX/NOPB