ANALOG CMOS DEVICES 4/8 Channel Analog Multiplexers ADGS08A/ADG509A FEATURES FUNCTIONAL BLOCK DIAGRAMS 44V Supply Maximum Rating Vss to Vop Analog Signal Range Single/Dual Supply Specifications ADG508A ADGS509A Wide Supply Ranges (10.8V to 16.5V) $1 Q-ofo Oo Extended Plastic Temperature Range | ( 40C to + 85C) Low Power Dissipation (28mW max) Low Leakage (20pA typ) Available in 16-Lead DIP/SOIC and 20-Lead PLCC/LCCC Packages Superior Alternative to: DG508A, HI-508 DECODER DG509A, HI-509 644 AO Al A2 EN AO A1 EN GENERAL DESCRIPTION ORDERING GUIDE The ADG508A and ADGSO9A are CMOS monolithic analog multiplexers with 8 channels and dual 4 channels respectively. Temperature Package The ADGS508A switches one of 8 inputs to a common output Model! Range Option? depending on the state of three binary addresses and an enable input. The ADGSO9A switches one of 4 differential inputs to a ADGS08AKN 40C to + 85C | N-16 common differential output depending on the state of two binary ADGS508AKR 40C to + 85C | R-16A addresses and an enable input. Both devices have TTL and 5V ADGS08AKP ~ 40C to + 85C | P-20A CMOS logic compatible digital inputs. ADGS508ABQ 40C to +85C | Q-16 . ADGS08ATQ 55C to + 125C | Q-16 The ADGS08A and ADGSO09A are designed on an enhanced ADGS08ATE 55Cto + 125C | E-20A LC?MOS process which gives an increased signal capability of Vss to Vpp and enables operation over a wide range of supply voltages. The devices can comfortably operate anywhere in the ADGS09AKN | 40Cto + 85C | N-16 ADGSO09AKR 40Cto + 85C | R-16A 10.8V to 16.5V single or dual supply range. These multiplexers ADG509AKP 40C to + 85C | P-20A also feature high switching speeds and low Ron. ADG509ABQ 40C to + 85C | Q-16 ADGS09ATQ 55C to + 125C | Q-16 PRODUCT HIGHLIGHTS ADGS09ATE 55C to + 125C | E-20A 1. Single/Dual Supply Specifications with a Wide Tolerance: NOTES The devices are specified in the 10.8V to 16.5V range for 'To order MIL-STD-883, Class B processed parts, add both single and dual supplies. /883B to part number. See Analog Devices Military Products Databook (1990) for military data sheet. 2. Extended Signal Range: 2E Leadless C. ic Chip Carrier (LCCC); N 2 . : . = eadless Ceramic ip Carrier > = The enhanced LC*MOS processing results in a high breakdown Plastic DIP; P = Plastic Leaded Chip Carrier (PLCC); and an increased analog signal range of Vss to Vpp. Q = Cerdip; R = 0.15 Small Outline IC (SOIC). 3. Break-Before-Make Switching: , , es Switches are guaranteed break-before-make so that input signals are protected against momentary shorting. 4. Low Leakage: Leakage currents in the range of 20pA make these multiplexers suitable for high precision circuits. REV. B Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. otherwise under any patent or patent rights of Analog Devices. Tel: 617/329-4700 Fax: 617/326-8703ADGS08A/ADG509A SPECIFICATIONS DUAL SUPPLY w,, = +10.8v to +165, V.; = 10.8V to 16.5V unless otherwise specified) ADGS508A ADG508A ADGS508A ADGS509A ADGS509A ADG509A K Version B Version T Version 40C to -40C to 55Cto Parameter +25C =+85C 25C + 85C +25C 3 +125C Units Comments ANALOG SWITCH Analog Signal Range Vss Vss Vss Vss Vss Vss V min Vpp ~=Vpp Vpp Vpp Vpp Vpp V max Ron 280 280 280 Otyp 10V=Vs= + 10V, Ips = 1mA; Test Circuit 1 450 600 450 600 450 600 O max 300 400 300 400 O max Vpp = 15V( + 10%), Vsg = 1SV(+ 10%) 300 400 Q max Vpp = 15V(+ 5%), Vss = 15V(+5%) Ron Drift 0.6 0.6 0.6 %/Ctyp | Vs=0,Ips=1mA Ron Match 5 5 5 %typ -10V<Vs + 10V, Ips = 1mA Is (OFF), Off Input Leakage 0.02 0.02 0.02 nA typ V1= + 10V, V2= + 10V; Test Circuit 2 1 50 1 50 1 50 nA max Ip (OFF), Off Output Leakage 0.04 0.04 0.04 nA typ V1= +10V, V2 = + 10V; Test Circuit 3 ADG508A 1 100 1 100 1 100 nA max ADGS509A 1 50 1 50 1 50 nA max Ip (ON), On Channel Leakage 0.04 0.04 0.04 nA typ V1=V2= + 10V; Test Circuit 4 ADGS08A 1 100 ] 100 1 100 nA max ADGS09A 1 50 1 50 1 50 nA max Iprer; Differential Off Output Leakage (ADGSO9A only) 25 25 25 nA max V1= + 10V, V2 = + 10V; Test Circuit 5 DIGITAL CONTROL Vinu, Input High Voltage 2.4 2.4 2.4 Vmin Vint, Input Low Voltage 0.8 0.8 0.8 V max Ty or [pny 1 1 1 pAmax | Vin=O0toVpp Crp Digital Input Capacitance 8 8 8 pF max DYNAMIC CHARACTERISTICS transition! 200 200 200 ns typ V1= + 10V, V2 = + 10V; Test Circuit 6 300 400 300 400 300 400 ns max topen! 50 50 50 ns typ Test Circuit 7 25 10 25 10 25 10 ns min ton (EN)! 200 200 200 ns typ Test Circuit 8 300 400 300 400 300 400 ns max torr (EN)! 200 200 200 ns typ Test Circuit 8 300 400 300 400 300 400 ns max OFF Isolation 68 68 68 dBtyp Ven = 0.8V, Ry = 1kQ, Cy; = 15pF, 50 50 50 dB min Vs =7V rms, f= 100kHz Cp (OFF) ADGS508A 22 22 22 pF typ Ven =0.8V ADGS09A 11 11 11 pF typ Qiny, Charge Injection 4 4 4 pC typ Rs = 00, Vs =0; Test Circuit 9 POWER SUPPLY Ipp 0.6 0.6 0.6 mA typ Vin = Vint or Vinu 1.5 1.5 1.5 mA max Iss 20 20 20 pA typ Vin = Vint or Vinu 0.2 0.2 0.2 mA max Power Dissipation 10 10 10 mW typ 28 28 28 mW max NOTE 'Sample tested at 25C to ensure compliance. Specifications subject to change without notice. REV. BADGSO8A/ADG509A SINGLE SUPPLY w,, = +10.8v to +16.5V, Vig = GND = OV unless otherwise noted.) ADGS508A ADGS508A ADGS508A ADGS509A ADG509A ADG509A K Version B Version T Version 40C to 40C to 55Cto Parameter +25C = +85C +25C = +85C +25C + +125C | Units Comments ANALOG SWITCH Analog Signal Range GND GND GND GND GND GND Vmin Vpp = Vpp Vpp Vpp Vpp Vpp V max Ron 500 500 500 Otyp GNDVs< + 10V, Ips = 0.5mA Test; Circuit 1 700 1000 700 1000 700 1000 O max Ron Drift 0.6 0.6 0.6 %/Ctyp | Vs=0,Ips=0.5mA Ron Match 5 5 5 % typ GNDVs& + 10V, Ips = 0.5mA Is (OFF), Off Input Leakage 0.02 0.02 0.02 nA typ V1=+10V/GND, V2=GND?/ + 10V, 1 50 1 50 1 50 nA max Test Circuit 2 Ip (OFF), Off Output Leakage 0.04 0.04 0.04 nA typ V1= +10V/GND, V2=GND/ + 10V; ADGS08A 1 100 1 100 1 100 nA max Test Circuit 3 ADGS09A 1 50 1 50 1 50 nA max Ip (ON), On Channel Leakage 0.04 0.04 0.04 nAtyp V1=V2= + 10V/GND; ADG508A 1 100 1 100 1 100 nA max Test Circuit 4 ADGS09A 1 50 1 50 1 50 nA max Iprrr, Differential Off Output V1= +10V/GND, V2=GND/ + 10V; Leakage (ADG509A only) 25 25 25 nA max Test Circuit 5 DIGITAL CONTROL Vinnu; Input High Voltage 2.4 2.4 2.4 V min VinL, Input Low Voltage 0.8 0.8 0.8 V max Inn or Tiny 1 1 1 pA max Vin = 0to Vpp Cyn Digital Input Capacitance 8 8 8 pF max DYNAMIC CHARACTERISTICS trransrtion! 300 300 300 ns typ V1= + LOV/GND, V2=GND?/ + 10V; Test Cicuit 6 450 600 450 600 450 600 ns max topen! 50 50 50 ns typ Test Circuit 7 25 10 25 10 25 10 ns min lon (EN)! 250 250 250 ns typ Test Circuit 8 450 600 450 600 450 600 ns max torr (EN)! 250 250 250 ns typ Test Circuit 8 : 450 600 450 600 450 600 ns max OFF Isolation 68 68 68 dB typ Ven = 0.8V, Ry = 1k0, Cy = 15pF, 50 50 50 dB min Vs =3.5V rms, f= 100kHz Cs (OFF) 5 5 5 pF typ Ven = 0.8V Cp (OFF) ADG508A 22 22 22 pF typ Ven =0.8V ADGS09A 11 11 11 pF typ Qiny, Charge Injection 4 4 4 pC typ Rs = 09, Vs = 0V; Test Circuit 9 POWER SUPPLY Ipp 0.6 0.6 0.6 mA typ Vin= Vint or Vinu 15 1.5 1.5 mA max Power Dissipation 10 10 10 mW typ 25 25 25 mW max NOTE ae . Sample tested at 25C to ensure compliance. Cin Digital mpul capacitance Specifications subject to change without notice. torr (EN) Delay time between the 50% and 10% points of the digital input and switch OFF condition TERMINOLOGY ete 6 one: UTRANSITION Delay time between the 50% and 90% points of Ron Ohmic resistance between terminals D and S the digital inputs and switch ON condition Ron Match Difference between the Ron of any two channels when switching from one address state to Ron Drift Change in Ron versus temperature another Is (OFF) Source terminal leakage current when the switch lopEN OFF time measured between 50% points of is off both switches when switching from one address Ip (OFF) Drain terminal leakage current when the switch state to another is off VINL Maximum input voltage for Logic 0 Ip (ON) Leakage current that flows from the closed switch Vinu Minimum input voltage for Logic 1 into the body Inn (ine) Input current of the digital input Vs (Vp) Analog voltage on terminal S or D Vpp Most positive voltage supply Cs (OFF) Channel input capacitance for OFF condition Vss Most negative voltage supply Cp (OFF) Channel output capacitance for OFF Ipp Positive supply current condition Iss Negative supply current REV. B -3-ADGS08A/ADG509A ABSOLUTE MAXIMUM RATINGS* TRUTH TABLES (Ta = 25C unless otherwise noted) AD Al AO EN ON SWITCH Vpp to Vss - ww ee 44V x x x 0 NONE Vpp toGND ........ 0.00. eee ee ee ee 25V 0 0 0 1 1 Vss to GND .......00 0 0 eee ee ee ees 25V Analog Inputs! 0 0 1 1 2 Voltage atS,D .. 2... 2. ee ee eee Vss 2V to 0 ! 9 | 3 Vpp +2Vor 9 1 1 1 4 20mA, Whichever Occurs First 1 0 0 1 5 Continuous Current, Sor D ............. 20mA 1 0 1 1 6 Pulsed Current S or D 1 1 0 1 7 Ims Duration, 10% Duty Cycle .......... 40mA 1 1 1 1 8 Digital Inputs! Voltage atA, EN ............200% Vss 4V to X= Dont Care Vop +4Vor ADG508A 20mA, Whichever Occurs First Power Dissipation (Any Package) switcH Upto +75C . 2... ee ee 470mW Al AO EN PAIR Derates above +75C by ............. 6omW/C Operating Temperature x x 0 NONE Commercial (K Version) ......... 40C to +85C 0 0 1 1 Industrial (B Version). .......... 40C to + 85C 0 1 1 2 Extended (T Version). .......... 55C to +125C 1 0 1 3 Storage Temperature Range. ........ ~ 65C to + 150C 1 1 1 4 rOwervoltage at A, EN, S or D will be clamped by diodes. Current should be X= Dont Care ADG509A limited to the Maximum Rating above. *COMMENT: Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. CAUTION ESD (electrostatic discharge) sensitive device. The digital control inputs are Zener protected; WARNING! however, permanent damage may occur on unconnected devices subject to high energy electro- static fields. Unused devices must be stored in conductive foam or shunts. The protective foam iI ee should be discharged to the destination socket before devices are removed. ESD SENSITIVE DEVICE PIN CONFIGURATIONS DIP, SOIC LCCC PLCC VW zga2a8 AQ 1 e 16] A, 3 1 20 19 EN | 2 15| A, 7 1 Vss 4 tJ 18 GND Vss | 3 14] GNO 815 vv CE soeme Ee we of]] aueeane | das ne apevgte (Not to Scale) 82 EI (Not to Seale) 12] 85 s2 7 (Not to Scale} 15 $5 ss Ce uj 86 S83 8 14 S6 $4 Ey 10| s7 D [e] 9 | ss 9 10 11 12 13 ro] [1] 4 9 2 8 & nec = No connect $ 2 BB ne=woconnect $ oor a z2ao0 3.2 20 19 Ao Gi e 16] A, . t 1 EN [2 15 | GND Ves 4 i 18 Voo Vss EI 14] Yoo S1A 5 17 $18 ADG509A ADG509A sia [4 13] S1B NC 6 16 NC TOP VIEW ADGS509A (Nov te Sele) 5 528 (Not to Seale) E] TOP ViEW le] S2A 7 S2A [5 (Not to Scale} 12] S28 S3A 8 14 $3B S3A | 6 11] $3B GE 5 Oe Ps fbolteyLeIbs] 9 #10 11 12 #13 DA 8 9] 0B aa g 2 @ +, a = a # NC = NO CONNECT q@donua & = 9 @ Nc = NO CONNECT ~4- REV. BTypical Performance Characteristics ADG508A/ADG509A The multiplexers are guaranteed functional with reduced single or dual supplies down to 4.5V. 700 600 Voo = +5V Veg = 5V 500 N \ ~ 400 5 y 3 x Vop = +10.8V 300 Ves = 10.8V 200 <I oO Se Vop = +15V fp Vss = 15V 100 0 -20 15 -10 -5 0 5 10 15 20 . Vo(Vs) - Volts Ron as a Function of Vp{Vs): Dual Supply Voltage, Ta = +25C 100 I Voo = +16.5V Vss = 16.5V ft * p10 7) 2 Ip (ON) a 3 ln OFF} |] oO a 1 | g - $ LA - 4 LA Is (OFF) 0.1 ar _] Ss 25 35 45 55 65 75 85 95 105 115 125 TEMPERATURE - C a Leakage Current as a Function of Temperature (Note: Leakage Currents Reduce as the Supply Voltages Reduce) 800 700 600 \ 500 Cu c i Z z IN SINGLE 3 SUPPLY 2 400 NS DUAL NS SUPPLY 300 es Se 200 [1 Cs 100 \ | 1 | | 5 6 7 8 9 0 WW 12 #13 14 (15 SUPPLY VOLTAGE - Volts trransirion VS. Supply Voltage: Dual and Single Supplies, Ta = +25 (Note: For Vpp and /Vss/ < 10V; V1 = Vopd/Vss, V2 = Vsgs/Vpp. See Test Circuit 6) REV. B 700 600 Vpo = +10.8V Vss = 0 500 ax 2 400 IN \ o Voo = +15V =0 2 ss o = 300 NS 200 100 0 -20 0 -15 -10 -5 0 5 10 1520 Vp{Vs) - Volts Ron as a Function of Vp(Vs): Single Supply Voltage, Tri Su, lop Ta = +25 1.9 1.8 2 [N 5 > - DN S m 1.7 z | > Ww gO P| oa BE 1.6 | is l l l 5 6 7 8 9 10 W 12 13 14 15 SUPPLY VOLTAGE - Voits gger Levels vs. Power Supply Voltage, Dual or Single pply, Ta = +25C 0.8 0.6 at Ibp- mA LT 0.2 i 4 1 i 1 5 6 7 8 3 10 11 12 130 =14 15 16 17 SUPPLY VOLTAGE - Volts vs. Supply Voltage: Dual or Single Supply, Ta = +25CADGS08A/ADGSOSA Test Circuits Note: All Digital Input Signal Rise and Fall Times Measured from 10% to 90% of 3V. tg = tg = 20ns. TEST CIRCUIT 1 TEST CIRCUIT 2 TEST CIRCUIT 3 Ron Is (OFF) Ip (OFF) los Vop Vss * Voo Vss T T Tt Vop Vss Voo Vss o _o D 0 ! om T o D Vs +0.8V ls (OFF) EN - lp (OFF) O EN | + 0.8V vwi1= GND Ve v1 = v2 == GND L V7 = v2 5 i x Te vv wv TEST CIRCUITS TEST CIRCUIT 4 IpiFF Ip (ON) Vop Vss Vop Vss T T Vop Vss + t EN - 0.8V oO Von Vss TO o_|_DA (A) D t t oO ~o ' ADG509A 4 o 2.4V DB = eT Po) v1 GND I V2 = Ip (ON) ond v2 Vv gu v lower = Ipa (OFF) Ipg (OFF) TEST CIRCUIT 6 SWITCHING TIME OF MULTIPLEXER, trransrrion Voo Vss 3V | | ADDRESS Tt TT 50% DRIVE (Vin) whee OR Vop Vss | A2 s1 ;- v1 ex OE cenmerfs, { O | AO Ss | { | | ! | OUTPUT PN? | y, ADG508A* | oytput | 2.4V ~4 EN D | GND IMO 35pF transition trransition ____ *SIMILAR CONNECTION FOR ADG509A TEST CIRCUIT 7 . BREAK-BEFORE-MAKE DELAY, topen Vop Vss 3V ADDRESS s1 +5V DRIVE (Vin) A2 ov | Love Vin @) 3 A $2 THRU S7 ay AO $8 \/ ADG508A* \ f % OUTPUT ee OUTPUT 24v en D | >| = GND 1kO 35pF topen V *SIMILAR CONNECTION FOR ADG503A -6- REV. BADGSO8A/ADGSOSA TEST CIRCUITS ENABLE DELAY, ton (EN), torr (EN) Vop Vss 3V ENABLE [ T _ fen nk pave (Vin) Vop Vss ov | 80% A2 $1 -- +5V | i Al $2 THRU S8 ft \uer H Y 10% % I ton ADG508A OUTPUT ! ton F- |, EN D (EN) = 4 (EN) - GND Vin 500) 1kQ 35pF *SIMILAR CONNECTION FOR ADG509A % TEST CIRCUIT 9 CHARGE INJECTION 3v \ / Vop Vss Vin ov AO 4 v L at Vo AVo rrctcslo4 A2 ADG508A* ! Vv wv 1 st o P + Vo ; sw EN Let L = I J 1nF - Qiny = CL x AVo t Vin 500) GND *SIMILAR CONNECTION FOR ADG509A SINGLE SUPPLY OCTAL DAC APPLICATION The following circuit shows the ADGSO8A connected as a de- multiplexer to provide eight separate digitally programmable voltages (0 to + 10V) from the AD7245. The AD7245 is a complete 12-bit, voltage output DAC with output amplifier and Zener v voltage reference on a monolithic CMOS chip. The entire system operates from a single +15V power supply. The ADG508A is ideally suited for the application because it has both low charge injection and Is (OFF) leakage current. +15V +15V T _ Vop EN Voo DB11 Rea Vouts S1 ~~ DBO Vout e D 1/4 TLC274 0.01yF AD7245 CS R ADG508A OFS ns WR wR Vss GND LDAC LDAC DGND Vss +| ciR Vv AGND outs sa Bo REF OUT 1/4 TLC274 AO Al A2 0.01,1F ee fT f b O.1pF 10,.F 5 ADG508A in a Single-Supply Octal DAC Circuit REV. B ayADGS08A/ADG509A MECHANICAL INFORMATION OUTLINE DIMENSIONS Dimensions shown in inches and (mm). 16-Pin Plastic (N-16) RAABAAANA AA 0.26 (6.61) 0.24 (6.1) e 0.755 (19.18) 0.306 (7.78) t 0.745 (18.93) 7 0.294 (7.47) t 0.77 14.32) O48 G86) | 0.175 (4.45) { 0.12 (3.05) 15 >| |e | Lh I 0.012 (0.305) 0.065 (1.66) 0.02 (0.508) 0.105 (2.67) 0.008 (0.203) 0.045 (1.15) 0.015 (0.381) 0.095 (2.42) LEAD NO. 1 IDENTIFIED BY DOT OR NOTCH LEADS ARE SOLDER OR TIN-PLATED KOVAR OR ALLOY 42 16-Lead Narrow Body SOIC (R-16A) Di hiiiit t 2440 (6.20) 0.2284 (5.80) 0.1574 (4.00) 0.1497 (3.80) TOOT TITd | 0.3937 (10.00) 0.3859 (9.80) h. 45 ~s + ~# 0.0688 (1.75) 0.0532 (1.35) SEATING PLANE 0.0098 (0.25) | 0.0099 (0.25) 0.0040 (0.10) F > oe oe 0.0075 (0.19) # 0.0500 (1.27) 0.0192 (0.49) BSC 0.0138 (0.35) 16-Pin Cerdip (Q-16) {7.62) (6.1) . Z rvrrrrmeid 0.32 (8.128) 0.785 (19.94) 0.29 (7.366) 0.75 (19.05) oss (a572)|f 0.155 (3.937) MIN 0.14 (3.56) Eo od 0.20 (5.08) 0.015 (0.381) 0.125 (3.175) 0.008 (0.203 bo ae a ke OY 0.07 (1.778) 0.023 (0.584) 0.11 (2.794) 15 0.03 (0.762) 0.015 (0.381) 0.09 (2.28) 0 NOTES: 0.0500 (1.27) A ie 0.0160 (0.41) LEAD NO. 1 IDENTIFIED BY DOT OR NOTCH. LEADS ARE SOLDER OF TIN-PLATED KOVAR OR ALLOY 42 20-Terminal Leadless Ceramic Chip Carrier (E-20A) 0.082 +0.018 (2.085 + 0.455} 20-Terminal Plastic Leaded Chip Carrier (P-20A) 0.042 (1.07) 0.042 (1.07) 4 *~ 9.048 (.21) >| ~ 0.056 (1.42) 0.042 (1.07) + 3 > 0.048 (1.21) 4 PIN1 t 4 IDENTIFIER 18 fal 0.050 (1.27) o 0.350 (8.89) BSC 0.356 (9.04) + 0.290 U TOP VIEW ] 0.385 (9.78) 0.013 (0.33) 9.330 O 0 0.395 (10.02) 0.021 (0.53) q 0 6006 (0.66) 8 1 0.032 (0.81) 9 13 | LJ COT CI LI - 0.350 (8.89) 0.015 (0.38) 0.356 (9.04) 0.025 (0.63) 0.385 (9.78) 0.025 (0.64) 0.395 (10.02) 0.040 (7.07) ag 0.085 (2.16) 4702.79) 0.165 (4.19) 1.180 (4.57) 0.290 (7.37) (8.38) PIN 1 IDENTIFIER BOTTOM VIEW 0.040 x 45 (1.02 x 45) REF3PLCS t 0.025 +0.003 A (0.635 +0.075) BOTTOM VIEW 0.20 x 45 (0.51 x 45) REF REV. B C104a-9- 11/87 PRINTED IN U.S.A.