FEATURES 4 -IN +IN 3 The AD8605, AD8606, and AD8608 1 are single, dual, and quad rail-to-rail input and output, single-supply amplifiers. They feature very low offset voltage, low input voltage and current noise, and wide signal bandwidth. They use the Analog Devices, Inc. patented DigiTrim(R) trimming technique, which achieves superior precision without laser trimming. The combination of low offsets, low noise, very low input bias currents, and high speed makes these amplifiers useful in a wide variety of applications. Filters, integrators, photodiode amplifiers, and high impedance sensors all benefit from the combination of performance features. Audio and other ac applications benefit from the wide bandwidth and low distortion. Applications for these amplifiers include optical control loops, portable and loop-powered instrumentation, and audio amplification for portable devices. B3 +INA V- +INB C1 C2 C3 Figure 2. 8-Ball WLCSP (CB Suffix) OUT A 1 14 OUT D OUT V+ -IN A 2 13 -IN D 1 5 +IN A 3 AD8608 12 +IN D TOP VIEW (Not to Scale) 11 V- 10 +IN C V- V+ 4 2 +IN -IN +IN B 5 3 4 -IN B 6 9 -IN C OUT B 7 8 OUT C AD8605 ONLY Figure 3. 5-Ball WLCSP (CB Suffix) 1 -INB B1 AD8606 TOP VIEW (BUMP SIDE DOWN) OUT A -IN A +IN A V- -INA TOP VIEW (BALL SIDE DOWN) Figure 1. 5-Lead SOT-23 (RJ Suffix) GENERAL DESCRIPTION A3 5 V+ TOP VIEW (Not to Scale) V- 2 OUTB A2 02731-057 AD8605 V+ A1 AD8606 8 TOP VIEW (Not to Scale) 4 5 V+ OUT B -IN B +IN B 02731-004 OUT 1 OUTA Figure 4. 14-Lead SOIC_N (R Suffix) Figure 5. 8-Lead MSOP (RM Suffix), 8-Lead SOIC_N (R Suffix) OUT A -IN A +IN A V+ +IN B -IN B OUT B 1 14 AD8608 TOP VIEW (Not to Scale) 7 8 OUT D -IN D +IN D V- +IN C -IN C OUT C 02731-002 Photodiode amplification Battery-powered instrumentation Multipole filters Sensors Barcode scanners Audio BALL A1 CORNER 02731-001 APPLICATIONS PIN CONFIGURATIONS 02731-003 Low offset voltage: 65 V maximum Low input bias currents: 1 pA maximum Low noise: 8 nV/Hz Wide bandwidth: 10 MHZ High open-loop gain: 1000 V/mV Unity gain stable Single-supply operation: 2.7 V to 5.5 V 5-ball WLCSP for single (AD8605) and 8-ball WLCSP for dual (AD8606) 02731-006 Data Sheet Precision, Low Noise, CMOS, Rail-to-Rail, Input/Output Operational Amplifiers AD8605/AD8606/AD8608 Figure 6. 14-Lead TSSOP (RU Suffix) The AD8605, AD8606, and AD8608 are specified over the extended industrial temperature range (-40C to +125C). The AD8605 single is available in 5-lead SOT-23 and 5-ball WLCSP packages. The AD8606 dual is available in an 8-lead MSOP, an 8-ball WLSCP, and a narrow SOIC surface-mounted package. The AD8608 quad is available in a 14-lead TSSOP package and a narrow 14-lead SOIC package. The 5-ball and 8-ball WLCSP offer the smallest available footprint for any surface-mounted operational amplifier. The WLCSP, SOT-23, MSOP, and TSSOP versions are available in tape-and-reel only. 1 Protected by U.S. Patent No. 5,969,657. Rev. L Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 (c)2002-2012 Analog Devices, Inc. All rights reserved. AD8605/AD8606/AD8608 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 THD + Noise ............................................................................... 16 Applications ....................................................................................... 1 Total Noise Including Source Resistors ................................... 17 General Description ......................................................................... 1 Channel Separation .................................................................... 17 Pin Configurations ........................................................................... 1 Capacitive Load Drive ............................................................... 17 Revision History ............................................................................... 3 Light Sensitivity .......................................................................... 18 5 V Electrical Specifications ............................................................ 4 WLCSP Assembly Considerations ........................................... 18 2.7 V Electrical Specifications ......................................................... 6 I-V Conversion Applications ........................................................ 19 Absolute Maximum Ratings............................................................ 8 Photodiode Preamplifier Applications .................................... 19 ESD Caution .................................................................................. 8 Audio and PDA Applications ................................................... 19 Typical Performance Characteristics ............................................. 9 Instrumentation Amplifiers ...................................................... 20 Applications Information .............................................................. 16 DAC Conversion ........................................................................ 20 Output Phase Reversal ............................................................... 16 Outline Dimensions ....................................................................... 21 Maximum Power Dissipation ................................................... 16 Ordering Guide .......................................................................... 24 Input Overvoltage Protection ................................................... 16 Rev. L | Page 2 of 24 Data Sheet AD8605/AD8606/AD8608 REVISION HISTORY 2/12--Rev. K to Rev. L Changed Functional Block Diagrams Section to Pin Configuration Section ................................................................. 1 Changes to Figure 11 ................................................................... 9 Added Figure 33 ......................................................................... 13 8/11--Rev. J to Rev. K Changes to Figure 20 ................................................................... 2 Updated Outline Dimensions ................................................... 20 Changes to Ordering Guide ...................................................... 23 8/10--Rev. I to Rev. J Changes to Figure 10 and Figure 11 .......................................... 9 Changes to Figure 15 ................................................................. 10 Changes to Figure 36 ................................................................. 13 Changes to Figure 42 ................................................................. 14 Updated Outline Dimensions ................................................... 20 Changes to Ordering Guide ...................................................... 23 9/08--Rev. H to Rev. I Changes to Input Overvoltage Protection Section ................ 15 Changes to Ordering Guide ...................................................... 22 2/08--Rev. G to Rev. H Changes to Features ..................................................................... 1 Changes to Table 1 ....................................................................... 4 Changes to Table 2 ....................................................................... 6 Changes to Figure 11 ................................................................... 9 Changes to Figure 13, Figure 14, and Figure 16 Captions .... 10 Changes to Figure 15, Figure 17, and Figure 18 ..................... 10 Changes to Figure 34 and Figure 35 Captions........................ 13 Changes to Figure 36 ................................................................. 13 Changes to Figure 37 Caption .................................................. 14 Changes to Figure 38 and Figure 41 ........................................ 14 Changes to Figure 45 ................................................................. 15 Changes to Audio and PDA Applications Section ................. 18 Changes to Figure 52 ................................................................. 18 Changes to Ordering Guide ...................................................... 22 10/07--Rev. F to Rev. G Changes to Figure 2...................................................................... 1 Updated Outline Dimensions ................................................... 20 8/07--Rev. E to Rev. F Added 8-Ball WLCSP Package ..................................... Universal Changes to Features ..................................................................... 1 Changes to Table 1 ....................................................................... 3 Changes to Table 2 ....................................................................... 5 Changes to Table 4 ....................................................................... 7 Updated Outline Dimensions ................................................... 19 Changes to Ordering Guide ...................................................... 21 Changes to Table 4 ........................................................................6 Changes to Figure 12 Caption .....................................................8 Changes to Figure 26 and Figure 27 Captions ....................... 11 Changes to Figure 33 Caption .................................................. 12 Changes to Figure 44 ................................................................. 14 Updated Outline Dimensions................................................... 19 Changes to Ordering Guide ...................................................... 20 5/04--Rev. C to Rev. D Updated Format ............................................................. Universal Edit to Light Sensitivity Section ............................................... 16 Updated Outline Dimensions................................................... 19 Changes to Ordering Guide ...................................................... 20 7/03--Rev. B to Rev. C Changes to Features .......................................................................1 Change to General Description....................................................1 Addition to Functional Block Diagrams .....................................1 Addition to Absolute Maximum Ratings ....................................4 Addition to Ordering Guide .........................................................4 Change to Equation in Maximum Power Dissipation Section .......................................................................................... 11 Added Light Sensitivity Section ................................................ 12 Added New Figure 8; Renumbered Subsequently .................. 13 Added New MicroCSP Assembly Considerations Section .... 13 Changes to Figure 9 .................................................................... 13 Change to Equation in Photodiode Preamplifier Applications Section .................................................................. 13 Changes to Figure 12 .................................................................. 14 Change to Equation in D/A Conversion Section.................... 14 Updated Outline Dimensions ................................................... 15 3/03--Rev. A to Rev. B Changes to Functional Block Diagram .......................................1 Changes to Absolute Maximum Ratings.....................................4 Changes to Ordering Guide ........................................................ 4 Changes to Figure 9 ................................................................... 13 Updated Outline Dimensions.................................................... 15 11/02--Rev. 0 to Rev. A Change to Electrical Characteristics............................................2 Changes to Absolute Maximum Ratings.....................................4 Changes to Ordering Guide .........................................................4 Change to TPC 6 ...........................................................................5 Updated Outline Dimensions.................................................... 15 5/02--Revision 0: Initial Version 1/06--Rev. D to Rev. E Changes to Table 1 ....................................................................... 3 Changes to Table 2 ....................................................................... 5 Rev. L | Page 3 of 24 AD8605/AD8606/AD8608 Data Sheet 5 V ELECTRICAL SPECIFICATIONS VS = 5 V, VCM = VS/2, TA = 25C, unless otherwise noted. Table 1. Parameter INPUT CHARACTERISTICS Offset Voltage AD8605/AD8606 (Except WLCSP) AD8608 AD8605/AD8606/AD8608 Input Bias Current AD8605/AD8606 AD8605/AD8606 AD8608 AD8608 Input Offset Current Symbol Conditions Min Typ Max Unit 20 20 80 65 75 300 750 1 50 250 100 300 0.5 20 75 5 V V V V pA pA pA pA pA pA pA pA V dB dB V/mV 4.5 6.0 V/C V/C VOS VS = 3.5 V, VCM = 3 V VS = 3.5 V, VCM = 2.7 V VS = 5 V, VCM = 0 V to 5 V -40C < TA < +125C IB 0.2 -40C < TA < +85C -40C < TA < +125C -40C < TA < +85C -40C < TA < +125C IOS 0.1 -40C < TA < +85C -40C < TA < +125C Input Voltage Range Common-Mode Rejection Ratio Large Signal Voltage Gain Offset Voltage Drift AD8605/AD8606 AD8608 INPUT CAPACITANCE Common-Mode Input Capacitance Differential Input Capacitance OUTPUT CHARACTERISTICS Output Voltage High Output Voltage Low Output Current Closed-Loop Output Impedance POWER SUPPLY Power Supply Rejection Ratio AD8605/AD8606 AD8605/AD8606 WLCSP AD8608 Supply Current/Amplifier DYNAMIC PERFORMANCE Slew Rate Settling Time Unity Gain Bandwidth Product Phase Margin CMRR AVO VCM = 0 V to 5 V -40C < TA < +125C RL = 2 k, VO = 0.5 V to 4.5 V VOS/T VOS/T -40C < TA < +125C -40C < TA < +125C 0 85 75 300 1 1.5 CCOM CDIFF VOH VOL IOUT ZOUT IL = 1 mA IL = 10 mA -40C < TA < +125C IL = 1 mA IL= 10 mA -40C < TA < +125C 100 90 1000 4.96 4.7 4.6 8.8 2.6 pF pF 4.98 4.79 V V V mV mV mV mA 20 170 40 210 290 80 1 f = 1 MHz, AV = 1 PSRR ISY SR tS GBP M VS = 2.7 V to 5.5 V VS = 2.7 V to 5.5 V VS = 2.7 V to 5.5 V -40C < TA < +125C IOUT = 0 mA -40C < TA < +125C RL = 2 k, CL = 16 pF To 0.01%, 0 V to 2 V step, AV = 1 Rev. L | Page 4 of 24 80 75 77 70 95 92 92 90 1 5 <1 10 65 1.2 1.4 dB dB dB dB mA mA V/s s MHz Degrees Data Sheet Parameter NOISE PERFORMANCE Peak-to-Peak Noise Voltage Noise Density Current Noise Density AD8605/AD8606/AD8608 Symbol Conditions en p-p en en in f = 0.1 Hz to 10 Hz f = 1 kHz f = 10 kHz f = 1 kHz Rev. L | Page 5 of 24 Min Typ Max Unit 2.3 8 6.5 0.01 3.5 12 V p-p nV/Hz nV/Hz pA/Hz AD8605/AD8606/AD8608 Data Sheet 2.7 V ELECTRICAL SPECIFICATIONS VS = 2.7 V, VCM = VS/2, TA = 25C, unless otherwise noted. Table 2. Parameter INPUT CHARACTERISTICS Offset Voltage AD8605/AD8606 (Except WLCSP) AD8608 AD8605/AD8606/AD8608 Input Bias Current AD8605/AD8606 AD8605/AD8606 AD8608 AD8608 Input Offset Current Symbol Conditions Min Typ Max Unit 20 20 80 65 75 300 750 1 50 250 100 300 0.5 20 75 2.7 V V V V pA pA pA pA pA pA pA pA V dB dB V/mV 4.5 6.0 V/C V/C VOS VS = 3.5 V, VCM = 3 V VS = 3.5 V, VCM = 2.7 V VS = 2.7 V, VCM = 0 V to 2.7 V -40C < TA < +125C IB 0.2 -40C < TA < +85C -40C < TA < +125C -40C < TA < +85C -40C < TA < +125C IOS 0.1 -40C < TA < +85C -40C < TA < +125C Input Voltage Range Common-Mode Rejection Ratio Large Signal Voltage Gain Offset Voltage Drift AD8605/AD8606 AD8608 INPUT CAPACITANCE Common-Mode Input Capacitance Differential Input Capacitance OUTPUT CHARACTERISTICS Output Voltage High Output Voltage Low Output Current Closed-Loop Output Impedance POWER SUPPLY Power Supply Rejection Ratio AD8605/AD8606 AD8605/AD8606 WLCSP AD8608 Supply Current/Amplifier DYNAMIC PERFORMANCE Slew Rate Settling Time Unity Gain Bandwidth Product Phase Margin CMRR AVO VCM = 0 V to 2.7 V -40C < TA < +125C RL = 2 k, VO = 0.5 V to 2.2 V VOS/T VOS/T -40C < TA < +125C -40C < TA < +125C 0 80 70 110 1 1.5 CCOM CDIFF VOH VOL IOUT ZOUT IL = 1 mA -40C < TA < +125C IL = 1 mA -40C < TA < +125C 95 85 350 2.6 2.6 8.8 2.6 pF pF 2.66 V V mV mV mA 25 40 50 30 1.2 f = 1 MHz, AV = 1 PSRR ISY SR tS GBP M VS = 2.7 V to 5.5 V VS = 2.7 V to 5.5 V VS = 2.7 V to 5.5 V -40C < TA < +125C IOUT = 0 mA -40C < TA < +125C RL = 2 k, CL = 16 pF To 0.01%, 0 V to 1 V step, AV = 1 Rev. L | Page 6 of 24 80 75 77 70 95 92 92 90 1.15 5 <0.5 9 50 1.4 1.5 dB dB dB dB mA mA V/s s MHz Degrees Data Sheet Parameter NOISE PERFORMANCE Peak-to-Peak Noise Voltage Noise Density Current Noise Density AD8605/AD8606/AD8608 Symbol Conditions en p-p en en in f = 0.1 Hz to 10 Hz f = 1 kHz f = 10 kHz f = 1 kHz Rev. L | Page 7 of 24 Min Typ Max Unit 2.3 8 6.5 0.01 3.5 12 V p-p nV/Hz nV/Hz pA/Hz AD8605/AD8606/AD8608 Data Sheet ABSOLUTE MAXIMUM RATINGS Table 4. Table 3. Parameter Supply Voltage Input Voltage Differential Input Voltage Output Short-Circuit Duration to GND Storage Temperature Range All Packages Operating Temperature Range All Packages Junction Temperature Range All Packages Lead Temperature (Soldering, 60 sec) Rating 6V GND to VS 6V Observe Derating Curves -65C to +150C -40C to +125C Package Type 5-Ball WLCSP (CB) 5-Lead SOT-23 (RJ) 8-Ball WLCSP (CB) 8-Lead MSOP (RM) 8-Lead SOIC_N (R) 14-Lead SOIC_N (R) 14-Lead TSSOP (RU) 1 -65C to +150C 300C JA1 170 240 115 206 157 105 148 JC 92 44 56 36 23 Unit C/W C/W C/W C/W C/W C/W C/W JA is specified for the worst-case conditions, that is, a device soldered in a circuit board for surface-mount packages. ESD CAUTION Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Rev. L | Page 8 of 24 Data Sheet AD8605/AD8606/AD8608 TYPICAL PERFORMANCE CHARACTERISTICS 4500 0.30 VS = 5V 0.25 0.20 0.15 3000 0.10 VOS (mV) NUMBER OF AMPLIFIERS VS = 5V 4000 TA = 25C VCM = 0V TO 5V 3500 2500 2000 1500 0.05 0 -0.05 -0.10 -0.15 1000 0 -300 -200 -100 0 100 OFFSET VOLTAGE (V) 200 -0.25 -0.30 300 Figure 7. Input Offset Voltage Distribution 0 0.5 1.0 1.5 2.0 2.5 3.0 VCM (V) 3.5 4.0 VSY = 5V VCM = VSY/2 16 12 8 150 100 50 0 -50 02731-008 0 0 0.4 0.8 1.2 1.6 2.0 2.4 2.8 3.2 TCVOS (V/C) 3.6 4.0 4.4 AD8605 AD8606 AD8608 -100 -150 -50 4.8 -25 0 25 50 75 100 02731-011 INPUT BIAS CURRENT (pA) 200 4 125 TEMPERATURE (C) Figure 11. Input Bias Current vs. Temperature Figure 8. AD8608 Input Offset Voltage Drift Distribution 1k 18 OUTPUT SATURATION VOLTAGE (mV) VS = 5V TA = -40C TO +125C VCM = 2.5V 16 14 12 10 8 6 02731-009 4 2 0 VS = 5V TA = 25C 100 10 1 0.1 0.001 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6 TCVOS (V/C) SINK SOURCE 02731-012 20 NUMBER OF AMPLIFIERS 5.0 250 VS = 5V TA = -40C TO +125C VCM = 2.5V 20 0 4.5 Figure 10. Input Offset Voltage vs. Common-Mode Voltage (200 Units, 5 Wafer Lots, Including Process Skews) 24 NUMBER OF AMPLIFIERS 02731-010 02731-007 -0.20 500 0.01 0.1 1 LOAD CURRENT (mA) Figure 12. Output Saturation Voltage vs. Load Current Figure 9. AD8605/AD8606 Input Offset Voltage Drift Distribution Rev. L | Page 9 of 24 10 AD8605/AD8606/AD8608 Data Sheet 6 5.00 VOH @ 1mA LOAD 5 VS = 5V OUTPUT SWING (V p-p) OUTPUT VOLTAGE (V) 4.95 4.90 4.85 4.80 VS = 5V VIN = 4.9V p-p TA = 25C RL = 2k AV = 1 4 3 2 VOH @ 10mA LOAD 02731-013 4.70 -40 -25 -10 5 20 35 50 65 80 95 110 0 125 02731-016 1 4.75 1k 10k TEMPERATURE (C) 100k FREQUENCY (Hz) 1M 10M Figure 16. Closed-Loop Output Voltage Swing (FPBW) Figure 13. Output Voltage Swing High vs. Temperature 100 0.25 VS = 5V VS = 5V 90 VOL @ 10mA LOAD 80 OUTPUT IMPEDANCE () 0.15 0.10 70 AV = 100 60 50 AV = 10 30 20 0.05 0 -40 -25 -10 5 20 35 50 65 80 95 02731-014 VOL @ 1mA LOAD 110 10 0 125 1k 10k TEMPERATURE (C) 100 120 180 110 135 100 90 20 45 0 0 GAIN 90 80 70 60 -20 -45 -40 -90 50 -60 -135 40 -80 -180 100k 1M FREQUENCY (Hz) 10M 100M -225 40M Figure 15. Open-Loop Gain and Phase vs. Frequency 02731-018 40 02731-015 GAIN (dB) PHASE 225 CMRR (dB) 60 10M VS = 5V VS = 2.5V RL = 2k CL = 20pF M = 64 PHASE (Degrees) 80 100k 1M FREQUENCY (Hz) Figure 17. Output Impedance vs. Frequency Figure 14. Output Voltage Swing Low vs. Temperature -100 10k AV = 1 40 02731-017 OUTPUT VOLTAGE (V) 0.20 30 20 1k 10k 100k 1M FREQUENCY (Hz) 10M Figure 18. Common-Mode Rejection Ratio (CMRR) vs. Frequency Rev. L | Page 10 of 24 Data Sheet AD8605/AD8606/AD8608 140 1.0 VS = 5V 120 PSRR (dB) 80 60 40 20 0 02731-019 -20 -40 -60 1k 10k 100k FREQUENCY (Hz) 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 0 10M 1M 02731-022 SUPPLY CURRENT/AMPLIFIER (mA) 0.9 100 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 SUPPLY VOLTAGE (V) Figure 19. PSRR vs. Frequency Figure 22. Supply Current/Amplifier vs. Supply Voltage 45 VOLTAGE NOISE (1V/DIV) 35 30 25 +OS 20 -OS 15 02731-023 10 02731-020 SMALL SIGNAL OVERSHOOT (%) VS = 5V VS = 5V RL = TA = 25C AV = -1 40 5 0 10 100 CAPACITANCE (pF) 1k TIME (1s/DIV) Figure 23. 0.1 Hz to 10 Hz Input Voltage Noise Figure 20. Small Signal Overshoot vs. Load Capacitance VS = 2.5V RL = 10k CL = 200pF AV = 1 VOLTAGE (50mV/DIV) 1.5 VS = 2.7V 1.0 VS = 5V 0 -40 02731-024 0.5 02731-021 SUPPLY CURRENT/AMPLIFIER (mA) 2.0 -25 -10 5 20 35 50 65 TEMPERATURE (C) 80 95 110 TIME (200ns/DIV) 125 Figure 24. Small Signal Transient Response Figure 21. Supply Current/Amplifier vs. Temperature Rev. L | Page 11 of 24 AD8605/AD8606/AD8608 Data Sheet 36 VS = 2.5V RL = 10k CL = 200pF AV = 1 VS = 2.5V 02731-025 VOLTAGE (1V/DIV) VOLTAGE NOISE DENSITY (nV/ Hz) 32 28 24 20 16 12 02731-028 8 4 TIME (400ns/DIV) 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 FREQUENCY (kHz) Figure 25. Large Signal Transient Response Figure 28. Voltage Noise Density vs. Frequency 53.6 VS = 2.5V RL = 10k AV = -100 VIN = 50mV 0V 0V VIN 02731-026 -50mV 46.9 40.2 33.5 26.8 20.1 13.4 6.7 02731-029 VOUT VS = 2.5V VOLTAGE NOISE DENSITY (nV/ Hz) 2.5V 0 TIME (400ns/DIV) 0 Figure 26. Positive Overload Recovery 2 3 4 5 6 FREQUENCY (kHz) 7 8 9 10 90 100 Figure 29. Voltage Noise Density vs. Frequency 119.2 VS = 2.5V RL = 10k AV = -100 VIN = 50mV VS = 2.5V VOLTAGE NOISE DENSITY (nV/ Hz) -2.5V 50mV 02731-027 0V 104.3 89.4 74.5 59.6 44.7 29.8 14.9 02731-030 0V 1 0 TIME (1s/DIV) 0 Figure 27. Negative Overload Recovery 10 20 30 40 50 60 FREQUENCY (Hz) 70 80 Figure 30. Voltage Noise Density vs. Frequency Rev. L | Page 12 of 24 Data Sheet AD8605/AD8606/AD8608 1k OUTPUT SATURATION VOLTAGE (mV) 1400 1200 1000 800 600 02731-031 400 200 0 -300 0 100 -100 OFFSET VOLTAGE (V) -200 200 VS = 2.7V TA = 25C 100 SOURCE 10 SINK 1 0.1 0.001 300 2.680 300 VS = 2.7V TA = 25C VS = 2.7V 2.675 OUTPUT VOLTAGE (V) 200 100 0 -100 2.670 2.665 VOH @ 1mA LOAD 2.660 2.655 02731-032 -200 -300 0 0 0.9 2.650 -40 2.7 1.8 -25 -10 5 COMMON-MODE VOLTAGE (V) 50 65 80 95 110 125 0.045 VSY = 2.7V VCM = VSY/2 VS = 2.7V 0.040 0.035 OUTPUT VOLTAGE (V) 150 100 50 0 -50 -25 0 25 50 75 100 TEMPERATURE (C) 0.030 VOL @ 1mA LOAD 0.025 0.020 0.015 02731-035 0.010 AD8605 AD8606 AD8608 -100 0.005 125 02731-039 INPUT BIAS CURRENT (pA) 35 Figure 35. Output Voltage Swing High vs. Temperature 250 -150 -50 20 TEMPERATURE (C) Figure 32. Input Offset Voltage vs. Common-Mode Voltage (200 Units, 5 Wafer Lots, Including Process Skews) 200 10 1 Figure 34. Output Saturation Voltage vs. Load Current Figure 31. Input Offset Voltage Distribution INPUT OFFSET VOLTAGE (V) 0.1 LOAD CURRENT (mA) 0.01 02731-034 NUMBER OF AMPLIFIERS 1600 VS = 2.7V TA = 25C VCM = 0V TO 2.7V 02731-033 1800 Figure 33. Input Bias Current vs. Temperature 0 -40 -25 -10 5 20 35 50 65 80 95 110 TEMPERATURE (C) Figure 36. Output Voltage Swing Low vs. Temperature Rev. L | Page 13 of 24 125 AD8605/AD8606/AD8608 Data Sheet VS = 2.7V RL = 2k CL = 20pF M = 52.5 40 90 20 45 0 0 GAIN -20 -45 -40 -90 -60 -135 -80 -180 -100 10k 100k 1M FREQUENCY (Hz) 10M -225 40M 50 40 -OS 30 +OS 20 10 02731-039 135 SMALL SIGNAL OVERSHOOT (%) PHASE PHASE (Degrees) 60 VS = 2.7V TA = 25C AV = 1 180 02731-036 80 GAIN (dB) 60 225 100 0 10 100 CAPACITANCE (pF) 1k Figure 40. Small Signal Overshoot vs. Load Capacitance Figure 37. Open-Loop Gain and Phase vs. Frequency VS = 2.7V VOLTAGE NOISE (1V/DIV) 3.0 OUTPUT SWING (V p-p) 2.5 VS = 2.7V VIN = 2.6V p-p TA = 25C RL = 2k AV = 1 2.0 1.5 02731-040 1.0 02731-037 0.5 0 1k 10k 100k FREQUENCY (Hz) 1M TIME (1s/DIV) 10M Figure 41. 0.1 Hz to 10 Hz Input Voltage Noise Figure 38. Closed-Loop Output Voltage Swing vs. Frequency (FPBW) VS = 1.35V RL = 10k CL = 200pF AV = 1 100 VOLTAGE (50mV/DIV) VS = 2.7V 90 70 AV = 100 60 50 AV = 10 40 30 02731-041 AV = 1 20 02731-038 OUTPUT IMPEDANCE () 80 10 0 1k 10k 100k 1M FREQUENCY (Hz) 10M TIME (200ns/DIV) 100M Figure 42. Small Signal Transient Response Figure 39. Output Impedance vs. Frequency Rev. L | Page 14 of 24 Data Sheet AD8605/AD8606/AD8608 02731-042 VOLTAGE (500mV/DIV) VS = 1.35V RL = 10k CL = 200pF AV = 1 TIME (400ns/DIV) Figure 43. Large Signal Transient Response Rev. L | Page 15 of 24 AD8605/AD8606/AD8608 Data Sheet APPLICATIONS INFORMATION OUTPUT PHASE REVERSAL VS = 2.5V VIN = 6V p-p AV = 1 RL = 10k VOLTAGE (2V/DIV) Phase reversal is defined as a change in polarity at the output of the amplifier when a voltage that exceeds the maximum input common-mode voltage drives the input. Phase reversal can cause permanent damage to the amplifier; it can also cause system lockups in feedback loops. The AD8605 does not exhibit phase reversal even for inputs exceeding the supply voltage by more than 2 V. VOUT VIN 02731-043 MAXIMUM POWER DISSIPATION Power dissipated in an IC causes the die temperature to increase, which can affect the behavior of the IC and the application circuit performance. TIME (4s/DIV) The maximum power dissipation of the amplifier is calculated according to TJ - TA JA where: TJ is the junction temperature. TA is the ambient temperature. JA is the junction-to-ambient thermal resistance. Figure 45 compares the maximum power dissipation with temperature for the various AD860x family packages. 1.8 1.7 SOIC-14 1.6 1.5 1.4 TSSOP-14 1.3 1.2 1.1 1.0 SOIC-8 0.9 0.8 0.7 0.6 MSOP-8 0.5 WLCSP-5 0.4 0.3 5-LEAD SOT-23 0.2 0.1 0 30 80 5 55 -45 -20 AMBIENT TEMPERATURE (C) 105 130 Figure 45. Maximum Power Dissipation vs. Ambient Temperature INPUT OVERVOLTAGE PROTECTION 0.1 VIN - VS 5 mA RS The remarkable low input offset current of the AD8605 (<1 pA) allows the use of larger value resistors. With a 10 k resistor at the input, the output voltage has less than 10 nV of error voltage. A 10 k resistor has less than 13 nV/Hz of thermal noise at room temperature. THD + NOISE Total harmonic distortion is the ratio of the input signal in V rms to the total harmonics in V rms throughout the spectrum. Harmonic distortion adds errors to precision measurements and adds unpleasant sonic artifacts to audio systems. The AD8605 has a low total harmonic distortion. Figure 46 shows that the AD8605 has less than 0.005% or -86 dB of THD + N over the entire audio frequency range. The AD8605 is configured in positive unity gain, which is the worst case, and with a load of 10 k. Rev. L | Page 16 of 24 VSY = 2.5V AV = 1 BW = 80kHz 0.01 0.001 02731-045 The AD8605 has internal protective circuitry. However, if the voltage applied at either input exceeds the supplies by more than 0.5 V, external resistors should be placed in series with the inputs. The resistor values can be determined by THD + NOISE (%) PDISS = POWER DISSIPATION (W) The absolute maximum junction temperature of the AD8605/ AD8606/AD8608 is 150C. Exceeding this temperature could damage or destroy the device. 02731-044 Figure 44. No Phase Reversal 0.0001 20 100 1k FREQUENCY (Hz) Figure 46. THD + Noise vs. Frequency 10k 20k Data Sheet AD8605/AD8606/AD8608 TOTAL NOISE INCLUDING SOURCE RESISTORS The low input current noise and input bias current of the AD8605 make it the ideal amplifier for circuits with substantial input source resistance, such as photodiodes. Input offset voltage increases by less than 0.5 nV per 1 k of source resistance at room temperature and increases to 10 nV at 85C. The total noise density of the circuit is A snubber network, shown in Figure 49, helps reduce the signal overshoot to a minimum and maintain stability. Although this circuit does not recover the loss of bandwidth induced by large capacitive loads, it greatly reduces the overshoot and ringing. This method does not reduce the maximum output swing of the amplifier. en, TOTAL = en2 + (in RS ) 2 + 4k TRS 0 CHANNEL SEPARATION (dB) -20 where: en is the input voltage noise density of the AD8605. in is the input current noise density of the AD8605. RS is the source resistance at the noninverting terminal. k is Boltzmann's constant (1.38 x 10-23 J/K). T is the ambient temperature in Kelvin (T = 273 + C). -40 -60 -80 -100 -120 -160 For RS < 3.9 k, en dominates and en, TOTAL en. -180 100 The current noise of the AD8605 is so low that its total density does not become a significant term unless RS is greater than 6 M. 02731-046 -140 For example, with RS = 10 k, the total voltage noise density is roughly 15 nV/Hz. 1k 10k 100k FREQUENCY (Hz) VS = 2.5V AV = 1 RL = 10k CL = 1000pF BW where BW is the bandwidth in hertz. Note that the previous analysis is valid for frequencies greater than 100 Hz and assumes relatively flat noise, above 10 kHz. For lower frequencies, flicker noise (1/f) must be considered. CHANNEL SEPARATION The AD8606 has a channel separation of greater than -160 dB up to frequencies of 1 MHz, allowing the two amplifiers to amplify ac signals independently in most applications. 02731-047 Channel separation, or inverse crosstalk, is a measure of the signal feed from one amplifier (channel) to another on the same IC. TIME (10s/DIV) Figure 48. AD8606 Capacitive Load Drive Without Snubber CAPACITIVE LOAD DRIVE V+ The AD860x can drive large capacitive loads without oscillation. Figure 48 shows the output of the AD8606 in response to a 200 mV input signal. In this case, the amplifier is configured in positive unity gain, worst case for stability, while driving a 1000 pF load at its output. Driving larger capacitive loads in unity gain can require the use of additional circuitry. 4 2 200mV VIN 3 AD8605 1 RS 8 CS V- Figure 49. Snubber Network Configuration Rev. L | Page 17 of 24 RL CL 02731-049 ) 100M VOLTAGE (100mV/DIV) ( 10M Figure 47. Channel Separation vs. Frequency The total equivalent rms noise over a specific bandwidth is expressed as En = en, TOTAL 1M AD8605/AD8606/AD8608 Data Sheet Figure 50 shows a scope of the output at the snubber circuit. The overshoot is reduced from over 70% to less than 5%, and the ringing is eliminated by the snubber. Optimum values for RS and CS are determined experimentally. 4500 INPUT BIAS CURRENT (pA) 4000 VOLTAGE (100mV/DIV) VS = 2.5V AV = 1 RL = 10k RS = 90 CL = 1000pF CS = 700pF 3500 3mW/cm2 3000 2500 2mW/cm2 2000 1500 1mW/cm2 500 0 350 550 650 WAVELENGTH (nm) 750 850 02731-048 Figure 51. AD8605ACB Input Bias Current Response to Direct Illumination of Varying Intensity and Wavelength Figure 50. Capacitive Load Drive with Snubber Table 5 summarizes a few optimum values for capacitive loads. Table 5. RS () 100 70 60 450 02731-050 1000 TIME (10s/DIV) CL (pF) 500 1000 2000 5000 CS (pF) 1000 1000 800 An alternate technique is to insert a series resistor inside the feedback loop at the output of the amplifier. Typically, the value of this resistor is approximately 100 . This method also reduces overshoot and ringing but causes a reduction in the maximum output swing. LIGHT SENSITIVITY The AD8605ACB (WLCSP package option) is essentially a silicon die with additional postfabrication dielectric and intermetallic processing designed to contact solder bumps on the active side of the chip. With this package type, the die is exposed to ambient light and is subject to photoelectric effects. Light sensitivity analysis of the AD8605ACB mounted on standard PCB material reveals that only the input bias current (IB) parameter is impacted when the package is illuminated directly by high intensity light. No degradation in electrical performance is observed due to illumination by low intensity (0.1 mW/cm2) ambient light. Figure 51 shows that IB increases with increasing wavelength and intensity of incident light; IB can reach levels as high as 4500 pA at a light intensity of 3 mW/cm2 and a wavelength of 850 nm. The light intensities shown in Figure 51 are not normal for most applications, that is, even though direct sunlight can have intensities of 50 mW/cm2, office ambient light can be as low as 0.1 mW/cm2. When the WLCSP package is assembled on the board with the bump side of the die facing the PCB, reflected light from the PCB surface is incident on active silicon circuit areas and results in the increased IB. No performance degradation occurs due to illumination of the backside (substrate) of the AD8605ACB. The AD8605ACB is particularly sensitive to incident light with wavelengths in the near infrared range (NIR, 700 nm to 1000 nm). Photons in this waveband have a longer wavelength and lower energy than photons in the visible (400 nm to 700 nm) and near ultraviolet (NUV, 200 nm to 400 nm) bands; therefore, they can penetrate more deeply into the active silicon. Incident light with wavelengths greater than 1100 nm has no photoelectric effect on the AD8605ACB because silicon is transparent to wavelengths in this range. The spectral content of conventional light sources varies. Sunlight has a broad spectral range, with peak intensity in the visible band that falls off in the NUV and NIR bands; fluorescent lamps have significant peaks in the visible but not the NUV or NIR bands. Efforts have been made at a product level to reduce the effect of ambient light; the under bump metal (UBM) has been designed to shield the sensitive circuit areas on the active side (bump side) of the die. However, if an application encounters any light sensitivity with the AD8605ACB, shielding the bump side of the WLCSP package with opaque material should eliminate this effect. Shielding can be accomplished using materials such as silica-filled liquid epoxies that are used in flip-chip underfill techniques. WLCSP ASSEMBLY CONSIDERATIONS For detailed information on the WLCSP PCB assembly and reliability, see Application Note AN-617, MicroCSPTM Wafer Level Chip Scale Package. Rev. L | Page 18 of 24 Data Sheet AD8605/AD8606/AD8608 I-V CONVERSION APPLICATIONS PHOTODIODE PREAMPLIFIER APPLICATIONS At room temperature, the AD8605 has an input bias current of 0.2 pA and an offset voltage of 100 V. Typical values of RD are in the range of 1 G. The low offset voltage and input current of the AD8605 make it an excellent choice for photodiode applications. In addition, the low voltage and current noise make the amplifier ideal for application circuits with high sensitivity. For the circuit shown in Figure 52, the output error voltage is approximately 100 V at room temperature, increasing to about 1 mV at 85C. CF 10pF The maximum achievable signal bandwidth is RF 10M ID CD 50pF where ft is the unity gain frequency of the amplifier. AUDIO AND PDA APPLICATIONS AD8605 VOUT The low distortion and wide dynamic range of the AD860x make it a great choice for audio and PDA applications, including microphone amplification and line output buffering. 02731-051 RD VOS Figure 52. Equivalent Circuit for Photodiode Preamp Figure 53 shows a typical application circuit for headphone/ line-out amplification. The input bias current of the amplifier contributes an error term that is proportional to the value of RF. R1 and R2 are used to bias the input voltage at half the supply, which maximizes the signal bandwidth range. C1 and C2 are used to ac couple the input signal. C1, R1, and R2 form a highpass filter whose corner frequency is 1/[2(R1||R2)C1]. The offset voltage causes a dark current induced by the shunt resistance of the Diode RD. These error terms are combined at the output of the amplifier. The error voltage is written as R E O = VOS 1 + F RD ft 2R F C F + RF I B The high output current of the AD8606 allows it to drive heavy resistive loads. The circuit in Figure 53 is tested to drive a 16 headphone. The THD + N is maintained at approximately -60 dB throughout the audio range. Typically, RF is smaller than RD, thus RF/RD can be ignored. 5V C1 1F R1 20k R2 V1 20k 500mV 8 3 1/2 AD8606 C3 100F R4 20 1 R3 HEADPHONES 1k 2 4 5V C2 1F R7 20k R8 V2 500mV 20k 8 5 1/2 AD8606 C4 100F R6 20 7 6 4 R5 1k Figure 53. Single-Supply Headphone/Speaker Amplifier Rev. L | Page 19 of 24 02731-052 PHOTODIODE f MAX = AD8605/AD8606/AD8608 Data Sheet INSTRUMENTATION AMPLIFIERS R VREF R R CF Difference amplifiers are widely used in high accuracy circuits to improve the common-mode rejection ratio. Figure 54 shows a simple difference amplifier. Figure 55 shows the commonmode rejection for a unity gain configuration and for a gain of 10. RF R2 R2 R2 V+ VOS AD8605 Making (R4/R3) = (R2/R1) and choosing 0.01% tolerance yields a CMRR of 74 dB and minimizes the gain error at the output. R2 10k V- Figure 56. Simplified Circuit of the DAC8143 with AD8605 Output Buffer 5V To optimize the performance of the DAC, insert a capacitor in the feedback loop of the AD8605 to compensate the amplifier for the pole introduced by the output capacitance of the DAC. Typical values for CF range from 10 pF to 30 pF; it can be adjusted for the best frequency response. The total error at the output of the op amp can be computed by R4 R2 = R3 R1 R2 (V2 - V1) R1 AD8605 R4 10k R3 1k V2 VOUT 02731-053 VOUT = R E O = VOS 1 + F Req Figure 54. Difference Amplifier, AV = 10 120 where Req is the equivalent resistance seen at the output of the DAC. As previously mentioned, Req is code dependent and varies with the input. A typical value for Req is 15 k. Choosing a feedback resistor of 10 k yields an error of less than 200 V. VSY = 2.5V AV = 10 100 AV = 1 CMRR (dB) 80 60 Figure 57 shows the implementation of a dual-stage buffer at the output of a DAC. The first stage is used as a buffer. Capacitor C1 with Req creates a low-pass filter, and thus, provides phase lead to compensate for frequency response. The second stage of the AD8606 is used to provide voltage gain at the output of the buffer. 40 02731-054 20 0 100 1k 10k 100k FREQUENCY (Hz) 1M Grounding the positive input terminals in both stages reduces errors due to the common-mode output voltage. Choosing R1, R2, and R3 to match within 0.01% yields a CMRR of 74 dB and maintains minimum gain error in the circuit. 10M Figure 55. Difference Amplifier CMRR vs. Frequency DAC CONVERSION The low input bias current and offset voltage of the AD8605 make it an excellent choice for buffering the output of a current output DAC. 15V Figure 56 shows a typical implementation of the AD8605 at the output of a 12-bit DAC. VDD The DAC8143 output current is converted to a voltage by the feedback resistor. The equivalent resistance at the output of the DAC varies with the input code, as does the output capacitance. RCS R3 20k R2 10k C1 33pF VIN RP VREF RFB AD7545 AGND DB11 R1 10k OUT1 1/2 AD8606 R4 5k Figure 57. Bipolar Operation Rev. L | Page 20 of 24 VOUT 1/2 AD8606 02731-056 R1 1k V1 02731-055 The low offset voltage and low noise of the AD8605 make it an ideal amplifier for instrumentation applications. Data Sheet AD8605/AD8606/AD8608 OUTLINE DIMENSIONS 0.50 REF 0.37 0.36 0.35 SEATING PLANE 2 1 0.87 BALL 1 IDENTIFIER A 0.23 0.18 0.14 1.33 1.29 1.25 0.50 0.21 0.17 0.14 0.12 TOP VIEW (BALL SIDE DOWN) B C 0.20 0.50 BOTTOM VIEW 101607-A 0.94 0.90 0.86 (BALL SIDE UP) Figure 58. 5-Ball Wafer Level Chip Scale Package [WLCSP] (CB-5-1) Dimensions shown in millimeters 3.00 2.90 2.80 1.70 1.60 1.50 5 1 4 2 3.00 2.80 2.60 3 0.95 BSC 1.90 BSC 1.45 MAX 0.95 MIN 0.15 MAX 0.05 MIN 0.50 MAX 0.35 MIN 0.20 MAX 0.08 MIN SEATING PLANE 10 5 0 0.60 BSC COMPLIANT TO JEDEC STANDARDS MO-178-AA Figure 59. 5-Lead Small Outline Transistor Package [SOT-23] (RJ-5) Dimensions shown in millimeters Rev. L | Page 21 of 24 0.55 0.45 0.35 11-01-2010-A 1.30 1.15 0.90 AD8605/AD8606/AD8608 Data Sheet 3.20 3.00 2.80 8 3.20 3.00 2.80 5.15 4.90 4.65 5 1 4 PIN 1 IDENTIFIER 0.65 BSC 0.95 0.85 0.75 15 MAX 1.10 MAX 0.80 0.55 0.40 0.23 0.09 6 0 0.40 0.25 10-07-2009-B 0.15 0.05 COPLANARITY 0.10 COMPLIANT TO JEDEC STANDARDS MO-187-AA Figure 60. 8-Lead Mini Small Outline Package [MSOP] (RM-8) Dimensions shown in millimeters 5.00 (0.1968) 4.80 (0.1890) 8 4.00 (0.1574) 3.80 (0.1497) 5 1 6.20 (0.2441) 5.80 (0.2284) 4 1.27 (0.0500) BSC 0.25 (0.0098) 0.10 (0.0040) 0.51 (0.0201) 0.31 (0.0122) COPLANARITY 0.10 SEATING PLANE 0.50 (0.0196) 0.25 (0.0099) 1.75 (0.0688) 1.35 (0.0532) 45 8 0 0.25 (0.0098) 0.17 (0.0067) 1.27 (0.0500) 0.40 (0.0157) 012407-A COMPLIANT TO JEDEC STANDARDS MS-012-AA CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. Figure 61. 8-Lead Standard Small Outline Package [SOIC_N] Narrow Body (R-8) Dimensions shown in millimeters and (inches) 0.675 0.595 0.515 BALL 1 IDENTIFIER SEATING PLANE 3 2 1 A 0.340 0.320 0.300 1.825 1.775 1.725 B C 0.50 BALL PITCH TOP VIEW (BALL SIDE DOWN) 0.380 0.355 0.330 BOTTOM VIEW 0.27 0.24 0.21 (BALL SIDE UP) Figure 62. 8-Ball Wafer Level Chip Scale Package [WLCSP] (CB-8-1) Dimensions shown in millimeters Rev. L | Page 22 of 24 090706-B 1.480 1.430 1.380 Data Sheet AD8605/AD8606/AD8608 8.75 (0.3445) 8.55 (0.3366) 4.00 (0.1575) 3.80 (0.1496) 8 14 1 7 6.20 (0.2441) 5.80 (0.2283) 1.27 (0.0500) BSC 0.25 (0.0098) 0.10 (0.0039) COPLANARITY 0.10 0.50 (0.0197) 0.25 (0.0098) 1.75 (0.0689) 1.35 (0.0531) SEATING PLANE 0.51 (0.0201) 0.31 (0.0122) 45 8 0 0.25 (0.0098) 0.17 (0.0067) 1.27 (0.0500) 0.40 (0.0157) 060606-A COMPLIANT TO JEDEC STANDARDS MS-012-AB CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. Figure 63. 14-Lead Standard Small Outline Package [SOIC_N] Narrow Body (R-14) Dimensions shown in millimeters and (inches) 5.10 5.00 4.90 14 8 4.50 4.40 4.30 6.40 BSC 1 7 PIN 1 0.65 BSC 1.20 MAX 0.15 0.05 COPLANARITY 0.10 0.30 0.19 0.20 0.09 SEATING PLANE 8 0 COMPLIANT TO JEDEC STANDARDS MO-153-AB-1 Figure 64. 14-Lead Thin Shrink Small Outline Package [TSSOP] (RU-14) Dimensions shown in millimeters Rev. L | Page 23 of 24 0.75 0.60 0.45 061908-A 1.05 1.00 0.80 AD8605/AD8606/AD8608 Data Sheet ORDERING GUIDE Model 1 AD8605ACBZ-REEL AD8605ACBZ-REEL7 AD8605ART-REEL AD8605ARTZ-R2 AD8605ARTZ-REEL AD8605ARTZ-REEL7 AD8606ARM-REEL AD8606ARMZ-R7 AD8606ARMZ-REEL AD8606AR AD8606AR-REEL AD8606AR-REEL7 AD8606ARZ AD8606ARZ-REEL AD8606ARZ-REEL7 AD8606ACBZ-REEL AD8606ACBZ-REEL7 AD8608ARZ AD8608ARZ-REEL AD8608ARZ-REEL7 AD8608ARUZ AD8608ARUZ-REEL 1 Temperature Range -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C Package Description 5-Ball WLCSP 5-Ball WLCSP 5-Lead SOT-23 5-Lead SOT-23 5-Lead SOT-23 5-Lead SOT-23 8-Lead MSOP 8-Lead MSOP 8-Lead MSOP 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_N 8-Ball WLCSP 8-Ball WLCSP 14-Lead SOIC_N 14-Lead SOIC_N 14-Lead SOIC_N 14-Lead TSSOP 14-Lead TSSOP Z = RoHS Compliant Part, # denotes RoHS compliant product (except for CB-5-1) may be top or bottom marked. (c)2002-2012 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D02731-0-2/12(L) Rev. L | Page 24 of 24 Package Option CB-5-1 CB-5-1 RJ-5 RJ-5 RJ-5 RJ-5 RM-8 RM-8 RM-8 R-8 R-8 R-8 R-8 R-8 R-8 CB-8-1 CB-8-1 R-14 R-14 R-14 RU-14 RU-14 Branding A1J A1J B3A B3A# B3A# B3A# B6A B6A# B6A# B6A# B6A#