LTC6404
1
6404f
TYPICAL APPLICATION
FEATURES
APPLICATIONS
DESCRIPTION
600MHz, Low Noise,
High Precision Fully Differential
Input/Output Amplifi er/Driver
Single-Ended Input to Differential Output
with Common Mode Level Shifting
n Fully Differential Input and Output
n Low Noise: 1.5nV/√Hz RTI
n Very Low Distortion:
LTC6404-1 (2VP-P
, 10MHz): –91dBc
LTC6404-2 (2VP-P
, 10MHz): –96dBc
LTC6404-4 (2VP-P
, 10MHz): –101dBc
n Closed-Loop –3dB Bandwidth: 600MHz
n Slew Rate: 1200V/μs (LTC6404-4)
n Adjustable Output Common Mode Voltage
n Rail-to-Rail Output Swing
n Input Range Extends to Ground
n Large Output Current: 85mA (Typ)
n DC Voltage Offset < 2mV (Max)
n Low Power Shutdown
n Tiny 3mm × 3mm × 0.75mm 16-Pin QFN Package
n Differential Input A/D Converter Driver
n Single-Ended to Differential Conversion/Amplifi cation
n Common Mode Level Translation
n Low Voltage, Low Noise, Signal Processing
The LTC
®
6404 is a family of AC precision, very low noise,
low distortion, fully differential input/output amplifi ers
optimized for 3V, single supply operation.
The LTC6404-1 is unity-gain stable. The LTC6404-2 is
designed for closed-loop gains greater than or equal to
2V/V. The LTC6404-4 is designed for closed-loop gains
greater than or equal to 4V/V. The LTC6404 closed-loop
bandwidth extends from DC to 600MHz. In addition to the
normal unfi ltered outputs (OUT+ and OUT–), the LTC6404
has a built-in 88.5MHz differential single-pole lowpass
fi lter and an additional pair of fi ltered outputs (OUTF+,
OUTF–). An input referred voltage noise of 1.5nV/√Hz
make the LTC6404 able to drive state-of-the-art 16-/18-bit
ADCs while operating on the same supply voltage, saving
system cost and power. The LTC6404 is characterized, and
maintains its performance for supplies as low as 2.7V and
can operate on supplies up to 5.25V. It draws only 27.3mA,
and has a hardware shutdown feature which reduces cur-
rent consumption to 250µA.
The LTC6404 family is available in a compact 3mm × 3mm
16-pin leadless QFN package and operates over a –40°C
to 125°C temperature range.
L, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
–
+
402
3V
0.1µF
VOCM
1.5VDC
1.5VDC
0V
6404 TA01
VS
1VP-P
402
100
50
SIGNAL
GENERATOR
71.5
130
0.1µF
1.5VDC
1VP-P
0.5VP-P
LTC6404-4 Distortion vs Frequency
FREQUENCY (MHz)
0.1
–100
HD2, HD3 (dBc)
–90
–80
–70
–60
1 10 100
64044 G16
–110
–120
–130
–50
–40 VCM = VOCM = MID-SUPPLY
VS = 3V
VOUT = 2VP-P
RI = 100, RF = 402
DIFFERENTIAL INPUT
SINGLE-ENDED INPUT
HD2
HD2
HD3 HD3
LTC6404
2
6404f
ABSOLUTE MAXIMUM RATINGS
Total Supply Voltage (V+ to V–) ................................5.5V
Input Voltage:
IN+, IN–, VOCM, SHDN (Note 2) ...................... V+ to V–
Input Current:
IN+, IN–, VOCM, SHDN (Note 2) ........................±10mA
Output Short-Circuit Duration (Note 3) ............ Indefi nite
Output Current (Continuous):
(OUTF+, OUTF–) DC + ACRMS ...........................±40mA
Operating Temperature Range (Note 4).. –40°C to 125°C
Specifi ed Temperature Range (Note 5) .. –40°C to 125°C
Junction Temperature ........................................... 150°C
Storage Temperature Range ................... –65°C to 150°C
(Note 1)
16
17
15 14 13
5 6 7 8
TOP VIEW
UD PACKAGE
16-LEAD (3mm s 3mm) PLASTIC QFN
9
10
11
12
4
3
2
1SHDN
V+
V–
VOCM
V–
V+
V+
V–
NC
IN+
OUT–
OUTF–
NC
IN–
OUT+
OUTF+
TJMAX = 150°C, θJA = 68°C/W, θJC = 4.2°C/W
EXPOSED PAD (PIN 17) IS V–, MUST BE SOLDERED TO PCB
ORDER INFORMATION
PIN CONFIGURATION
LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION SPECIFIED TEMPERATURE RANGE
LTC6404CUD-1#PBF LTC6404CUD-1#TRPBF LCLW 16-Lead (3mm × 3mm) Plastic QFN 0°C to 70°C
LTC6404IUD-1#PBF LTC6404IUD-1#TRPBF LCLW 16-Lead (3mm × 3mm) Plastic QFN –40°C to 85°C
LTC6404HUD-1#PBF LTC6404HUD-1#TRPBF LCLW 16-Lead (3mm × 3mm) Plastic QFN –40°C to 125°C
LTC6404CUD-2#PBF LTC6404CUD-2#TRPBF LCLX 16-Lead (3mm × 3mm) Plastic QFN 0°C to 70°C
LTC6404IUD-2#PBF LTC6404IUD-2#TRPBF LCLX 16-Lead (3mm × 3mm) Plastic QFN –40°C to 85°C
LTC6404HUD-2#PBF LTC6404HUD-2#TRPBF LCLX 16-Lead (3mm × 3mm) Plastic QFN –40°C to 125°C
LTC6404CUD-4#PBF LTC6404CUD-4#TRPBF LCLY 16-Lead (3mm × 3mm) Plastic QFN 0°C to 70°C
LTC6404IUD-4#PBF LTC6404IUD-4#TRPBF LCLY 16-Lead (3mm × 3mm) Plastic QFN –40°C to 85°C
LTC6404HUD-4#PBF LTC6404HUD-4#TRPBF LCLY 16-Lead (3mm × 3mm) Plastic QFN –40°C to 125°C
Consult LTC Marketing for parts specifi ed with wider operating temperature ranges. *The temperature grade is identifi ed by a label on the shipping container.
Consult LTC Marketing for information on non-standard lead based fi nish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifi cations, go to: http://www.linear.com/tapeandreel/
LTC6404
3
6404f
The l denotes the specifi cations which apply over
the full operating temperature range, otherwise specifi cations are at TA = 25°C. V+ = 3V, V– = 0V, VCM = VOCM = VICM = Mid-Supply,
VSHDN = OPEN, RL = OPEN, RBAL = 100k (See Figure 1). For the LTC6404-1: RI = 100Ω, RF = 100Ω. For the LTC6404-2: RI = 100Ω,
RF = 200Ω. For the LTC6404-4: RI = 100Ω, RF = 402Ω, unless otherwise noted. VS is defi ned (V+ – V–). VOUTCM = (VOUT+ + VOUT–)/2.
VICM is defi ned (VIN+ + VIN–)/2. VOUTDIFF is defi ned (VOUT+ – VOUT–). VINDIFF = (VINP – VINM)
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
VOSDIFF Differential Offset Voltage (Input Referred) VS = 2.7V to 5.25V l±0.5 ±2 mV
ΔVOSDIFF/ΔTDifferential Offset Voltage Drift (Input Referred) VS = 2.7V to 5.25V 1 µV/°C
IBInput Bias Current (Note 6) VS = 2.7V to 5.25V l–60 –23 0 µA
ΔIB/ΔTInput Bias Current Drift (Note 6) VS = 2.7V to 5.25V 0.01 µA/°C
IOS Input Offset Current (Note 6) VS = 2.7V to 5.25V l±1 ±10 µA
RIN Input Resistance Common Mode
Differential Mode 1000
3k
k
CIN Input Capacitance 1pF
enDifferential Input Referred Noise Voltage Density f = 1MHz 1.5 nV/√Hz
inInput Noise Current Density f = 1MHz 3 pA/√Hz
enVOCM Input Referred Common Mode Noise Voltage
Density f = 1MHz, Referred to VOCM Pin
LTC6404-1
LTC6404-2
LTC6404-4
9
10.5
27
nV/√Hz
nV/√Hz
nV/√Hz
VICMR
(Note 7) Input Signal Common Mode Range VS = 3V
VS = 5V
l
l
0
01.6
3.6 V
V
CMRRI
(Note 8) Input Common Mode Rejection Ratio
(Input Referred) ΔVICM/ΔVOSDIFF
VS = 3V, ΔVCM = 0.75V
VS = 5V, ΔVCM = 1.25V
60
60 dB
dB
CMRRIO
(Note 8) Output Common Mode Rejection Ratio
(Input Referred) ΔVOCM/ΔVOSDIFF
VS = 5V, ΔVOCM = 1V 66 dB
PSRR
(Note 9) Differential Power Supply Rejection
(ΔVS/ΔVOSDIFF)VS = 2.7V to 5.25V l60 94 dB
PSRRCM
(Note 9) Output Common Mode Power Supply Rejection
(ΔVS/ΔVOSCM)VS = 2.7V to 5.25V
LTC6404-1
LTC6404-2
LTC6404-4
l
l
l
50
50
40
63
63
51
dB
dB
dB
GCM Common Mode Gain (ΔVOUTCM/ΔVOCM)V
S = 5V, ΔVOCM = 1V
LTC6404-1
LTC6404-2
LTC6404-4
l
l
l
1
1
0.99
V/V
V/V
V/V
Common Mode Gain Error VS = 5V, ΔVOCM = 1V
LTC6404-1
LTC6404-2
LTC6404-4
l
l
l
–0.6
–0.6
–1.6
–0.125
–0.25
–1
0.1
0.1
–0.4
%
%
%
BAL Output Balance (ΔVOUTCM/ΔVOUTDIFF)ΔVOUTDIFF = 2V, Single-Ended Input
LTC6404-1
LTC6404-2
LTC6404-4
l
l
l
–60
–60
–53
–40
–40
–40
dB
dB
dB
ΔVOUTDIFF = 2V, Differential Input
LTC6404-1
LTC6404-2
LTC6404-4
l
l
l
–66
–66
–66
–40
–40
–40
dB
dB
dB
VOSCM Common Mode Offset Voltage (VOUTCM – VOCM)V
S = 2.7V to 5.25V
LTC6404-1
LTC6404-2
LTC6404-4
l
l
l
±10
±20
±40
±25
±50
±100
mV
mV
mV
LTC6404 DC ELECTRICAL CHARACTERISTICS
LTC6404
4
6404f
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
ΔVOSCM/ΔTCommon Mode Offset Voltage Drift VS = 2.7V to 5.25V
LTC6404-1
LTC6404-2
LTC6404-4
±10
±20
±20
µV/°C
µV/°C
µV/°C
VOUTCMR
(Note 7) Output Signal Common Mode Range
(Voltage Range for the VOCM Pin) VS = 3V
LTC6404-1
LTC6404-2
LTC6404-4
l
l
l
1.1
1.1
1.1
2
2
1.7
V
V
V
VS = 5V
LTC6404-1
LTC6404-2
LTC6404-4
l
l
l
1.1
1.1
1.1
4
4
3.7
V
V
V
RINVOCM Input Resistance, VOCM Pin LTC6404-1
LTC6404-2
LTC6404-4
l
l
l
15
8
4
23.5
14
7
32
20
10
k
k
k
VMID Voltage at the VOCM Pin VS = 3V l1.45 1.5 1.55 V
VOUT Output Voltage High, Either Output Pin (Note 10) VS = 3V, IL = 0mA
VS = 3V, IL = 5mA
VS = 3V, IL = 20mA
l
l
l
325
360
480
550
600
750
mV
mV
mV
VS = 5V, IL = 0mA
VS = 5V, IL = 5mA
VS = 5V, IL = 20mA
l
l
l
460
500
650
700
750
1000
mV
mV
mV
Output Voltage Low, Either Output Pin (Note 10) VS = 3V, IL = 0mA
VS = 3V, IL = –5mA
VS = 3V, IL = –20mA
l
l
l
120
140
200
230
260
350
mV
mV
mV
VS = 5V, IL = 0mA
VS = 5V, IL = –5mA
VS = 5V, IL = –20mA
l
l
l
175
200
285
320
350
550
mV
mV
mV
ISC Output Short-Circuit Current, Either Output Pin
(Note 11) VS = 2.7V
VS = 3V
VS = 5V
l
l
l
±35
±40
±55
±60
±65
±85
mA
mA
mA
AVOL Large-Signal Voltage Gain VS = 3V 90 dB
VSSupply Voltage Range l2.7 5.25 V
ISSupply Current (LTC6404-1) VS = 2.7V, VSHDN = VS – 0.6V
VS = 3V, VSHDN = VS – 0.6V
VS = 5V, VSHDN = VS – 0.6V
l
l
l
27.2
27.3
27.8
35.5
35.5
36.5
mA
mA
mA
Supply Current (LTC6404-2) VS = 2.7V, VSHDN = VS – 0.6V
VS = 3V, VSHDN = VS – 0.6V
VS = 5V, VSHDN = VS – 0.6V
l
l
l
29.7
29.8
30.4
38.5
38.5
39.5
mA
mA
mA
Supply Current (LTC6404-4) VS = 2.7V, VSHDN = VS – 0.6V
VS = 3V, VSHDN = VS – 0.6V
VS = 5V, VSHDN = VS – 0.6V
l
l
l
30.0
30.2
31.0
39
39
40
mA
mA
mA
ISHDN Supply Current in Shutdown (LTC6404-1) VS = 2.7V, VSHDN = VS – 2.1V
VS = 3V, VSHDN = VS – 2.1V
VS = 5V, VSHDN = VS – 2.1V
l
l
l
0.22
0.25
0.35
1
1
2
mA
mA
mA
Supply Current in Shutdown (LTC6404-2) VS = 2.7V, VSHDN = VS – 2.1V
VS = 3V, VSHDN = VS – 2.1V
VS = 5V, VSHDN = VS – 2.1V
l
l
l
0.22
0.25
0.35
1
1
2
mA
mA
mA
Supply Current in Shutdown (LTC6404-4) VS = 2.7V, VSHDN = VS – 2.1V
VS = 3V, VSHDN = VS – 2.1V
VS = 5V, VSHDN = VS – 2.1V
l
l
l
0.28
0.30
0.50
1.2
1.2
2.4
mA
mA
mA
The l denotes the specifi cations which apply over
the full operating temperature range, otherwise specifi cations are at TA = 25°C. V+ = 3V, V– = 0V, VCM = VOCM = VICM = Mid-Supply,
VSHDN = OPEN, RL = OPEN, RBAL = 100k (See Figure 1). For the LTC6404-1: RI = 100Ω, RF = 100Ω. For the LTC6404-2: RI = 100Ω,
RF = 200Ω. For the LTC6404-4: RI = 100Ω, RF = 402Ω, unless otherwise noted. VS is defi ned (V+ – V–). VOUTCM = (VOUT+ + VOUT–)/2.
VICM is defi ned (VIN+ + VIN–)/2. VOUTDIFF is defi ned (VOUT+ – VOUT–). VINDIFF = (VINP – VINM)
LTC6404 DC ELECTRICAL CHARACTERISTICS
LTC6404
5
6404f
The l denotes the specifi cations which apply
over the full operating temperature range, otherwise specifi cations are at TA = 25°C. V+ = 3V, V– = 0V, VCM = VOCM = VICM = Mid-Supply,
VSHDN = OPEN, RI = 100Ω, RF = 100Ω, RL = 200Ω (See Figure 2) unless otherwise noted. VS is defi ned (V+ – V–).
VOUTCM = (VOUT+ + VOUT–)/2. VICM is defi ned as (VIN+ + VIN–)/2. VOUTDIFF is defi ned as (VOUT+ – VOUT–). VINDIFF = (VINP – VINM).
LTC6404-1 AC ELECTRICAL CHARACTERISTICS
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
SR Slew Rate VS = 3V to 5V 450 V/µs
GBW Gain-Bandwidth Product VS = 3V to 5V, RI = 100, RF = 499,
fTEST = 500MHz 500 MHz
f3dB –3dB Frequency (See Figure 2) VS = 3V to 5V l300 600 MHz
HDSEIN 10MHz Distortion VS = 3V, VOUTDIFF = 2VP-P
Single-Ended Input
2nd Harmonic
3rd Harmonic –88
–91 dBc
dBc
HDDIFFIN 10MHz Distortion VS = 3V, VOUTDIFF = 2VP-P
Differential Input
2nd Harmonic
3rd Harmonic –102
–91 dBc
dBc
IMD10M Third-Order IMD at 10MHz
f1 = 9.5MHz, f2 = 10.5MHz VS = 3V, VOUTDIFF = 2VP-P –93 dBc
OIP310M OIP3 at 10MHz (Note 12) 50 dBm
tSSettling Time
2V Step at Output 1% Settling
0.1% Settling
0.01% Settling
10
13
17
ns
ns
ns
NF Noise Figure, RS = 50Ωf = 10MHz 13.4 dB
f3dBFILTER Differential Filter 3dB Bandwidth (Note 13) 88.5 MHz
The l denotes the specifi cations which apply over
the full operating temperature range, otherwise specifi cations are at TA = 25°C. V+ = 3V, V– = 0V, VCM = VOCM = VICM = Mid-Supply,
VSHDN = OPEN, RL = OPEN, RBAL = 100k (See Figure 1). For the LTC6404-1: RI = 100Ω, RF = 100Ω. For the LTC6404-2: RI = 100Ω,
RF = 200Ω. For the LTC6404-4: RI = 100Ω, RF = 402Ω, unless otherwise noted. VS is defi ned (V+ – V–). VOUTCM = (VOUT+ + VOUT–)/2.
VICM is defi ned (VIN+ + VIN–)/2. VOUTDIFF is defi ned (VOUT+ – VOUT–). VINDIFF = (VINP – VINM)
LTC6404 DC ELECTRICAL CHARACTERISTICS
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
VIL SHDN Input Logic Low VS = 2.7V to 5V lV+ – 2.1 V
VIH SHDN Input Logic High VS = 2.7V to 5V lV+ – 0.6 V
RSHDN SHDN Pin Input Impedance VS = 5V, VSHDN = 2.9V to 0V l38 66 94 k
tON Turn-On Time VS = 3V, VSHDN = 0.5V to 3V 750 ns
tOFF Turn-Off Time VS = 3V, VSHDN = 3V to 0.5V 300 ns
LTC6404
6
6404f
The l denotes the specifi cations which apply
over the full operating temperature range, otherwise specifi cations are at TA = 25°C. V+ = 3V, V– = 0V, VCM = VOCM = VICM = Mid-Supply,
VSHDN = OPEN, RI = 100Ω, RF = 200Ω, RL = 200Ω (See Figure 2) unless otherwise noted. VS is defi ned (V+ – V–).
VOUTCM = (VOUT+ + VOUT–)/2. VICM is defi ned as (VIN+ + VIN–)/2. VOUTDIFF is defi ned as (VOUT+ – VOUT–). VINDIFF = (VINP – VINM).
LTC6404-2 AC ELECTRICAL CHARACTERISTICS
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
SR Slew Rate VS = 3V to 5V 700 V/µs
GBW Gain-Bandwidth Product VS = 3V to 5V, RI = 100, RF = 499,
fTEST = 500MHz 900 MHz
f3dB –3dB Frequency (See Figure 2) VS = 3V to 5V l300 600 MHz
HDSEIN 10MHz Distortion VS = 3V, VOUTDIFF = 2VP-P
Single-Ended Input
2nd Harmonic
3rd Harmonic –95
–96 dBc
dBc
HDDIFFIN 10MHz Distortion VS = 3V, VOUTDIFF = 2VP-P
Differential Input
2nd Harmonic
3rd Harmonic –98
–99 dBc
dBc
IMD10M Third-Order IMD at 10MHz
f1 = 9.5MHz, f2 = 10.5MHz VS = 3V, VOUTDIFF = 2VP-P –100 dBc
OIP310M OIP3 at 10MHz (Note 12) 53 dBm
tSSettling Time
2V Step at Output 1% Settling
0.1% Settling
0.01% Settling
9
12
15
ns
ns
ns
NF Noise Figure, RS = 50 f = 10MHz 10 dB
f3dBFILTER Differential Filter 3dB Bandwidth (Note 13) 88.5 MHz
The l denotes the specifi cations which apply
over the full operating temperature range, otherwise specifi cations are at TA = 25°C. V+ = 3V, V– = 0V, VCM = VOCM = VICM = Mid-Supply,
VSHDN = OPEN, RI = 100Ω, RF = 402Ω, RL = 200Ω (See Figure 2) unless otherwise noted. VS is defi ned (V+ – V–).
VOUTCM = (VOUT+ + VOUT–)/2. VICM is defi ned as (VIN+ + VIN–)/2. VOUTDIFF is defi ned as (VOUT+ – VOUT–). VINDIFF = (VINP – VINM).
LTC6404-4 AC ELECTRICAL CHARACTERISTICS
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
SR Slew Rate VS = 3V to 5V 1200 V/µs
GBW Gain-Bandwidth Product VS = 3V to 5V, RI = 100, RF = 499,
fTEST = 500MHz 1700 MHz
f3dB –3dB Frequency (See Figure 2) VS = 3V to 5V l300 530 MHz
HDSEIN 10MHz Distortion VS = 3V, VOUTDIFF = 2VP-P
Single-Ended Input
2nd Harmonic
3rd Harmonic –97
–98 dBc
dBc
HDDIFFIN 10MHz Distortion VS = 3V, VOUTDIFF = 2VP-P
Differential Input
2nd Harmonic
3rd Harmonic –100
–101 dBc
dBc
IMD10M Third-Order IMD at 10MHz
f1 = 9.5MHz, f2 = 10.5MHz VS = 3V, VOUTDIFF = 2VP-P –101 dBc
OIP310M OIP3 at 10MHz (Note 12) 54 dBm
tSSettling Time
2V Step at Output 1% Settling
0.1% Settling
0.01% Settling
8
11
14
ns
ns
ns
NF Noise Figure, RS = 50 f = 10MHz 8 dB
f3dBFILTER Differential Filter 3dB Bandwidth (Note 13) 88.5 MHz
LTC6404
7
6404f
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The inputs IN+, IN– are protected by a pair of back-to-back diodes.
If the differential input voltage exceeds 1.4V, the input current should be
limited to less than 10mA. Input pins (IN+, IN–, VOCM and SHDN) are also
protected by steering diodes to either supply. If the inputs should exceed
either supply voltage, the input current should be limited to less than
10mA.
Note 3: A heat sink may be required to keep the junction temperature
below the absolute maximum rating when the output is shorted
indefi nitely. Long-term application of output currents in excess of the
absolute maximum ratings may impair the life of the device.
Note 4: The LTC6404C/LTC6404I are guaranteed functional over the
operating temperature range –40°C to 85°C. The LTC6404H is guaranteed
functional over the operating temperature range –40°C to 125°C.
Note 5: The LTC6404C is guaranteed to meet specifi ed performance from
0°C to 70°C. The LTC6404C is designed, characterized, and expected
to meet specifi ed performance from –40°C to 85°C but is not tested or
QA sampled at these temperatures. The LTC6404I is guaranteed to meet
specifi ed performance from –40°C to 85°C. The LTC6404H is guaranteed
to meet specifi ed performance from –40°C to 125°C.
Note 6: Input bias current is defi ned as the average of the input currents
fl owing into Pin 6 and Pin 15 (IN– and IN+). Input offset current is defi ned
as the difference of the input currents fl owing into Pin 15 and Pin 6
(IOS = IB+ – IB–)
Note 7: Input common mode range is tested using the test circuit of
Figure 1 by measuring the differential gain with a ±1V differential output
with VICM = mid-supply, and with VICM at the input common mode range
limits listed in the Electrical Characteristics table, verifying the differential
gain has not deviated from the mid-supply common mode input case
by more than 1%, and the common mode offset (VOSCM) has not
deviated from the zero bias common mode offset by more than ±15mV
(LTC6404-1), ±20mV (LTC6404-2) or ±40mV (LTC6404-4).
The voltage range for the output common mode range is tested using the
test circuit of Figure 1 by applying a voltage on the VOCM pin and testing at
both mid-supply and at the Electrical Characteristics table limits to verify
that the the common mode offset (VOSCM) has not deviated by more than
±15mV (LTC6404-1), ±20mV (LTC6404-2) or ±40mV (LTC6404-4).
Note 8: Input CMRR is defi ned as the ratio of the change in the input
common mode voltage at the pins IN+ or IN– to the change in differential
input referred voltage offset. Output CMRR is defi ned as the ratio of the
change in the voltage at the VOCM pin to the change in differential input
referred voltage offset. These specifi cations are strongly dependent on
feedback ratio matching between the two outputs and their respective
inputs, and is diffi cult to measure actual amplifi er performance. (See “The
Effects of Resistor Pair Mismatch” in the Applications Information section
of this data sheet. For a better indicator of actual amplifi er performance
independent of feedback component matching, refer to the PSRR
specifi cation.
Note 9: Differential power supply rejection (PSRR) is defi ned as the ratio
of the change in supply voltage to the change in differential input referred
voltage offset. Common mode power supply rejection (PSRRCM) is
defi ned as the ratio of the change in supply voltage to the change in the
common mode offset, VOUTCM – VOCM.
Note 10: This parameter is pulse tested. Output swings are measured as
differences between the output and the respective power supply rail.
Note 11: This parameter is pulse tested. Extended operation with the
output shorted may cause junction temperatures to exceed the 125°C limit
and is not recommended. See Note 3 for more details.
Note 12: Since the LTC6404 is a voltage feedback amplifi er with low
output impedance, a resistive load is not required when driving an ADC.
Therefore, typical output power is very small. In order to compare the
LTC6404 with amplifi ers that require 50Ω output loads, output swing of
the LTC6404 driving an ADC is converted into an “effective” OIP3 as if the
LTC6404 were driving a 50 load.
Note 13: The capacitors used to set the fi lter pole might have up to ±15%
variation. The resistors used to set the fi lter pole might have up to ±12%
variation.
ELECTRICAL CHARACTERISTICS
LTC6404
8
6404f
LTC6404-1 TYPICAL PERFORMANCE CHARACTERISTICS
Active Supply Current vs
Temperature
Shutdown Supply Current vs
Temperature Differential Voltage Offset (Input
Referred) vs Temperature
Common Mode Voltage Offset vs
Temperature
Active Supply Current vs Supply
Voltage and Temperature
SHDN Supply Current vs Supply
Voltage and Temperature
SHDN Pin Current vs SHDN Pin
Voltage and Temperature
Supply Current vs SHDN Pin
Voltage and Temperature
Small-Signal Frequency
Response
TEMPERATURE (°C)
–75
24
ICC (mA)
25
27
28
29
–25 25 50 150
64041 G01
26
–50 0 75 100 125
30
VS = 2.7V
VCM = VOCM = MID-SUPPLY
VS = 5V
VS = 3V
TEMPERATURE (°C)
–75
0
ICC (mA)
0.1
0.3
0.4
0.5
–25 25 50 150
64041 G02
0.2
–50 0 75 100 125
VS = 2.7V
VCM = VOCM = MID-SUPPLY
VS = 5V
VS = 3V
TEMPERATURE (°C)
–75
–1.0
VOSDIFF (mV)
–0.8
–0.4
–0.2
0
1.0
0.4
–25 25 50 150
64041 G03
–0.6
0.6
0.8
0.2
–50 0 75 100 125
5 REPRESENTATIVE UNITS
VCM = VOCM = MID-SUPPLY
VS = 3V
TEMPERATURE (°C)
–75
–10
VOSCM (mV)
–8
–4
–2
0
10
4
–25 25 50 150
64041 G04
–6
6
8
2
–50 0 75 100 125
5 REPRESENTATIVE UNITS
VCM = VOCM = MID-SUPPLY
VS = 3V
VSUPPLY (V)
0
0
ICC (mA)
5
10
15
20
245
64041 G05
25
30
13
TA = 125°C
TA = 105°C
TA = 90°C
TA = 75°C
TA = 50°C
TA = 25°C
TA = –10°C
TA = –45°C
TA = –60°C
VCM = VOCM =
MID-SUPPLY
SHDN = V+
VSUPPLY (V)
0
0
ICC (mA)
0.1
0.2
0.3
245
64041 G06
0.4
0.5
13
VCM = VOCM = MID-SUPPLY
SHDN = V–
TA = 125°C
TA = 105°C
TA = 90°C
TA = 75°C
TA = 50°C
TA = 25°C
TA = –10°C
TA = –45°C
TA = –60°C
SHDN PIN VOLTAGE (V)
0
–30
SHDN PIN CURRENT (µA)
–5
–10
–15
–20
1.50.5 2.5 3.0
64041 G07
–25
0
1.0 2.0
VCM = VOCM = MID-SUPPLY
VS = 3V
TA = 125°C
TA = 105°C
TA = 90°C
TA = 75°C
TA = 50°C
TA = 25°C
TA = –10°C
TA = –45°C
TA = –60°C
SHDN PIN VOLTAGE (V)
0
ICC (mA)
1.50.5 2.5 3.0
64041 G08
1.0 2.0
VCM = VOCM = MID-SUPPLY
VS = 3V
0
5
10
15
20
25
30
TA = 125°C
TA = 105°C
TA = 90°C
TA = 75°C
TA = 50°C
TA = 25°C
TA = –10°C
TA = –45°C
TA = –60°C
FREQUENCY (MHz)
10
GAIN (dB)
100 1000
64041 G09
–20
–15
–10
–5
0
5
UNFILTERED OUTPUTS
VCM = VOCM = MID-SUPPLY
TA = 25°C
RF = RI = 100, CF IN PARALLEL WITH RF
CF = 0pF
CF = 1.8pF
VS = 3V
VS = 5V
LTC6404
9
6404f
Small-Signal Frequency Response
vs Gain Setting Resistor Values
and Supply Voltage Small-Signal Frequency
Response vs CLOAD
Small-Signal Frequency
Response vs Temperature
Small-Signal Frequency
Response vs Temperature Large-Signal Step Response Small-Signal Step Response
Distortion vs Frequency
Distortion vs Input Common Mode
Voltage
FREQUENCY (MHz)
10
GAIN (dB)
100 1000
64041 G10
–30
–20
–25
–15
–10
–5
0
5
UNFILTERED OUTPUTS
VCM = VOCM = MID-SUPPLY
TA = 25°C
VS = 3V AND VS = 5V
RF = RI = 499
RF = RI = 200
RF = RI = 100
VS = 3V
VS = 5V
FREQUENCY (MHz)
10
GAIN (dB)
100 1000
64041 G11
–20
–15
–10
–5
0
10
5
UNFILTERED OUTPUTS
VCM = VOCM = MID-SUPPLY
TA = 25°C
RF = RI = 100
VS = 3V AND VS = 5V
RLOAD = 200,
(EACH OUTPUT TO GROUND)
CLOAD = 0pF
CLOAD = 10pF
CLOAD = 5pF
FREQUENCY (MHz)
10
GAIN (dB)
100 1000
64041 G12
–20
–15
–10
–5
0
10
5
UNFILTERED OUTPUTS
VCM = VOCM = MID-SUPPLY
RF = RI = 100
VS = 3V AND VS = 5V
TA = 90°C
TA = –45°C
TA = 25°C
FREQUENCY (MHz)
10
GAIN (dB)
100 1000
64041 G13
–35
–30
–20
–25
–15
–10
–5
0
5
FILTERED
DIFFERENTIAL
OUTPUT
UNFILTERED DIFFERENTIAL
OUTPUT TA = 25°C
TA = 25°C
TA = 90°C
FILTERED OUTPUT
VCM = VOCM = MID-SUPPLY
RF = RI = 100
VS = 3V AND VS = 5V
TA = –45°C
TIME (ns)
0
–1.5
VOUTDIFF (OUT+ – OUT–) (V)
–1.0
–0.5
0
61215
64041 G14
0.5
1.0
1.5
39
VCM = VOCM = MID-SUPPLY
RF = RI = 100
VOUTDIFF
VINDIFF
TIME (ns)
0
–0.50
VOUTDIFF (OUT+ – OUT–) (V)
–0.25
0
0.25
61215
64041 G15
0.50
39
VCM = VOCM = MID-SUPPLY
RF = RI = 100
VOUTDIFF
VINDIFF
FREQUENCY (MHz)
0.1
–80
HD2, HD3 (dBc)
–60
–40
1.0 10 100
64041 G16
–100
–90
–70
–50
–110
–120
VCM = VOCM = MID-SUPPLY
VS = 3V
VOUTDIFF = 2VP-P
RF = RI = 100
DIFFERENTIAL INPUT
SINGLE-ENDED INPUT
HD2
HD2
HD3
HD3
HD2, HD3 (dBc)
64041 G17
HD2
HD2
HD3
HD3
DC COMMON MODE INPUT (AT IN+ AND IN– PINS) (V)
–110
–40
–50
–60
–70
–80
–90
–100
VS = 3V
RF = RI = 100
VIN = 2VP-P
fIN = 10MHz
DIFFERENTIAL
INPUT
SINGLE-ENDED
INPUT
0 1.50.5 2.5 3.01.0 2.0
Distortion vs Output Amplitude
HD2, HD3 (dBc)
64041 G18
HD2
HD3
VOUTDIFF (VP-P)
–110
–30
–40
–50
–60
–70
–80
–90
–100
VCM = VOCM = MID-SUPPLY
VS = 3V
TA = 25oC
CF = 0pF
RF = RI = 1007
VIN = FULLY DIFFERENTIAL INPUT
fIN = 10MHz
0315624
LTC6404-1 TYPICAL PERFORMANCE CHARACTERISTICS
LTC6404
10
6404f
Distortion vs Output Amplitude
LTC6404-1 Driving LTC2207
16-Bit ADC
LTC6404-1 Driving LTC2207
16-Bit ADC
Voltage Noise Density vs
Frequency
HD2, HD3 (dBc)
64041 G19
HD2
HD3
VOUTDIFF (VP-P)
–110
–30
–40
–50
–60
–70
–80
–90
–100
VCM = VOCM = MID-SUPPLY
VS = 3V
TA = 25°C
RF = RI = 100
VIN = SINGLE-ENDED INPUT
fIN = 10MHz
031524
(dB)
64041 G20
HD2
HD3
HD7
HD9 HD5
HD4
FREQUENCY (MHz)
–120
0
–20
–40
–60
–80
–100
VCM = VOCM = 1.7V
VS = 3.3V
RF = RI = 100
VIN = 2VP-P DIFFERENTIAL
fSAMPLE = 105Msps
10MHz, 4092 POINT FFT
FUNDAMENTAL = –1dBFS
HD2 = –98.8dBc
HD3 = –90.2dBc
03010 5020 40
FREQUENCY (MHz)
0.01
VOLTAGE NOISE DENSITY (nV/√Hz)
1 100 10000.1 10
64041 G22
1
10
100 VCM = VOCM = MID-SUPPLY
VS = 3V
TA = 25°C
RF = RI = 100
DIFFERENTIAL INPUT
REFERRED
COMMON MODE
(dB)
64041 G21
HD2 HD3
HD7
HD8
HD9
HD5
HD4
FREQUENCY (MHz)
–120
0
–20
–40
–60
–80
–100
VCM = VOCM = 1.5V
VS = 3V
RF = RI = 100
VIN = 2VP-P DIFFERENTIAL
fSAMPLE = 105Msps
10MHz, 65536 POINT FFT
FUNDAMENTAL = –1dBFS
HD2 = –90.7dBc
HD3 = –86.6dBc
03010 5020 40
LTC6404-1 Noise Figure vs
Frequency
FREQUENCY (MHz)
0
12
8
4
28
24
20
16
64041 G23
NOISE FIGURE (dB)
10 1000
100
VCM = VOCM = MID-SUPPLY
VS = 3V
TA = 25°C
SEE FIGURE 2 CIRCUIT
LTC6404-1 TYPICAL PERFORMANCE CHARACTERISTICS
LTC6404
11
6404f
LTC6404-2 TYPICAL PERFORMANCE CHARACTERISTICS
Active Supply Current vs
Temperature
Shutdown Supply Current vs
Temperature Differential Voltage Offset (Input
Referred) vs Temperature
Common Mode Voltage Offset
(Input Referred) vs Temperature
Active Supply Current vs Supply
Voltage and Temperature
SHDN Supply Current vs Supply
Voltage and Temperature
SHDN Pin Current vs SHDN Pin
Voltage and Temperature
Supply Current vs SHDN Pin
Voltage and Temperature
Small-Signal Frequency
Response
TEMPERATURE (°C)
–75
27
ICC (mA)
28
30
31
32
–25 25 50 150
64042 G01
29
–50 0 75 100 125
33
VS = 2.7V
VS = 5V
VS = 3V
VCM = VOCM = MID-SUPPLY
TEMPERATURE (°C)
–75
0
ICC (mA)
0.1
0.3
0.4
0.5
–25 25 50 150
64042 G02
0.2
–50 0 75 100 125
VS = 2.7V
VCM = VOCM = MID-SUPPLY
VS = 5V
VS = 3V
TEMPERATURE (°C)
–75
–1.0
VOSDIFF (mV)
–0.8
–0.4
–0.2
0
1.0
0.4
–25 25 50 150
64042 G03
–0.6
0.6
0.8
0.2
–50 0 75 100 125
5 REPRESENTATIVE UNITS
VCM = VOCM = MID-SUPPLY
VS = 3V
TEMPERATURE (°C)
–75
–10
VOSCM (mV)
–8
–4
–2
0
10
4
–25 25 50 150
64042 G03
–6
6
8
2
–50 0 75 100 125
5 REPRESENTATIVE UNITS
VCM = VOCM = MID-SUPPLY
VS = 3V
VSUPPLY (V)
0
ICC (mA)
15
20
25
35
64042 G05
10
5
012 4
30
35
40
TA = 125°C
TA = 105°C
TA = 90°C
TA = 75°C
TA = 50°C
TA = 25°C
TA = –10°C
TA = –45°C
TA = –60°C
VCM = VOCM = MID-SUPPLY
SHDN = V+
VSUPPLY (V)
0
0
ICC (mA)
0.1
0.2
0.3
245
64042 G06
0.4
0.5
13
VCM = VOCM = MID-SUPPLY
SHDN = V–
TA = 125°C
TA = 105°C
TA = 90°C
TA = 75°C
TA = 50°C
TA = 25°C
TA = –10°C
TA = –45°C
TA = –60°C
SHDN PIN VOLTAGE (V)
0
–30
SHDN PIN CURRENT (µA)
–5
–10
–15
–20
1.50.5 2.5 3.0
64042 G07
–25
0
1.0 2.0
VCM = VOCM = MID-SUPPLY
VS = 3V
TA = 125°C
TA = 105°C
TA = 90°C
TA = 75°C
TA = 50°C
TA = 25°C
TA = –10°C
TA = –45°C
TA = –60°C
SHDN PIN VOLTAGE (V)
0
ICC (mA)
1.50.5 2.5 3.0
64042 G08
1.0 2.0
VCM = VOCM = MID-SUPPLY
VS = 3V
0
5
10
15
20
25
30
35
TA = 125°C
TA = 105°C
TA = 90°C
TA = 75°C
TA = 50°C
TA = 25°C
TA = –10°C
TA = –45°C
TA = –60°C
FREQUENCY (MHz)
10
GAIN (dB)
100 1000
64042 G09
–20
–15
–10
–5
0
5
10
15
UNFILTERED OUTPUTS
VCM = VOCM = MID-SUPPLY
TA = 25°C
RI = 100Ω, RF = 200Ω,
CF IN PARALLEL WITH RF
CF = 0pF
CF = 1pF
VS = 3V
VS = 5V
LTC6404
12
6404f
Small-Signal Frequency Response
vs Gain Setting Resistor Values
Small-Signal Frequency
Response vs CLOAD
Small-Signal Frequency
Response vs Temperature
Small-Signal Frequency
Response vs Temperature Large-Signal Step Response Small-Signal Step Response
Distortion vs Frequency
Distortion vs Input Common Mode
Voltage Distortion vs Output Amplitude
LTC6404-2 TYPICAL PERFORMANCE CHARACTERISTICS
FREQUENCY (MHz)
10
GAIN (dB)
100 1000
64042 G10
–25
–10
–20
–5
0
5
10
15
UNFILTERED OUTPUTS
VCM = VOCM = MID-SUPPLY
TA = 25°C
VS = 3V AND VS = 5V
RI = 100Ω, RF = 200Ω
RI = 499Ω, RF = 1k
RI = 200Ω, RF = 402Ω
VS = 3V
VS = 5V
FREQUENCY (MHz)
10
GAIN (dB)
100 1000
64042 G11
–15
–10
–5
0
5
25
10
15
20
CLOAD = 0pF
CLOAD = 5pF
CLOAD = 10pF
UNFILTERED OUTPUTS
VCM = VOCM = MID-SUPPLY
TA = 25°C
RI = 100Ω, RF = 200Ω
VS = 3V AND VS = 5V
RLOAD = 200Ω,
(EACH OUTPUT TO GROUND)
FREQUENCY (MHz)
10
GAIN (dB)
100 1000
64042 G12
–15
–10
–5
0
5
15
10
UNFILTERED OUTPUTS
VCM = VOCM = MID-SUPPLY
TA = 25°C
RI = 100Ω, RF = 200Ω
VS = 3V AND VS = 5V
RLOAD = 200Ω,
(EACH OUTPUT TO GROUND)
TA = 90°C
TA = 25°C
TA = –45°C
FREQUENCY (MHz)
10
FILTERED GAIN (dB)
100 1000
64042 G13
–30
–20
–25
–10
–15
–5
0
5
10
15
TA = 25°C
TA = 90°C
VCM = VOCM = MID-SUPPLY
RI = 100Ω, RF = 200Ω
VS = 3V
TA = –45°C
UNFILTERED DIFFERENTIAL
OUTPUT
TA = 25°C
FILTERED
DIFFERENTIAL
OUTPUT
TIME (ns)
0
–1.5
VOUTDIFF (OUT+ – OUT–) (V)
–1.0
–0.5
0
61215
64042 G14
0.5
1.0
1.5
39
VCM = VOCM = MID-SUPPLY
RI = 100Ω, RF = 200Ω
VOUTDIFF
VINDIFF
TIME (ns)
0
–1.00
VOUTDIFF (OUT+ – OUT–) (V)
–0.75
–0.50
–0.25
0
0.25
0.50
0.75
61215
64042 G15
1.00
39
VCM = VOCM = MID-SUPPLY
RI = 100Ω, RF = 200Ω
VOUTDIFF
VINDIFF
FREQUENCY (MHz)
0.1
–100
HD2, HD3 (dBc)
–90
–80
–70
–60
1 10 100
64042 G16
–110
–120
–130
–140
–50
–40 VCM = VOCM = MID-SUPPLY
VS = 3V
VOUTDIFF = 2VP-P
RF = 100, RI = 200
DIFFERENTIAL INPUT
SINGLE-ENDED INPUT
HD2
HD2
HD3
HD3
HD2, HD3 (dBc)
64042 G17
HD2
HD2
HD3
DC COMMON MODE INPUT (AT IN+ AND IN– PINS) (V)
–110
–40
–50
–60
–70
–80
–90
–100
VS = 3V
VCM = VOCM = MID-SUPPLY
RI = 100Ω, RF = 200Ω
VIN = 1VP-P
fIN = 10MHz
DIFFERENTIAL INPUT
SINGLE-ENDED INPUT
0 1.50.5 2.51.0 2.0
HD3
HD2, HD3 (dBc)
64042 G18
HD2
HD3
VOUTDIFF (VP-P)
–120
–40
–50
–60
–70
–80
–90
–100
–110
VS = 3V
VCM = VOCM = MID-SUPPLY
RI = 100Ω, RF = 200Ω
VIN = DIFFERENTIAL INPUT
fIN = 10MHz
0315624
LTC6404
13
6404f
Distortion vs Output Amplitude
LTC6404-2 Driving LTC2207
16-Bit ADC (Single Tone)
LTC6404-2 Driving LTC2207
16-Bit ADC (Two Tones)
Voltage Noise Density vs
Frequency
LTC6404-2 Noise Figure vs
Frequency
LTC6404-2 TYPICAL PERFORMANCE CHARACTERISTICS
HD2, HD3 (dBc)
64042 G19
HD2
HD3
VOUTDIFF (VP-P)
–120
–40
–50
–60
–70
–80
–90
–100
–110
VS = 3V
VCM = VOCM = MID-SUPPLY
RI = 100Ω, RF = 200Ω
VIN = SINGLE-ENDED INPUT
fIN = 10MHz
0316245
(dB)
64042 G20
HD2 HD3
HD7 HD5
HD4
FREQUENCY (MHz)
–120
0
–20
–40
–60
–80
–100
VS = 3.3V
VOUTDIFF = 2VP-P
VCM = VOCM = 1.25V
RI = 1007, RF = 2007
10.1MHz, 16184 POINT FFT
fSAMPLE = 105Msps
FUNDAMENTAL = –1dBFS
HD2 = –92.4dBc
HD3 = –93.02dBc
03010 5020 40
(dB)
64042 G21
IM3L IM3U
FREQUENCY (MHz)
–120
0
–20
–40
–60
–80
–100
VS = 3.3V
VINDIFF = 1VP-P
FULLY DIFFERENTIAL
VOUTDIFF = 2VP-P
VCM = VOCM = 1.25V
RI = 100Ω, RF = 200Ω
16184 POINT FFT
fSAMPLE = 105Msps
TONE1, TONE2 = –7dBFS
IM3U = –106.8dBc
IM3L = –107.7dBc
03010 5020 40
FREQUENCY (MHz)
0.01
VOLTAGE NOISE DENSITY (nV/√Hz)
1 100 10000.1 10
64042 G22
1
10
100 VS = 3V
VCM = VOCM = MID-SUPPLY
RI = 100, RF = 200
TA = 25°C
DIFFERENTIAL INPUT
REFERRED
COMMON MODE
FREQUENCY (MHz)
0
12
8
4
28
24
20
16
64042 G23
NOISE FIGURE (dB)
10 1000
100
VCM = VOCM = MID-SUPPLY
VS = 3V
TA = 25°C
SEE FIGURE 2 CIRCUIT
LTC6404
14
6404f
LTC6404-4 TYPICAL PERFORMANCE CHARACTERISTICS
Active Supply Current vs
Temperature
Shutdown Supply Current vs
Temperature Differential Voltage Offset (Input
Referred) vs Temperature
Common Mode Voltage Offset
(Input Referred) vs Temperature
Active Supply Current vs Supply
Voltage and Temperature
SHDN Supply Current vs Supply
Voltage and Temperature
SHDN Pin Current vs SHDN Pin
Voltage and Temperature
Supply Current vs SHDN Pin
Voltage and Temperature
Small-Signal Frequency
Response
TEMPERATURE (°C)
–75
27
ICC (mA)
28
30
31
32
–25 25 50 150
64044 G01
29
–50 0 75 100 125
33
VS = 2.7V
VS = 5V
VS = 3V
VCM = VOCM = MID-SUPPLY
TEMPERATURE (°C)
–75
0
ICC (mA)
0.1
0.2
0.3
75 100 125
0.7
64044 G02
–50 –25 0 25 50 150
0.4
0.5
0.6
VCM = VOCM = MID-SUPPLY
VS = 2.7V
VS = 3V
VS = 5V
TEMPERATURE (°C)
–75
–1.0
VOSDIFF (mV)
–0.8
–0.4
–0.2
0
1.0
0.4
–25 25 50 150
64044 G03
–0.6
0.6
0.8
0.2
–50 0 75 100 125
5 REPRESENTATIVE UNITS
VCM = VOCM = MID-SUPPLY
VS = 3V
TEMPERATURE (°C)
–75
–50
VOSCM (mV)
–40
–20
–10
0
50
20
–25 25 50 150
64044 G04
–30
30
40
10
–50 0 75 100 125
5 REPRESENTATIVE UNITS
VCM = VOCM = MID-SUPPLY
VS = 3V
VSUPPLY (V)
0
ICC (mA)
15
20
25
35
64044 G05
10
5
012 4
30
35
40
TA = 125°C
TA = 105°C
TA = 90°C
TA = 75°C
TA = 50°C
TA = 25°C
TA = –10°C
TA = –45°C
TA = –60°C
VCM = VOCM =
MID-SUPPLY
SHDN = V+
VSUPPLY (V)
0
0.5
0.6
0.7
4
64044 G06
0.4
0.3
123 5
0.2
0.1
0
ICC (mA)
TA = 125°C
TA = 105°C
TA = 90°C
TA = 75°C
TA = 50°C
TA = 25°C
TA = –10°C
TA = –45°C
TA = –60°C
VCM = VOCM = MID-SUPPLY
SHDN = V+
SHDN PIN VOLTAGE (V)
0
–30
SHDN PIN CURRENT (µA)
–25
–20
–15
–10
0
0.5 1.0 1.5 2.0
64044 G07
2.5 3.0
–5
VCM = VOCM = MID-SUPPLY
VS = 3V
TA = 125°C
TA = 105°C
TA = 90°C
TA = 75°C
TA = 50°C
TA = 25°C
TA = –10°C
TA = –45°C
TA = –60°C
SHDN PIN VOLTAGE (V)
0
35
30
25
20
15
10
5
01.5 2.5
64044 G08
0.5 1.0 2.0 3.0
ICC (mA)
VCM = VOCM = MID-SUPPLY
VS = 3V
TA = 125°C
TA = 105°C
TA = 90°C
TA = 75°C
TA = 50°C
TA = 25°C
TA = –10°C
TA = –45°C
TA = –60°C
FREQUENCY (MHz)
10
GAIN (dB)
100 1000
64044 G09
–15
–10
–5
0
5
10
15
20
VCM = VOCM = MID-SUPPLY
RI = 100Ω, RF = 402Ω,
CF IN PARALLEL WITH RF
CF = 0pF
CF = 1pF
VS = 3V
VS = 5V
LTC6404
15
6404f
Small-Signal Frequency Response
vs Gain Setting Resistor Values
Small-Signal Frequency
Response vs CLOAD
Small-Signal Frequency
Response vs Temperature
Small-Signal Frequency
Response vs Temperature Large-Signal Step Response Small-Signal Step Response
Distortion vs Frequency
Distortion vs Input Common Mode
Voltage Distortion vs Output Amplitude
LTC6404-4 TYPICAL PERFORMANCE CHARACTERISTICS
FREQUENCY (MHz)
10
GAIN (dB)
100 1000
64044 G10
–15
–5
–10
0
5
10
15
20
VCM = VOCM = MID-SUPPLY
VS = 3V AND VS = 5V
RI = 100Ω, RF = 402Ω
RI = 200Ω, RF = 800
VS = 3V
VS = 5V
RI = 140Ω, RF = 562Ω
FREQUENCY (MHz)
10
GAIN (dB)
100 1000
64044 G11
–15
–10
–5
0
5
25
10
15
20
CLOAD = 0pF
CLOAD = 10pF
VCM = VOCM = MID-SUPPLY
RI = 100Ω, RF = 402Ω
VS = 3V AND VS = 5V
VS = 3V
VS = 5V
CLOAD = 5pF
FREQUENCY (MHz)
–15
0
–5
–10
20
15
10
5
64044 G12
GAIN (dB)
10 1000
100
VCM = VOCM = MID-SUPPLY
RI = 100Ω, RF = 402Ω
VS = 3V AND VS = 5V
TA = 90°C
TA = 25°C
TA = –45°C
FREQUENCY (MHz)
10
FILTERED GAIN (dB)
100 1000
64044 G13
–20
–25
–10
–15
–5
0
5
10
15
20
TA = 90°C
VCM = VOCM = MID-SUPPLY
RI = 100Ω, RF = 402Ω
VS = 3V
UNFILTERED DIFFERENTIAL
OUTPUT AT 25°C
FILTERED
DIFFERENTIAL OUTPUT
TA = –45°C
TA = 25°C
TIME (ns)
0
VOUTDIFF (OUT+ – OUT–) (V)
0.5
1.5
2.5
12
64044 G14
–0.5
–1.5
0
1.0
2.0
–1.0
–2.0
–2.5 36915
VOUTDIFF
VINDIFF
VCM = VOCM = MID-SUPPLY
VS = 3V
RI = 100Ω, RF = 402Ω
TIME (ns)
0
–0.75
VOUTDIFF (OUT+ – OUT–) (V)
–0.50
–0.25
0
0.25
0.50
0.75
36912
64044 G15
15
VOUTDIFF
VINDIFF
VCM = VOCM = MID-SUPPLY
VS = 3V
RI = 100Ω, RF = 402Ω
FREQUENCY (MHz)
0.1
–100
HD2, HD3 (dBc)
–90
–80
–70
–60
1 10 100
64044 G16
–110
–120
–130
–50
–40 VCM = VOCM = MID-SUPPLY
VS = 3V
VOUT = 2VP-P
RI = 100, RF = 402
DIFFERENTIAL INPUT
SINGLE-ENDED INPUT
HD2
HD2
HD3 HD3
DC COMMON MODE INPUT (AT IN+ AND IN– PINS) (V)
0
HD2, HD3 (dBc)
–90
–80
–70
1.5 2.5
64044 G17
–100
–110
–120 0.5 1.0 2.0
–60
–50
–40 VCM = VOCM = MID-SUPPLY
VS = 3V
RI = 100, RF = 402
fIN = 10MHz
DIFFERENTIAL INPUT
SINGLE-ENDED INPUT
HD2
HD2
HD3
HD3
VOUTDIFF (VP-P)
0
HD2, HD3 (dBc)
–90
–80
–70
35
64044 G18
–100
–110
–120 12 4
–60
–50
–40
6
VCM = VOCM = MID-SUPPLY
VS = 3V
RI = 100, RF = 402
fIN = 10MHz
DIFFERENTIAL INPUT
SINGLE-ENDED INPUT
HD2 HD2
HD3
HD3
LTC6404
16
6404f
SHDN (Pin 1): When SHDN is fl oating or directly tied to
V+, the LTC6404 is in the normal (active) operating mode.
When Pin 1 is pulled a minimum of 2.1V below V+, the
LTC6404 enters into a low power shutdown state. See
Applications Information for more details.
V+, V– (Pins 2, 10, 11 and Pins 3, 9, 12): Power Supply
Pins. Three pairs of power supply pins are provided to keep
the power supply inductance as low as possible to prevent
degradation of amplifi er 2nd harmonic performance. See
the Layout Considerations section for more detail.
LTC6404-4 Driving LTC2207
16-Bit ADC (Single Tone)
LTC6404-4 Driving LTC2207
16-Bit ADC (Two Tones)
Voltage Noise Density vs
Frequency
LTC6404-4 Noise Figure vs
Frequency
LTC6404-4 TYPICAL PERFORMANCE CHARACTERISTICS
FREQUENCY (MHz)
0
–40
–20
0
40
64044 G19
–60
–80
10 20 30 50
–100
–120
–140
AMPLITUDE (dBFS)
VS = 3.3V
VOUTDIFF = 2VP-P
VCM = VOCM = 1.25V
RI = 100, RF = 402
10.1MHz, 64k POINT FFT
fSAMPLE = 105Msps
FUNDAMENTAL = –1dBFS
HD2 = –98.9dBc
HD3 = –99.6dBc
FREQUENCY (MHz)
0
–40
–20
0
40
64044 G20
–60
–80
10 20 30 50
–100
–120
–140
AMPLITUDE (dBFS)
VS = 3.3V
VOUTDIFF = 2VP-P
VCM = VOCM = 1.4V
RI = 100, RF = 402
64k POINT FFT
fSAMPLE = 105Msps
9.5MHz, 10.5MHz = –7dBFS
IMD3L = –100.8dBc
IMD3U = –102dBc
IMD3UIMD3L
FREQUENCY (MHz)
10
VOLTAGE NOISE DENSITY (nV/√Hz)
0.01 1 10 1000100
64044 G21
10.1
100 VCM = VOCM = MID-SUPPLY
VS = 3V
RI = 100, RF = 402
TA = 25°C
DIFFERENTIAL INPUT
REFERRED
COMMON MODE
FREQUENCY (MHz)
0
12
8
4
28
24
20
16
64044 G22
NOISE FIGURE (dB)
10 1000
100
VCM = VOCM = MID-SUPPLY
VS = 3V
TA = 25°C
SEE FIGURE 2 CIRCUIT
PIN FUNCTIONS
VOCM (Pin 4): Output Common Mode Reference Voltage.
The voltage on VOCM sets the output common mode
voltage level (which is defi ned as the average of the volt-
ages on the OUT+ and OUT– pins). The VOCM pin is the
midpoint of an internal resistive voltage divider between
the supplies, developing a (default) mid-supply voltage
potential to maximize output signal swing. In general, the
VOCM pin can be overdriven by an external voltage refer-
ence capable of driving the input impedance presented
by the VOCM pin. On the LTC6404-1, the VOCM pin has a
input resistance of approximately 23.5k to a mid-supply
LTC6404
17
6404f
PIN FUNCTIONS
potential. On the LTC6404-2, the VOCM pin has a input
resistance of approximately 14k. On the LTC6404-4, the
VOCM pin has a input resistance of approximately 7k. The
VOCM pin should be bypassed with a high quality ceramic
bypass capacitor of at least 0.01F, (unless you are using
split supplies, then connect directly to a low impedance,
low noise ground plane) to minimize common mode noise
from being converted to differential noise by impedance
mismatches both externally and internally to the IC.
NC (Pins 5, 16): No Connection. These pins are not con-
nected internally.
OUT+, OUT– (Pins 7, 14): Unfi ltered Output Pins. Besides
driving the feedback network, each pin can drive an ad-
ditional 50Ω to ground with typical short-circuit current
limiting of ±65mA. Each amplifi er output is designed to
drive a load capacitance of 10pF. This basically means
the amplifi er can drive 10pF from each output to ground
or 5pF differentially. Larger capacitive loads should be
decoupled with at least 25Ω resistors in series with each
output. For long-term device reliability, it is recommended
that the continuous (DC + ACRMS) output current be limited
to under 50mA.
OUTF+, OUTF– (Pins 8, 13): Filtered Output Pins. These
pins have a series 50Ω resistor connected between the
fi ltered and unfi ltered outputs and three 12pF capacitors.
Both OUTF+ and OUTF– have 12pF to V–, plus an additional
12pF differentially between OUTF+ and OUTF–. This fi lter
creates a differential lowpass frequency response with
a –3dB bandwidth of 88.5MHz. For long-term device
reliability, it is recommended that the continuous (DC +
ACRMS) output current be limited to under 40mA.
IN+, IN– (Pins 15, 6): Noninverting and Inverting Input Pins
of the Amplifi er, Respectively. For best performance, it is
highly recommended that stray capacitance be kept to an
absolute minimum by keeping printed circuit connections
as short as possible, and if necessary, stripping back nearby
surrounding ground plane away from these pins.
Exposed Pad (Pin 17): Tie the pad to V– (Pins 3, 9, and 12).
If split supplies are used, do not tie the pad to ground.
BLOCK DIAGRAM
–
+
1
5NC 6IN–
7OUT+
8OUTF+
16 NC 15 IN+14 OUT–13 OUTF–
2
V+
3
V–
V+
V+
V+
V+
V+
V–
V–
V+
V+
50
12pF
12pF
12pF
66k
V–
4
VOCM
VOCM
12
V–
6404 BD
11
V+
10
V+
9
V–
50
2 • RVOCM
2 • RVOCM
V–
V–
V+
V–
V+
V–
V+
V–
V+
V–
V+
V–
V–
V–
SHDN
IC
LTC6404-1
LTC6404-2
LTC6404-4
2 • RVOCM
47k
28k
14k
LTC6404
18
6404f
APPLICATIONS INFORMATION
Figure 1. DC Test Circuit
Figure 2. AC Test Circuit (–3dB BW testing)
–
+
1
SHDN
5 6 IN–
7OUT+
8OUTF+
16 15 IN+
NC
NC 14 OUT–13 OUTF–
VOUTF–
RF
VOUTF+
2
V+
3
V–
V+
V+
V–
V+
V–
4
VOCM
VSHDN
VOCM
VOCM
12
V–
11
V+
10
V+
9
V–
V–
V–
V–
V–
6404 F01
LTC6404
SHDN
0.1µF
0.01µF
VCM
RF
50
50
12pF
12pF
12pF
IL
RI
RI
RBAL
RBAL
+
–
VINP
–
+
VINM
IL
VIN–
VIN+
VOUT+
VOUT–
VOUTCM
V+
0.1µF
0.1µF
0.1µF
0.1µF
0.1µF
V–
V–
V+
0.1µF
0.1µF
0.1µF
0.1µF
0.1µF
–
+
1
SHDN
5 6 IN–
7OUT+
8OUTF+
16 15 IN+
NC
NC 14 OUT–13 OUTF–
VOUTF–
VOUTF+
2
V+
3
V–
V+
V+
V–
V+
V–
4
VOCM
VSHDN
VOCM
VOCM
12
V–
11
V+
10
V+
9
V–
V–
V–
6404 F02
LTC6404
SHDN
0.1µF
0.01µF
0.01µF
0.01µF
0.01µF
0.01µF
100
100
50
MINI-CIRCUITS
TCM4-19
MINI-CIRCUITS
TCM4-19
VIN–
VIN+
VOUT+
VOUT–
+
–
VIN
•
•
50
•
•
RF
RF
50
50
12pF
12pF
12pF
RI
RI
LTC6404
19
6404f
APPLICATIONS INFORMATION
Functional Description
The LTC6404 is a small outline, wide band, low noise,
and low distortion fully-differential amplifi er with accurate
output phase balancing. The LTC6404 is optimized to drive
low voltage, single-supply, differential input 14-bit to 18-bit
analog-to-digital converters (ADCs). The LTC6404’s output
is capable of swinging rail-to-rail on supplies as low as
2.7V, which makes the amplifi er ideal for converting ground
referenced, single-ended signals into DC level-shifted
differential signals in preparation for driving low voltage,
single-supply, differential input ADCs. Unlike traditional
op amps which have a single output, the LTC6404 has
two outputs to process signals differentially. This allows
for two times the signal swing in low voltage systems
when compared to single-ended output amplifi ers. The
balanced differential nature of the amplifi er also provides
even-order harmonic distortion cancellation, and less
susceptibility to common mode noise (e.g., power supply
noise). The LTC6404 can be used as a single-ended input
to differential output amplifi er, or as a differential input to
differential output amplifi er.
The LTC6404’s output common mode voltage, defi ned
as the average of the two output voltages, is independent
of the input common mode voltage, and is adjusted by
applying a voltage on the VOCM pin. If the pin is left open,
there is an internal resistive voltage divider that develops
a potential halfway between the V+ and V– pins. Whenever
this pin is not hard tied to a low impedance ground plane,
it is recommended that a high quality ceramic capacitor is
used to bypass the VOCM pin to a low impedance ground
plane (See Layout Considerations in this document). The
LTC6404’s internal common mode feedback path forces
accurate output phase balancing to reduce even order
harmonics, and centers each individual output about the
potential set by the VOCM pin.
VV
VV
OUTCM OCM OUT OUT
== +
+–
2
The outputs (OUT+ and OUT–) of the LTC6404 are capable
of swinging rail-to-rail. They can source or sink up to ap-
proximately 65mA of current.
Additional outputs (OUTF+ and OUTF–) are available that
provide fi ltered versions of the OUT+ and OUT– outputs. An
on-chip single pole RC passive fi lter band limits the fi ltered
outputs to a –3dB frequency of 88.5MHz. The user has a
choice of using the unfi ltered outputs, the fi ltered outputs,
or modifying the fi ltered outputs to adjust the frequency
response by adding additional components.
In applications where the full bandwidth of the LTC6404 is
desired, the unfi ltered outputs (OUT+ and OUT–) should be
used. The unfi ltered outputs OUT+ and OUT– are designed
to drive 10pF to ground (or 5pF differentially). Capacitances
greater than 10pF will produce excess peaking, and can
be mitigated by placing at least 25Ω in series with each
output pin.
Input Pin Protection
The LTC6404’s input stage is protected against differential
input voltages which exceed 1.4V by two pairs of back-
to-back diodes connected in anti-parallel series between
IN+ and IN– (Pins 6 and 15). In addition, the input pins
have steering diodes to either power supply. If the input
pair is overdriven, the current should be limited to under
10mA to prevent damage to the IC. The LTC6404 also has
steering diodes to either power supply on the VOCM and
SHDN pins (Pins 4 and 1), and if forced to voltages which
exceed either supply, they too, should be current-limited
to under 10mA.
SHDN Pin
If the SHDN pin (Pin 1) is pulled 2.1V below the posi-
tive supply, circuitry is activated which powers down
the LTC6404. The pin will have the Thevenin equivalent
impedance of approximately 66kΩ to V+. If the pin is left
unconnected, an internal pull-up resistor of 150k will
keep the part in normal active operation. Care should
be taken to control leakage currents at this pin to under
1µA to prevent inadvertently putting the LTC6404 into
shutdown. In shutdown, all biasing current sources are
shut off, and the output pins, OUT+ and OUT–, will each
appear as open collectors with a non-linear capacitor in
parallel and steering diodes to either supply. Because of
the non-linear capacitance, the outputs still have the ability
to sink and source small amounts of transient current if
driven by signifi cant voltage transients. The inputs (IN+,
and IN–) appear as anti-parallel diodes which can conduct
LTC6404
20
6404f
APPLICATIONS INFORMATION
if voltage transients at the input exceed 1.4V. The inputs
also have steering diodes to either supply. The turn-on and
turn-off time between the shutdown and active states is
typically less than 1µs.
General Amplifi er Applications
As levels of integration have increased and correspond-
ingly, system supply voltages decreased, there has been
a need for ADCs to process signals differentially in order
to maintain good signal to noise ratios. These ADCs are
typically supplied from a single supply voltage which
can be as low as 3V (2.7V min), and will have an optimal
common mode input range near mid-supply. The LTC6404
makes interfacing to these ADCs easy, by providing both
single-ended to differential conversion as well as com-
mon mode level shifting. The front page of this data sheet
shows a typical application. Referring to Figure 1, the gain
to VOUTDIFF from VINM and VINP is:
VVV
R
RVV
OUTDIFF OUT OUT F
IINP INM
=≈
()
+–•–
–
Note from the above equation, the differential output volt-
age (VOUT+ – VOUT–) is completely independent of input
and output common mode voltages, or the voltage at
the common mode pin. This makes the LTC6404 ideally
suited for pre-amplifi cation, level shifting and conversion
of single ended signals to differential output signals to
drive differential input ADCs.
Effects of Resistor Pair Mismatch
In the circuit of Figure 3, it is possible the gain setting
resistors will not perfectly match. Assuming infi nite open
loop gain, the differential output relationship is given by
the equation:
VVV
R
RV
V
OUTDIFF OUT OUT F
IINDIFF
AVG I
=≅+
Δ
+–•
•
–
β
βNNCM AVG OCM
V–•
Δβ
β
where:
βAVG I
IF
I
IF
R
RR
R
RR
=+++
⎛
⎝
⎜⎞
⎠
⎟
1
2
1
11
2
22
•
RF is the average of RF1, and RF2, and RI is the average
of RI1, and RI2.
βAVG is defi ned as the average feedback factor (or gain)
from the outputs to their respective inputs:
Δβ is defi ned as the difference in feedback factors:
Δ= ++
βR
RR
R
RR
I
IF
I
IF
2
22
1
11
–
Figure 3. Basic Differential Amplifi er with Feedback Resistor Pair Mismatch
V–
V–
V+
0.1µF
0.1µF
0.1µF
0.1µF 0.1µF
–
+
1
SHDN
5 6 IN–
7OUT+
8OUTF+
16 15 IN+
NC
NC 14 OUT–13 OUTF–
VOUTF–
RF2
VOUTF+
VOUT–
VOUT+
2
V+
3
V–
V+
V+
V–
V+
V–
4
VOCM
VSHDN
VVOCM
VOCM
12
V–
11
V+
10
V+
9
V–
V–
V–
6404 F03
LTC6404
SHDN
0.1µF
0.01µF
RF1
RI2
RI1
+
–
VINP
–
+
VINM
LTC6404
21
6404f
APPLICATIONS INFORMATION
VINCM is defi ned as the average of the two input voltages
VINP
, and VINM (also called the source-referred input com-
mon mode voltage):
VVV
INCM INP INM
=+
()
1
2•
and VINDIFF is defi ned as the difference of the input
voltages:
V
INDIFF = VINP – VINM
When the feedback ratios mismatch (Δβ), common mode
to differential conversion occurs.
Setting the differential input to zero (VINDIFF = 0), the de-
gree of common mode to differential conversion is given
by the equation:
VVV
VV V
OUTDIFF OUT OUT
INCM OCM AVG I
=
≈
()
Δ
+–
–•
–
β
β⏐NNDIFF =0
In general, the degree of feedback pair mismatch is a
source of common mode to differential conversion of both
signals and noise. Using 1% resistors or better will mitigate
most problems, and will provide about 34dB worst-case of
common mode rejection. Using 0.1% resistors will provide
about 54dB of common mode rejection. A low impedance
ground plane should be used as a reference for both the
input signal source, and the VOCM pin. A direct short of
VOCM to this ground or bypassing the VOCM with a high
quality 0.1µF ceramic capacitor to this ground plane, will
further prevent common mode signals from being con-
verted to differential.
There may be concern on how feedback ratio mismatch
affects distortion. Distortion caused by feedback ratio mis-
match using 1% resistors or better is negligible. However,
in single supply level shifting applications where there is
a voltage difference between the input common mode
voltage and the output common mode voltage, resistor
mismatch can make the apparent voltage offset of the
amplifi er appear higher than specifi ed.
The apparent input referred offset induced by feedback
ratio mismatch is derived from the following equation:
V
OSDIFF(APPARENT) ≈ (VICM – VOCM) • Δβ
Using the LTC6404-1 in a single supply application on a
single 5V supply with 1% resistors, and the input common
mode grounded, with the VOCM pin biased at mid-supply,
the worst-case DC offset can induce 25mV of apparent
offset voltage. With 0.1% resistors, the worst case appar-
ent offset reduces to 2.5mV.
Input Impedance and Loading Effects
The input impedance looking into the VINP or VINM input
of Figure 1 depends on whether the sources VINP and
VINM are fully differential. For balanced input sources
(VINP = –VINM), the input impedance seen at either input
is simply:
R
INP = RINM = RI
For single ended inputs, because of the signal imbalance
at the input, the input impedance increases over the bal-
anced differential case. The input impedance looking into
either input is:
RR R
R
RR
INP INM I
F
IF
==
+
⎛
⎝
⎜⎞
⎠
⎟
⎛
⎝
⎜⎞
⎠
⎟
11
2
–•
Input signal sources with non-zero output impedances can
also cause feedback imbalance between the pair of feedback
networks. For the best performance, it is recommended
that the source’s output impedance be compensated for.
If input impedance matching is required by the source,
R1 should be chosen (see Figure 4):
RRR
RR
INM S
INM S
1=•
–
Figure 4. Optimal Compensation for Signal Source Impedance
VS
+
–
–
+
RF
RF
RI
RINM
RS
RI
R2 = RS || R1
R1 CHOSEN SO THAT R1 || RINM = RS
R2 CHOSEN TO BALANCE R1 || RS
R1
6404 F04
LTC6404
22
6404f
APPLICATIONS INFORMATION
According to Figure 4, the input impedance looking into
the differential amp (RINM) refl ects the single ended source
case, thus:
RR
R
RR
INM I
F
IF
=
+
⎛
⎝
⎜⎞
⎠
⎟
⎛
⎝
⎜⎞
⎠
⎟
11
2
–•
R2 is chosen to balance R1 || RS:
RRR
RR
IS
IS
2=+
•
Input Common Mode Voltage Range
The LTC6404’s input common mode voltage (VICM) is
defi ned as the average of the two input voltages, VIN+, and
VIN–. It extends from V– to 1.4V below V+. The operating
input common mode range depends on the circuit con-
fi guration (gain), VOCM and VCM (Refer to Figure 5). For
fully differential input applications, where VINP = –VINM,
the common mode input voltage is approximately:
VVVVR
RR
VR
R
ICM IN IN OCM I
IF
CM F
F
=+≈+
⎛
⎝
⎜⎞
⎠
⎟+
+–
•
•
2
++
⎛
⎝
⎜⎞
⎠
⎟
RI
With singled ended inputs, there is an input signal com-
ponent to the input common mode voltage. Applying only
VINP (setting VINM to zero), the input common voltage is
approximately:
VVVVR
RR
VR
R
ICM IN IN OCM I
IF
CM F
F
=+≈+
⎛
⎝
⎜⎞
⎠
⎟+
+–
•
•
2
++
⎛
⎝
⎜⎞
⎠
⎟++
⎛
⎝
⎜⎞
⎠
⎟
R
VR
RR
I
INP F
FI
2•
Output Common Mode Voltage Range
The output common mode voltage is defi ned as the aver-
age of the two outputs:
VV
VV
OUTCM OCM OUT OUT
== +
+–
2
The VOCM pin sets this average by an internal common
mode feedback loop which internally forces VOUT+ = –VOUT–.
The output common mode range extends from 1.1V above
V– to 1V below V+ (see the Electrical Characteristics table
for the LTC6404-4 output common mode voltage range).
The VOCM pin sits in the middle of a voltage divider which
sets the default mid-supply open circuit potential.
Figure 5. Circuit for Common Mode Range
V–
V–
V+
0.1µF
0.1µF 0.1µF
0.1µF
0.1µF
VCM
–
+
1
SHDN
5 6 IN–
7OUT+
8OUTF+
16 15 IN+
NC
NC 14 OUT–13 OUTF–
VOUTF–
RF
VOUTF+
VOUT–
VOUT+
2
V+
3
V–
V+
V+
V–
V+
V–
4
VOCM
VSHDN
VVOCM
VOCM
12
V–
11
V+
10
V+
9
V–
V–
V–
6404 F05
LTC6404
SHDN
0.1µF
0.01µF
RF
RI
RI
+
–
VINP
–
+
VINM
LTC6404
23
6404f
In single supply applications, where the LTC6404 is used
to interface to an ADC, the optimal common mode input
range to the ADC is often determined by the ADC’s refer-
ence. If the ADC makes a reference available for setting
the input common mode voltage, it can be directly tied
to the VOCM pin, but must be capable of driving the input
impedance presented by the VOCM as listed in the Electri-
cal Characteristics Table. This impedance can be assumed
to be connected to a mid-supply potential. If an external
reference drives the VOCM pin, it should still be bypassed
with a high quality 0.01µF or larger capacitor to a low
impedance ground plane to fi lter any thermal noise and
to prevent common mode signals on this pin from being
inadvertently converted to differential signals.
Output Filter Considerations and Use
Filtering at the output of the LTC6404 is often desired to
provide either anti-aliasing or improved signal to noise
ratio. To simplify this fi ltering, the LTC6404 includes an
additional pair of differential outputs (OUTF+ and OUTF–)
which incorporate an internal lowpass fi lter network with
a –3dB bandwidth of 88.5MHz (Figure 6).
These pins each have a DC output impedance of 50Ω. In-
ternal capacitances are 12pF to V– on each fi ltered output,
plus an additional 12pF capacitor connected differentially
between the two fi ltered outputs. This resistor/capacitor
combination creates fi ltered outputs that look like a series
50Ω resistor with a 36pF capacitor shunting each fi ltered
output to AC ground, providing a –3dB bandwidth of
APPLICATIONS INFORMATION
88.5MHz, and a noise bandwidth of 139MHz. The fi lter
cutoff frequency is easily modifi ed with just a few external
components. To increase the cutoff frequency, simply add 2
equal value resistors, one between OUT+ and OUTF+ and the
other between OUT– and OUTF– (Figure 7). These resistors,
in parallel with the internal 50Ω resistor, lower the overall
resistance and therefore increase fi lter bandwidth. For
example, to double the fi lter bandwidth, add two external
50Ω resistors to lower the series fi lter resistance to 25Ω.
The 36pF of capacitance remains unchanged, so fi lter
bandwidth doubles. Keep in mind, the series resistance
also serves to decouple the outputs from load capacitance.
The unfi ltered outputs of the LTC6404 are designed to
drive 10pF to ground or 5pF differentially, so care should
be taken to not lower the effective impedance between
OUT+ and OUTF+ or OUT– and OUTF– below 25Ω.
To decrease fi lter bandwidth, add two external capacitors,
one from OUTF+ to ground, and the other from OUTF– to
ground. A single differential capacitor connected between
OUTF+ and OUTF– can also be used, but since it is being
driven differentially it will appear at each fi ltered output
as a single-ended capacitance of twice the value. To halve
the fi lter bandwidth, for example, two 36pF capacitors
could be added (one from each fi ltered output to ground).
Alternatively, one 18pF capacitor could be added between
the fi ltered outputs, again halving the fi lter bandwidth.
Combinations of capacitors could be used as well; a three
Figure 7. LTC6404 Filter Topology Modifi ed for 2x Filter
Bandwidth (2 External Resistors)
Figure 6. LTC6404 Internal Filter Topology
–
+
7OUT+
8OUTF+
14 OUT–13 OUTF–
12
V–
9
V–
V–
V–
6404 F06
LTC6404
FILTERED OUTPUT
(88.5MHz)
50
12pF
12pF
12pF
50
–
+
7OUT+
8OUTF+
14 OUT–13 OUTF–
12
V–
9
V–
V–
V–
6404 F07
LTC6404
FILTERED OUTPUT
(176MHz)
50
49.9
12pF
12pF
12pF
50
49.9
LTC6404
24
6404f
Figure 8. LTC6404 Filter Topology Modifi ed for 1/2x Filter
Bandwidth (3 External Capacitors)
capacitor solution of 12pF from each fi ltered output to
ground plus a 12pF capacitor between the fi ltered outputs
would also halve the fi lter bandwidth (Figure 8).
Noise Considerations
The LTC6404’s input referred voltage noise is on the
order of 1.5nV/√Hz. Its input referred current noise is on
the order of 3pA/√Hz. In addition to the noise generated
by the amplifi er, the surrounding feedback resistors also
contribute noise. A noise model is shown in Figure 9.
The output noise generated by both the amplifi er and the
feedback components is governed by the equation:
e
eR
RIR
e
no
ni F
InF
n
=
+
⎛
⎝
⎜⎞
⎠
⎟
⎛
⎝
⎜⎞
⎠
⎟+
()
+•••
•
12
2
2
2
RRI F
InRF
R
Re••
⎛
⎝
⎜⎞
⎠
⎟
⎛
⎝
⎜⎞
⎠
⎟+
2
2
2
A plot of this equation, and a plot of the noise generated
by the feedback components for the LTC6404 is shown
in Figure 10.
APPLICATIONS INFORMATION
Figure 9. Noise Model of the LTC6404
–
+
7OUT+
8OUTF+
14 OUT–13 OUTF–
12
V–
9
V–
V–
V–
6404 F08
LTC6404
FILTERED OUTPUT
(44.25MHz)
50
12pF
12pF
12pF
12pF
12pF
50
12pF
–
+
1
SHDN
5 6 IN–
7OUT+
8OUTF+
16 15 IN+
NC
NC 14 OUT–13 OUTF–
eno2
RF2
2
V+
3
V–
V+
V+
V–
V+
V–
VOCM
VOCM
12
V–
11
V+
10
V+
9
V–
V–
V–
6404 F09
LTC6404
enof2
enRI22
SHDN
RF1
RI2
RI1
V–
V+
V–
4
enRF22
enRI12
encm2
eni2
enRF12
in+2
in–2
LTC6404
25
6404f
APPLICATIONS INFORMATION
The LTC6404’s input referred voltage noise contributes the
equivalent noise of a 140Ω resistor. When the feedback
network is comprised of resistors whose values are less
than this, the LTC6404’s output noise is voltage noise
dominant (See Figure 10.):
ee R
R
no ni F
I
≈+
⎛
⎝
⎜⎞
⎠
⎟
•1
Feedback networks consisting of resistors with values
greater than about 200Ω will result in output noise which
is resistor noise and amplifi er current noise dominant.
eIR
R
RkTR
no n F F
IF
≈
()
++
⎛
⎝
⎜⎞
⎠
⎟
214
2
•• ••••
Lower resistor values (<100Ω) always result in lower noise
at the penalty of increased distortion due to increased load-
ing of the feedback network on the output. Higher resistor
values (but still less than 400Ω) will result in higher output
noise, but improved distortion due to less loading on the
output. The optimal feedback resistance for the LTC6404
runs between 100Ω to 400Ω. Higher resistances are not
recommended.
The differential fi ltered outputs OUTF+ and OUTF– will have
a little higher spot noise than the unfi ltered outputs (due to
the two 50Ω resistors which contribute 0.9nV/√Hz each),
but actually will provide superior Signal-to-Noise in noise
bandwidths exceeding 139MHz due to the noise-fi ltering
function the fi lter provides.
Layout Considerations
Because the LTC6404 is a very high speed amplifi er, it is
sensitive to both stray capacitance and stray inductance.
Three pairs of power supply pins are provided to keep the
power supply inductance as low as possible to prevent
degradation of amplifi er 2nd Harmonic performance. It is
critical that close attention be paid to supply bypassing. For
single supply applications (Pins 3, 9 and 12 grounded) it
is recommended that 3 high quality 0.1µF surface mount
ceramic bypass capacitor be placed between pins 2 and
3, between pins 11and 12, and between pins10 and 9 with
direct short connections. Pins 3, 9 and 10 should be tied
directly to a low impedance ground plane with minimal
routing. For dual (split) power supplies, it is recommended
that at least two additional high quality, 0.1µF ceramic
capacitors are used to bypass pin V+ to ground and V– to
ground, again with minimal routing. For driving large loads
(<200Ω), additional bypass capacitance may be needed for
optimal performance. Keep in mind that small geometry
(e.g. 0603) surface mount ceramic capacitors have a much
higher self resonant frequency than do leaded capacitors,
and perform best in high speed applications.
Any stray parasitic capacitances to ground at the sum-
ming junctions IN+, and IN– should be kept to an absolute
minimum even if it means stripping back the ground plane
away from any trace attached to this node. This becomes
especially true when the feedback resistor network uses
resistor values >400Ω in circuits with RF = RI. Excessive
peaking in the frequency response can be mitigated by add-
ing small amounts of feedback capacitance (0.5pF to 2pF)
around RF. Always keep in mind the differential nature of
the LTC6404, and that it is critical that the load impedances
seen by both outputs (stray or intended) should be as bal-
anced and symmetric as possible. This will help preserve
the natural balance of the LTC6404, which minimizes the
generation of even order harmonics, and preserves the
rejection of common mode signals and noise.
It is highly recommended that the VOCM pin be either hard
tied to a low impedance ground plane (in split supply
applications), or bypassed to ground with a high quality
ceramic capacitor whose value exceeds 0.01µF. This will
help stabilize the common mode feedback loop as well as
prevent thermal noise from the internal voltage divider and
Figure 10. LTC6404-1 Output Spot Noise vs Spot Noise
Contributed by Feedback Network Alone
RF = RI ()
10
0.1
nV/√Hz
1
10
100
100 1k 10k
6404 F10
FEEDBACK RESISTOR
NETWORK NOISE ALONE
TOTAL (AMPLIFIER AND
FEEDBACK NETWORK)
OUTPUT NOISE
LTC6404
26
6404f
APPLICATIONS INFORMATION
Figure 11. Interfacing the LTC6404-1 to a High Speed 105Msps ADC
other external sources of noise from being converted to
differential noise due to divider mismatches in the feedback
networks. It is also recommended that the resistive feed-
back networks be comprised of 1% resistors (or better)
to enhance the output common mode rejection. This will
also prevent VOCM referred common mode noise of the
common mode amplifi er path (which cannot be fi ltered)
from being converted to differential noise, degrading the
differential noise performance.
Feedback factor mismatch has a weak effect on distortion.
Using 1% or better resistors should prevent mismatch
from impacting amplifi er linearity. However, in single
supply level shifting applications where there is a voltage
difference between the input common mode voltage and
the output common mode voltage, resistor mismatch can
make the apparent voltage offset of the amplifi er appear
worse than specifi ed.
In general, the apparent input referred offset induced by
feedback factor mismatch is given by the equation:
V
OSDIFF(APPARENT) ≈ (VINCM – VOCM) • Δβ
where
Δβ = ++
R
RR
R
RR
I
IF
I
IF
2
22
1
11
–
Interfacing the LTC6404 to A/D Converters
The LTC6404’s rail-to-rail output and fast settling time make
the LTC6404 ideal for interfacing to low voltage, single
supply, differential input ADCs. The sampling process of
ADCs create a sampling glitch caused by switching in the
sampling capacitor on the ADC front end which momentarily
“shorts” the output of the amplifi er as charge is transferred
between the amplifi er and the sampling cap. The amplifi er
must recover and settle from this load transient before
this acquisition period ends for a valid representation of
the input signal. In general, the LTC6404 will settle much
more quickly from these periodic load impulses than
from a 2V input step, but it is a good idea to either use
the fi ltered outputs to drive the ADC (Figure 11 shows an
example of this), or to place a discrete R-C fi lter network
between the differential unfi ltered outputs of the LTC6404
and the input of the ADC to help absorb the charge transfer
required during the ADC sampling process. The capaci-
tance of the fi lter network serves as a charge reservoir
to provide high frequency charging during the sampling
process, while the two resistors of the fi lter network are
used to dampen and attenuate any charge kickback from
the ADC. The selection of the R-C time constant is trial
and error for a given ADC, but the following guidelines
are recommended: Choosing too large of a resistor in the
decoupling network (leaving insuffi cient settling time)
–
+
1
SHDN
5 6 IN–
7OUT+
8OUTF+
16 15 IN+
NC
NC 14 OUT–13 OUTF–
AIN+
AIN–
100
2
V+
3
V–
V+
V+
V–
3.3V
VOCM
VOCM
12
V–
11
V+
10
V+
9
V–
V–
V–
6404 F11
LTC6404-1
LTC2207
VIN
2VP-P
SHDN
100
100
100
0.1µF
3.3V
4
0.1µF
0.1µF
CONTROL
GND VDD
D15
•
•
D0
0.1µF
VCM
2.2µF
3.3V
1µF 1µF
LTC6404
27
6404f
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
PACKAGE DESCRIPTION
UD Package
16-Lead Plastic QFN (3mm × 3mm)
(Reference LTC DWG # 05-08-1691)
will create a voltage divider between the dynamic input
impedance of the ADC and the decoupling resistors.
Choosing too small of a resistor will possibly prevent the
resistor from properly damping the load transient caused
by the sampling process, prolonging the time required for
APPLICATIONS INFORMATION
settling. 16-bit applications typically require a minimum
of 11 R-C time constants. It is recommended that the ca-
pacitor chosen have a high quality dielectric (for example,
C0G multilayer ceramic).
3.00 ± 0.10
(4 SIDES)
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
1.45 ± 0.05
(4 SIDES)
NOTE:
1. DRAWING CONFORMS TO JEDEC PACKAGE OUTLINE MO-220 VARIATION (WEED-2)
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION
ON THE TOP AND BOTTOM OF PACKAGE
PIN 1
TOP MARK
(NOTE 6)
0.40 ± 0.10
BOTTOM VIEW—EXPOSED PAD
1.45 ± 0.10
(4-SIDES)
0.75 ± 0.05 R = 0.115
TYP
0.25 ± 0.05
1
PIN 1 NOTCH R = 0.20 TYP
OR 0.25 × 45° CHAMFER
15 16
2
0.50 BSC
0.200 REF
2.10 ± 0.05
3.50 ± 0.05
0.70 ±0.05
0.00 – 0.05
(UD16) QFN 0904
0.25 ±0.05
0.50 BSC
PACKAGE OUTLINE
LTC6404
28
6404f
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com
© LINEAR TECHNOLOGY CORPORATION 2008
LT 0608 • PRINTED IN USA
RELATED PARTS
PART NUMBER DESCRIPTION COMMENTS
LT1809/LT1810 Single/Dual 180Mhz, 350V/µs Rail-to-Rail Input and Output
Low Distortion Op Amps 180MHz, 350V/µs Slew Rate, Shutdown
LTC1992/LTC1992-x Fully Differential Input/Output Amplifi ers Programmable Gain or Fixed Gain (G = 1, 2, 5, 10)
LT1994 Low Noise, Low Distortion Fully differential Input/Output
Amplifi er/Driver Low Distortion, 2VP-P
, 1MHz: –94dBc, 13mA, Low Noise: 3nV/√Hz
LTC6400-20 1.8GHz Low Noise, Low Distortion, Differential ADC Driver AV = 20dB, 90mA Supply Current, IMD3 = –65dBc at 300MHz
LTC6400-26 1.9GHz Low Noise, Low Distortion, Differential ADC Driver AV = 26dB, 85mA Supply Current, IMD3 = –71dBc at 300MHz
LTC6401-8 2.2GHz Low Noise, Low Distortion, Differential ADC Driver AV = 8dB, 45mA Supply Current, IMD3 = –80dBc at 140MHz
LTC6401-20 1.3GHz Low Noise, Low Distortion, Differential ADC Driver AV = 20dB, 50mA Supply Current, IMD3 = –74dBc at 140MHz
LTC6401-26 1.6GHz Low Noise, Low Distortion, Differential ADC Driver AV = 26dB, 45mA Supply Current, IMD3 = –72dBc at 140MHz
LT6402-12 300MHz Low Distortion, Low Noise Differential Amplifi er/ADC
Driver AV = 4V/V, NF = 15dB, OIP3 = 43dBm at 20MHz
LTC6406 3GHz Low Noise, Rail-to-Rail Input Differential ADC Driver Low Noise: 1.6nV/√Hz, Low Power: 18mA
LT6600-2.5 Very Low Noise, Fully Differential Amplifi er and 2.5MHz Filter 86dB S/N with 3V Supply, SO-8 Package
LT6600-5 Very Low Noise, Fully Differential Amplifi er and 5MHz Filter 82dB S/N with 3V Supply, SO-8 Package
LT6600-10 Very Low Noise, Fully Differential Amplifi er and 10MHz Filter 82dB S/N with 3V Supply, SO-8 Package
LT6600-15 Very Low Noise, Fully Differential Amplifi er and 15MHz Filter 76dB S/N with 3V Supply, SO-8 Package
LT6600-20 Very Low Noise, Fully Differential Amplifi er and 20MHz Filter 76dB S/N with 3V Supply, SO-8 Package
LTC6403-1 200MHz Low Noise, Low Distortion Differential ADC Driver 10.8mA Supply Current, –95dB Distortion at 3MHz