MILITARY AND COMMERCIAL TEMPERATURE RANGES AUGUST 1996
1996 Integrated Device Technology, Inc. 5.3 DSC-2545/9
1
Integrated Device Technology, Inc.
The 16-bit transceivers are built using advanced dual metal
CMOS technology. These high-speed, low-power transceiv-
ers are ideal for synchronous communication between two
busses (A and B). The Direction and Output Enable controls
operate these devices as either two independent 8-bit trans-
ceivers or one 16-bit transceiver. The direction control pin
(xDIR) controls the direction of data flow. The output enable
pin (x
OE
) overrides the direction control and disables both
ports. All inputs are designed with hysteresis for improved
noise margin.
The FCT16245T are ideally suited for driving high-capaci-
tance loads and low-impedance backplanes. The output buff-
ers are designed with power off disable capability to allow "live
insertion" of boards when used as backplane drivers.
The FCT162245T have balanced output drive with current
limiting resistors. This offers low ground bounce, minimal
undershoot, and controlled output fall times– reducing the
need for external series terminating resistors. The
FCT162245T are plug-in replacements for the FCT16245T
and ABT16245 for on-board interface applications.
The FCT166245T are suited for very low noise, point-to-
point driving where there is a single receiver, or a light lumped
DESCRIPTION:
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
FUNCTIONAL BLOCK DIAGRAM
1 DIR
1OE
1A1
1A2
1A3
1A4
1A5
1A6
1A7
1A8
1B1
1B2
1B3
1B4
1B5
1B6
1B7
1B8
2545 drw 02
2
DIR
2
OE
2
A
1
2
A
2
2
A
3
2
A
4
2
A
5
2
A
6
2
A
7
2
A
8
2
B
1
2
B
2
2
B
3
2
B
4
2
B
5
2
B
6
2
B
7
2
B
8
2545 drw 01
IDT54/74FCT16245T/AT/CT/ET
IDT54/74FCT162245T/AT/CT/ET
IDT54/74FCT166245T/AT/CT
IDT54/74FCT162H245T/AT/CT/ET
FAST CMOS 16-BIT
BIDIRECTIONAL
TRANSCEIVERS
FEATURES:
Common features:
0.5 MICRON CMOS Technology
High-speed, low-power CMOS replacement for
ABT functions
Typical tSK(o) (Output Skew) < 250ps
Low input and output leakage 1µA (max.)
ESD > 2000V per MIL-STD-883, Method 3015;
> 200V using machine model (C = 200pF, R = 0)
Packages include 25 mil pitch SSOP, 19.6 mil pitch
TSSOP, 15.7 mil pitch TVSOP and 25 mil pitch Cerpack
Extended commercial range of -40°C to +85°C
Features for FCT16245T/AT/CT/ET:
High drive outputs (-32mA IOH, 64mA IOL)
Power off disable outputs permit “live insertion”
Typical VOLP (Output Ground Bounce) < 1.0V at
VCC = 5V, TA = 25°C
Features for FCT162245T/AT/CT/ET:
Balanced Output Drivers: ±24mA (commercial),
±16mA (military)
Reduced system switching noise
Typical VOLP (Output Ground Bounce) < 0.6V at
VCC = 5V,TA = 25°C
5.3 2
IDT54/74FCT16245T/AT/CT/ET, 162245T/AT/CT/ET, IDT54/74FCT166245T/AT/CT, IDT54/74FCT162H245T/AT/CT/ET
FAST CMOS 16-BIT BIDIRECTIONAL TRANSCEIVERS MILITARY AND COMMERCIAL TEMPERATURE RANGES
1DIR
1B1
GND
1B3
VCC
GND
2B2
GND
VCC
GND
1B2
1B4
1B5
1B6
1B7
1B8
2B1
2B3
2B4
2B5
2B7
2B8
2B6
2DIR
1A1
1A2
GND
1A3
1A4
VCC
1A5
1A6
1A7
1A8
2A1
2A2
2A3
2A4
VCC
2A5
2A7
2A8
2A6
GND
GND
GND
2OE
1OE
39
29
30
31
32
33
34
35
36
37
38
25
26
27
28
48
47
41
42
43
44
45
46
40
1
2
3
4
5
6
7
8
9
10
12
13
14
15
16
17
18
19
20
11
21
22
23
24
2545 drw 04
CERPACK
TOP VIEW
E48-1
FEATURES: (Cont'd.) DESCRIPTION: (Cont'd.)
Features for FCT166245T/AT/CT:
Light Drive A Port: ±8mA (commercial),
±6mA (military)
High Drive B Port: +64mA, –32mA (commercial),
+48mA, –24mA (military)
Minimal system switching noise
Typical VOLP (Output Ground Bounce) < 0.25V at
VCC = 5V,TA = 25°C (A Port Switching)
Features for FCT162H245T/AT/CT/ET:
Bus Hold retains last active bus state during 3-state
Eliminates the need for external pull up resistors
load (<100pF). The buffers are designed to limit the output
current to levels which will avoid noise and ringing on the
signal lines without using external series terminating resis-
tors. These parts have a ±8mA driver on the "A" Port and a
+64/–32mA driver on the "B" Port, making them ideal for
interfacing noisy system busses to noise sensitive interfaces.
The FCT162H245T have "Bus Hold" which retains the
input's last state whenever the input goes to high impedance.
This prevents "floating" inputs and eliminates the need for
pull-up/down resistors.
PIN CONFIGURATIONS
1
DIR
1
B
1
GND
1
B
3
V
CC
GND
2
B
2
GND
V
CC
GND
1
B
2
1
B
4
1
B
5
1
B
6
1
B
7
1
B
8
2
B
1
2
B
3
2
B
4
2
B
5
2
B
7
2
B
8
2
B
6
2
DIR
1
A
1
1
A
2
GND
1
A
3
1
A
4
V
CC
1
A
5
1
A
6
1
A
7
1
A
8
2
A
1
2
A
2
2
A
3
2
A
4
V
CC
2
A
5
2
A
7
2
A
8
2
A
6
GND
GND
GND
2
OE
1
OE
2545 drw 03
39
29
30
31
32
33
34
35
36
37
38
25
26
27
28
48
47
41
42
43
44
45
46
40
1
2
3
4
5
6
7
8
9
10
12
13
14
15
16
17
18
19
20
11
21
22
23
24
SSOP/
TSSOP/TVSOP
TOP VIEW
SO48-1
SO48-2
SO48-3
5.3 3
IDT54/74FCT16245T/AT/CT/ET, 162245T/AT/CT/ET, IDT54/74FCT166245T/AT/CT, IDT54/74FCT162H245T/AT/CT/ET
FAST CMOS 16-BIT BIDIRECTIONAL TRANSCEIVERS MILITARY AND COMMERCIAL TEMPERATURE RANGES
NOTE:
1. This parameter is measured at characterization but not tested.
PIN DESCRIPTION
ABSOLUTE MAXIMUM RATINGS(1)
2545 tbl 02
CAPACITANCE (TA = +25°C, f = 1.0MHz)
2545 lnk 04
Symbol Parameter(1) Conditions Typ. Max. Unit
CIN Input
Capacitance VIN = 0V 3.5 6.0 pF
CI/O I/O
Capacitance VOUT = 0V 3.5 8.0 pF
FUNCTION TABLE(1)
Inputs
x
OE
OE
xDIR Outputs
L L Bus B Data to Bus A
L H Bus A Data to Bus B
H X High Z State
NOTE:
1. H = HIGH Voltage Level
L = LOW Voltage Level
X = Don't Care
Z = High Impedance
2545 tbl 01
NOTES:
1. On FCT162H245T these pins have “Bus Hold”. All other pins are standard
inputs, outputs or I/Os.
2. On FCT166245T this is the ±8mA Port.
3. On FCT166245T this is the +64/–32mA Port.
Pin Names Description
x
OE
Output Enable Input (Active LOW)
xDIR Direction Control Input
xAx Side A Inputs or 3-State Outputs(1,2)
xBx Side B Inputs or 3-State Outputs(1,3)
Symbol Description Max. Unit
VTERM(2) Terminal Voltage with Respect to
GND –0.5 to +7.0 V
VTERM(3) Terminal Voltage with Respect to
GND –0.5 to
VCC +0.5 V
TSTG Storage Temperature –65 to +150 °C
IOUT DC Output Current –60 to +120 mA
2545 lnk 03
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RAT-
INGS may cause permanent damage to the device. This is a stress rating
only and functional operation of the device at these or any other conditions
above those indicated in the operational sections of this specification is
not
implied. Exposure to absolute maximum rating conditions for
extended periods may affect reliability.
2. All device terminals except FCT162XXXT and FCT166XXXT (A-Port)
Output and I/O terminals.
3. Output and I/O terminals for FCT162XXXT and FCT166XXXT (A-Port).
5.3 4
IDT54/74FCT16245T/AT/CT/ET, 162245T/AT/CT/ET, IDT54/74FCT166245T/AT/CT, IDT54/74FCT162H245T/AT/CT/ET
FAST CMOS 16-BIT BIDIRECTIONAL TRANSCEIVERS MILITARY AND COMMERCIAL TEMPERATURE RANGES
ADVANCE INFORMATION
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE (STANDARD PARTS)
Following Conditions Apply Unless Otherwise Specified:
Commercial: TA =–40°C to +85°C, VCC = 5.0V ± 10%; Military: TA = –55°C to +125°C, VCC = 5.0V ± 10%
Symbol Parameter Test Conditions
(1)
Min. Typ.
(2)
Max.
Unit
I
ODL
Output LOW Current V
CC
= 5V, V
IN
= V
IH
or
V
IL,
V
OUT
= 1.5V
(3)
60 115 200 mA
I
ODH
Output HIGH Current V
CC
= 5V, V
IN
= V
IH
or V
IL,
V
OUT
= 1.5V
(3)
–60 –115 –200 mA
V
OH
Output HIGH Voltage V
CC
= Min.
V
IN
= V
IH
or V
IL
I
OH
= –16mA MIL.
I
OH
= –24mA COM'L. 2.4 3.3 V
V
OL
Output LOW Voltage V
CC
= Min.
V
IN
= V
IH
or V
IL
I
OL
= 16mA MIL.
I
OL
= 24mA COM'L. 0.3 0.55 V
OUTPUT DRIVE CHARACTERISTICS FOR FCT162245T
OUTPUT DRIVE CHARACTERISTICS FOR FCT166245T (A-PORT ONLY)
Symbol Parameter Test Conditions
(1)
Min. Typ.
(2)
Max.
Unit
I
ODL
Output LOW Current V
CC
= 5V, V
IN
= V
IH
or
V
IL,
V
OUT
= 1.5V
(3)
16 48 96 mA
I
ODH
Output HIGH Current V
CC
= 5V, V
IN
= V
IH
or V
IL,
V
OUT
= 1.5V
(3)
–16 –48 –96 mA
V
OH
Output HIGH Voltage V
CC
= Min.
V
IN
= V
IH
or
V
IL
I
OH
= –6mA MIL.
I
OH
= –8mA COM'L. 2.4 3.3 V
V
OL
Output LOW Voltage V
CC
= Min.
V
IN
= V
IH
or V
IL
I
OL
= 6mA MIL.
I
OL
= 8mA COM'L. 0.3 0.55 V
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at Vcc = 5.0V, +25°C ambient.
3. Not more than one output should be tested at one time. Duration of the test should not exceed one second.
4. Duration of the condition can not exceed one second.
5. The test limit for this parameter is ± 5µA at TA = –55°C.
2545 lnk 08
2545 lnk 07
Symbol Parameter Test Conditions(1) Min. Typ.(2) Max. Unit
VIH Input HIGH Level Guaranteed Logic HIGH Level 2.0 V
VIL Input LOW Level Guaranteed Logic LOW Level 0.8 V
II H Input HIGH Current (Input pins)(5) VCC = Max. VI = VCC ±1µA
Input HIGH Current (I/O pins)(5) ±1
II L Input LOW Current (Input pins)(5) VI = GND ±1
Input LOW Current (I/O pins)(5) ±1
IOZH High Impedance Output Current VCC = Max. VO = 2.7V ±1µA
IOZL (3-State Output pins)(5) VO = 0.5V ±1
VIK Clamp Diode Voltage VCC = Min., IIN = –18mA 0.7 1.2 V
IOS Short Circuit Current VCC = Max., VO = GND(3) –80 140 225 mA
VHInput Hysteresis 100 mV
ICCL
ICCH
ICCZ
Quiescent Power Supply Current VCC = Max., VIN = GND or VCC 5 500 µA
2545 lnk 05
OUTPUT DRIVE CHARACTERISTICS FOR FCT16245T AND FCT166245T (B-PORT)
Symbol Parameter Test Conditions(1) Min. Typ.(2) Max. Unit
IOOutput Drive Current VCC = Max., VO = 2.5V(3) –50 —–180 mA
VOH Output HIGH Voltage VCC = Min. IOH = –3mA 2.5 3.5 V
VIN = VIH or VIL IOH = –12mA MIL.
IOH = –15mA COM'L. 2.4 3.5 V
IOH = –24mA MIL.
IOH = –32mA COM'L.(4) 2.0 3.0 V
VOL Output LOW Voltage VCC = Min.
VIN = VIH or VIL IOL = 48mA MIL.
IOL = 64mA COM'L. 0.2 0.55 V
IOFF Input/Output Power Off Leakage(5) VCC = 0V, VIN or VO 4.5V ±1µA
2545 lnk 06
5.3 5
IDT54/74FCT16245T/AT/CT/ET, 162245T/AT/CT/ET, IDT54/74FCT166245T/AT/CT, IDT54/74FCT162H245T/AT/CT/ET
FAST CMOS 16-BIT BIDIRECTIONAL TRANSCEIVERS MILITARY AND COMMERCIAL TEMPERATURE RANGES
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE (BUS HOLD)
Following Conditions Apply Unless Otherwise Specified:
Commercial: TA =–40°C to +85°C, VCC = 5.0V ± 10%; Military: TA = –55°C to +125°C, VCC = 5.0V ± 10%
Symbol Parameter Test Conditions
(1)
Min. Typ.
(2)
Max. Unit
V
IH
Input HIGH Level Guaranteed Logic HIGH Level 2.0
V
V
IL
Input LOW Level Guaranteed Logic LOW Level 0.8 V
I
I H
Input Standard Input
(5)
V
CC
= Max. V
I
= V
CC
——
±
1
µ
A
HIGH Standard I/O
(5)
——
±
1
Current
(4)
Bus Hold Input
±
100
Bus Hold I/O
±
100
I
I L
Input Standard Input
(5)
V
I
= GND
±
1
LOW Standard I/O
(5)
——
±
1
Current
(4)
Bus Hold Input
±
100
Bus Hold I/O
±
100
I
BHH
Bus Hold Bus Hold Input V
CC
= Min. V
I
= 2.0V –50
µ
A
I
BHL
Sustain
Current
(4)
V
I
= 0.8V +50
I
OZH
High Impedance Output Current V
CC
= Max. V
O
= 2.7V
±
1
µ
A
I
OZL
(3-State Output pins)
(5,6)
V
O
= 0.5V
±
1
V
IK
Clamp Diode Voltage V
CC
= Min., I
IN
= –18mA
0.7
1.2 V
I
OS
Short Circuit Current V
CC
= Max., V
O
= GND
(3)
–80
140
225 mA
V
H
Input Hysteresis
100
mV
I
CCL
I
CCH
I
CCZ
Quiescent Power Supply Current V
CC
= Max., V
IN
= GND or V
CC
5 500
µ
A
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at Vcc = 5.0V, +25°C ambient.
3. Not more than one output should be tested at one time. Duration of the test should not exceed one second.
4. Pins with Bus Hold are identified in the pin description.
5. The test limit for this parameter is ± 5µA at TA = –55°C.
6. Does not include Bus Hold I/O pins.
2545 lnk 09
5.3 6
IDT54/74FCT16245T/AT/CT/ET, 162245T/AT/CT/ET, IDT54/74FCT166245T/AT/CT, IDT54/74FCT162H245T/AT/CT/ET
FAST CMOS 16-BIT BIDIRECTIONAL TRANSCEIVERS MILITARY AND COMMERCIAL TEMPERATURE RANGES
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VCC = 5.0V, +25°C ambient.
3. Per TTL driven input (VIN = 3.4V). All other inputs at VCC or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.
5. Values for these conditions are examples of the ICC formula. These limits are guaranteed but not tested.
6. IC = IQUIESCENT + IINPUTS + IDYNAMIC
IC = ICC + ICC DHNT + ICCD (fCPNCP/2 + fiNi)
ICC = Quiescent Current (ICCL, ICCH and ICCZ)
ICC = Power Supply Current for a TTL High Input (VIN = 3.4V)
DH = Duty Cycle for TTL Inputs High
NT = Number of TTL Inputs at DH
ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL)
fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices)
NCP = Number of Clock Inputs at fCP
fi = Input Frequency
Ni = Number of Inputs at fi
POWER SUPPLY CHARACTERISTICS
Symbol Parameter Test Conditions(1) Min. Typ.(2) Max. Unit
ICC Quiescent Power Supply Current Vcc = Max. 0.5 1.5 mA
TTL Inputs HIGH VIN = 3.4V(3)
ICCD Dynamic Power Supply Current(4) Vcc = Max. VIN = VCC 60 100 µA/
Outputs Open VIN = GND MHz
x
OE
= xDIR = GND
One Input Toggling
50% Duty Cycle
ICTotal Power Supply Current(6) Vcc = Max. VIN = VCC 0.6 1.5 mA
Outputs Open VIN = GND
fi = 10MHz
50% Duty Cycle VIN = 3.4V 0.9 2.3
x
OE
= xDIR = GND VIN = GND
One Bit Toggling
Vcc = Max. V IN = VCC 2.4 4.5(5)
Outputs Open VIN = GND
fi = 2.5MHz
50% Duty Cycle VIN = 3.4V 6.4 16.5(5)
x
OE
= xDIR = GND VIN = GND
Sixteen Bits Toggling 2545 tbl 10
5.3 7
IDT54/74FCT16245T/AT/CT/ET, 162245T/AT/CT/ET, IDT54/74FCT166245T/AT/CT, IDT54/74FCT162H245T/AT/CT/ET
FAST CMOS 16-BIT BIDIRECTIONAL TRANSCEIVERS MILITARY AND COMMERCIAL TEMPERATURE RANGES
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
2545 tbl 11
2545 tbl 12
FCT16245T/162245T(5) FCT16245AT/162245AT(5)
Com'l. Mil. Com'l. Mil.
Symbol Parameter Condition(1) Min.(2) Max. Min.(2) Max. Min.(2) Max. Min.(2) Max. Unit
tPLH
tPHL Propagation Delay
A to B, B to A CL = 50pF
RL = 5001.5 7.0 1.5 7.5 1.5 4.6 1.5 4.9 ns
tPZH
tPZL Output Enable Time
x
OE
to A or B 1.5 9.5 1.5 10.0 1.5 6.2 1.5 6.5 ns
tPHZ
tPLZ Output Disable Time
x
OE
to A or B 1.5 7.5 1.5 10.0 1.5 5.0 1.5 6.0 ns
tPZH
tPZL Output Enable Time
xDIR to A or B(4) 1.5 9.5 1.5 10.0 1.5 6.2 1.5 6.5 ns
tPHZ
tPLZ Output Disable Time
xDIR to A or B(4) 1.5 7.5 1.5 10.0 1.5 5.0 1.5 6.0 ns
tSK(o) Output Skew(3) 0.5 0.5 0.5 0.5 ns
FCT16245CT/162245CT(5) FCT16245ET/162245ET(5)
Com'l. Mil. Com'l. Mil.
Symbol Parameter Condition(1) Min.(2) Max. Min.(2) Max. Min.(2) Max. Min.(2) Max. Unit
tPLH
tPHL Propagation Delay
A to B, B to A CL = 50pF
RL = 5001.5 4.1 1.5 4.5 1.5 3.2 ns
tPZH
tPZL Output Enable Time
x
OE
to A or B 1.5 5.8 1.5 6.2 1.5 4.4 ns
tPHZ
tPLZ Output Disable Time
x
OE
to A or B 1.5 4.8 1.5 5.2 1.5 4.0 ns
tPZH
tPZL Output Enable Time
xDIR to A or B(4) 1.5 5.8 1.5 6.2 1.5 4.8 ns
tPHZ
tPLZ Output Disable Time
xDIR to A or B(4) 1.5 4.8 1.5 5.2 1.5 4.0 ns
tSK(o) Output Skew(3) 0.5 0.5 0.5 ns
NOTES:
1. See test circuit and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. Skew between any two outputs of the same package switching in the same direction. This parameter is guaranteed by design.
4. This parameter is guaranteed but not tested.
5. Including parts with Bus Hold.
5.3 8
IDT54/74FCT16245T/AT/CT/ET, 162245T/AT/CT/ET, IDT54/74FCT166245T/AT/CT, IDT54/74FCT162H245T/AT/CT/ET
FAST CMOS 16-BIT BIDIRECTIONAL TRANSCEIVERS MILITARY AND COMMERCIAL TEMPERATURE RANGES
ADVANCE INFORMATION
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
2545 tbl 13
FCT166245T FCT166245AT FCT166245CT
Com'l. Mil. Com'l. Mil. Com'l. Mil.
Symbol Parameter Condition(1) Min.(2) Max. Min.(2) Max. Min.(2) Max. Min.(2) Max. Min.(2) Max. Min.(2) Max. Unit
tPLH
tPHL Propagation Delay
A to B CL = 50pF
RL = 5001.5 4.6 1.5 4.9 1.5 4.1 1.5 4.5 ns
tPLH
tPHL Propagation Delay
B to A 1.5 7.0 1.5 7.5 1.5 4.6 1.5 4.9 ns
tPZH
tPZL Output Enable Time
x
OE
to B 1.5 6.2 1.5 6.5 1.5 5.8 1.5 6.2 ns
tPZH
tPZL Output Enable Time
x
OE
to A 1.5 9.5 1.5 10.0 1.5 6.2 1.5 6.5 ns
tPHZ
tPLZ Output Disable Time
x
OE
to B 1.5 5.0 1.5 6.0 1.5 4.8 1.5 5.2 ns
tPHZ
tPLZ Output Disable Time
x
OE
to A 1.5 7.5 1.5 10.0 1.5 5.0 1.5 6.0 ns
tPZH
tPZL Output Enable Time
xDIR to B(4) 1.5 6.2 1.5 6.5 1.5 5.8 1.5 6.2 ns
tPZH
tPZL Output Enable Time
xDIR to A(4) 1.5 9.5 1.5 10.0 1.5 6.2 1.5 6.5 ns
tPHZ
tPLZ Output Disable Time
xDIR to B(4) 1.5 5.0 1.5 6.0 1.5 4.8 1.5 5.2 ns
tPHZ
tPLZ Output Disable Time
xDIR to A(4) 1.5 7.5 1.5 10.0 1.5 5.0 1.5 6.0 ns
tSK(o) Output Skew(3) 0.5 0.5 0.5 0.5 ns
NOTES:
1. See test circuit and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. Skew between any two outputs of the same package switching in the same direction. This parameter is guaranteed by design.
4. This parameter is guaranteed but not tested.
5.3 9
IDT54/74FCT16245T/AT/CT/ET, 162245T/AT/CT/ET, IDT54/74FCT166245T/AT/CT, IDT54/74FCT162H245T/AT/CT/ET
FAST CMOS 16-BIT BIDIRECTIONAL TRANSCEIVERS MILITARY AND COMMERCIAL TEMPERATURE RANGES
DEFINITIONS:
CL= Load capacitance: includes jig and probe capacitance.
RT =Termination resistance: should be equal to ZOUT of the Pulse
Generator.
Pulse
Generator
R
T
D.U.T.
V
CC
V
IN
C
L
V
OUT
50pF 500
500
7.0V
3V
1.5V
0V
3V
1.5V
0V
3V
1.5V
0V
3V
1.5V
0V
DATA
INPUT
TIMING
INPUT
ASYNCHRONOUS CONTROL
PRESET
CLEAR
ETC.
SYNCHRONOUS CONTROL
t
SU
t
H
t
REM
t
SU
t
H
HIGH-LOW-HIGH
PULSE
LOW-HIGH-LOW
PULSE
t
W
1.5V
1.5V
SAME PHASE
INPUT TRANSITION
3V
1.5V
0V
1.5V
V
OH
t
PLH
OUTPUT
OPPOSITE PHASE
INPUT TRANSITION
3V
1.5V
0V
t
PLH
t
PHL
t
PHL
V
OL
CONTROL
INPUT
3V
1.5V
0V
3.5V
0V
OUTPUT
NORMALLY
LOW
OUTPUT
NORMALLY
HIGH
SWITCH
CLOSED
SWITCH
OPEN
V
OL
0.3V
0.3V
t
PLZ
t
PZL
t
PZH
t
PHZ
3.5V
0V
1.5V
1.5V
ENABLE DISABLE
V
OH
PRESET
CLEAR
CLOCK ENABLE
ETC.
PROPAGATION DELAY
SET-UP, HOLD AND RELEASE TIMES PULSE WIDTH
SWITCH POSITION
TEST CIRCUITS AND WAVEFORMS
TEST CIRCUITS FOR ALL OUTPUTS
Test Switch
Disable Low
Enable Low
Closed
All Other Tests Open
Open Drain
NOTES:
1. Diagram shown for input Control Enable-LOW and input Control
Disable-HIGH
2. Pulse Generator for All Pulses: Rate 1.0MHz; tF 2.5ns; tR 2.5ns
2545 drw 09
2545 lnk 14
2545 drw 05
2545 drw 06
2545 drw 08
2545 drw 07
ENABLE AND DISABLE TIMES
5.3 10
IDT54/74FCT16245T/AT/CT/ET, 162245T/AT/CT/ET, IDT54/74FCT166245T/AT/CT, IDT54/74FCT162H245T/AT/CT/ET
FAST CMOS 16-BIT BIDIRECTIONAL TRANSCEIVERS MILITARY AND COMMERCIAL TEMPERATURE RANGES
ORDERING INFORMATION
2545 drw 10
IDT XX
Temp. Range
XXXX
Device Type
X
Package
X
Process
Blank
B
PV
PA
PF
E
245T
245AT
245CT
245ET
Commercial
MIL-STD-883, Class B
Shrink Small Outline Package (SO48-1)
Thin Shrink Small Outline Package (SO48-2)
Thin Very Small Outline Package (SO48-3)
CERPACK (E48-1)
Non-Inverting 16-Bit Bidirectional Transceiver
54
74 –55°C to +125°C
–40°C to +85°C
FCT
Blank
HStandard
Bus Hold
16
162
166
16-Bit High Drive
16-Bit Balanced Drive
16-Bit Light Drive
X
Drive X
Bus Hold