FUJITSU MICROELECTRONICS DATA SHEET DS07-12552-2E 8-bit Proprietary Microcontroller CMOS F2MC-8L MB89470 Series MB89475/P475/PV470 DESCRIPTION The MB89470 series has been developed as a general-purpose version of the F2MC*-8L family consisting of proprietary 8-bit, single-chip microcontrollers. In addition to a compact instruction set, the microcontroller contains a variety of peripheral functions such as 21bit time-base timer, watch prescaler, PWC timer, PWM timer, 8/16-bit timer/counter, external interrupt 1 (edge) , external interrupt 2 (level) , 10-bit A/D converter, UART/SIO, buzzer, watchdog timer reset. The MB89470 series is designed suitable for home appliance as well as in a wide range of applications for consumer product. * : F2MC is the abbreviation of FUJITSU Flexible Microcontroller. FEATURES * Package used QFP package, LQFP package and SH-DIP package for MB89P475, MB89475 MQFP package for MB89PV470 (Continued) For the information for microcontroller supports, see the following web site. http://edevice.fujitsu.com/micom/en-support/ Copyright(c)2003-2008 FUJITSU MICROELECTRONICS LIMITED All rights reserved 2008.9 MB89470 Series (Continued) * High-speed operating capability at low voltage * Minimum execution time : 0.32 s/12.5 MHz * F2MC-8L family CPU core Multiplication and division instructions 16-bit arithmetic operations Instruction set optimized for controllers Bit test and branch instructions Bit manipulation instructions, etc. * Six timers PWC timer (also usable as an interval timer) PWM timer 8/16-bit timer/counter x 2 21-bit timebase timer Watch prescaler * Buzzer 7 frequency types are selectable by software * External interrupts Edge detection (Selectable edge) : 4 channels Low-level interrupt (Wake-up function) : 5 channels * A/D converter (8 channels) 10-bit successive approximation type * UART/SIO Synchronous/asynchronous data transfer capable * Low-power consumption modes Stop mode (Oscillation stops to minimize the current consumption.) Sleep mode (The CPU stops to reduce the current consumption to approx. 1/3 of normal.) Subclock mode (for dual clock product) Watch mode (for dual clock product) * Watchdog timer reset * I/O ports : Max 39 channels 2 DS07-12552-2E MB89470 Series PRODUCT LINEUP Part number Parameter Classification ROM size MB89475 MB89P475 MB89PV470 Mass production products (mask ROM product) OTP Piggy-back 16 K x 8-bit (internal ROM) 16 K x 8-bit (internal PROM, can be written to by ROM programmer) 32 K x 8-bit (external ROM) 512 x 8 bits 1 K x 8 bits CPU functions Number of instructions Instruction bit length Instruction length Data bit length Minimum execution time Minimum interrupt processing time : 136 : 8 bits : 1 to 3 bytes : 1, 8, 16 bits : 0.32 s/12.5 MHz : 2.88 s/12.5 MHz Ports Output-only ports (N-channel open drain) Input-only ports I/O ports (CMOS) Total : 7 pins : 3 pins (1 pin in product with dual clock) : 29 pins : 39 pins 21-bit Time-base timer Interrupt period (0.82 ms, 3.3 ms, 26.2 ms, 419.4 ms) at 10 MHz Interrupt period (0.66 ms, 2.6 ms, 21.0 ms, 335.5 ms) at 12.5 MHz Watchdog timer Reset period (209.7 ms to 419.4 ms) at 10 MHz Reset period (167.8 ms to 335.5 ms) at 12.5 MHz Watch prescaler 17 bits Interrupt cycle : 31.25 ms, 0.25 ms, 0.5 s, 1.00 s, 2.00 s, 4.00 s/32.768 kHz for subclock Pulse width count timer 2 channels 8-bit one-shot timer operation (supports underflow output, operating clock period : 1, 4, 32 tinst*, external) 8-bit reload timer operation (supports square wave output, operating clock period : 1, 4, 32 tinst*, external) 8-bit pulse width measurement operation (supports continuous measurement, H width, L width, rising edge to rising edge, falling edge to falling edge measurement and both edge measurement) PWM timer 8-bit reload timer operation (supports square wave output, operating clock period : 1, 4, 32 tinst*, external) 8-bit resolution PWM operation 8/16-bit timer/ counter 1, 2 Can be operated either as a 2-channel 8-bit timer/counter (Timer 1 and Timer 2, each with its own independent operating clock cycle) , or as one 16-bit timer/counter In Timer 1 or 16-bit timer/counter operation, event counter operation (external clock-triggered) and square wave output capable 8/16-bit timer/ counter 3, 4 Can be operated either as a 2-channel 8-bit timer/counter (Timer 3 and Timer 4, each with its own independent operating clock cycle) , or as one 16-bit timer/counter In Timer 3 or 16-bit timer/counter operation, event counter operation (external clock-triggered) and square wave output capable External interrupt 4 independent channels (selectable edge, interrupt vector, request flag) 5 channels (low level interrupt) RAM size (Continued) DS07-12552-2E 3 MB89470 Series (Continued) Part number Parameter MB89475 MB89P475 MB89PV470 A/D converter 10-bit resolution x 8 channels A/D conversion function (conversion time : 60 tinst*) Supports repeated activation by internal clock. UART/SIO Synchronous/asynchronous data transfer capable (Max baud rate : 78.125 Kbps at 10 MHz) (7 and 8 bits with parity bit ; 8 and 9 bits without parity bit) Buzzer output 7 frequency types (FCH/212, FCH/211, FCH/210, FCH/29, FCL/25, FCL/24, FCL/23) are selectable by software. Standby mode Sleep mode, stop mode, subclock mode (dual clock product) and watch mode (dual clock product) Process CMOS Operating Voltage 2.2 V to 5.5 V 3.5 V to 5.5 V 2.7 V to 5.5 V * : tinst is one instruction cycle (execution time) , which can be selected as 1/4, 1/8, 1/16, or 1/64 of main clock. PACKAGE AND CORRESPONDING PRODUCTS Part number MB89475 MB89P475 MB89PV470 DIP-48P-M01 O O X FPT-48P-M26 O O X FPT-48P-M13 O O X MQP-48C-P01 X X O Package O : Available X : Not available DIFFERENCES AMONG PRODUCTS 1. Memory Size Before evaluating using the piggyback product, verify its differences from the product that will actually be used. Take particular care on the following point : * The stack area, etc., is set at the upper limit of the RAM. 2. Current Consumption * For the MB89PV470, add the current consumed by the EPROM mounted in the piggy-back socket. * When operating at low speed, the current consumed by the one-time PROM product is greater than that for the mask ROM product. However, the current consumption are roughly the same in sleep or stop mode. * For more information, see " ELECTRICAL CHARACTERISTICS". 3. Oscillation stabilization time after power-on reset * * * * 4 For MB89PV470, there is no power-on stabilization time after power-on reset. For MB89P475, there is power-on stabilization time after power-on reset. For MB89475, the power-on stabilization time can be select. For more information, refer to " MASK OPTIONS". DS07-12552-2E MB89470 Series PIN ASSIGNMENTS (TOP VIEW) VSS C*1 P40/X0A P41/X1A P17/TO2 P16/EC2 P15/TO1 P14/EC1 P13/INT13 P12/INT12 P11/INT11 P10/INT10 P07/AN7 P06/AN6 P05/AN5 P04/AN4 P03/AN3 P02/AN2 P01/AN1 P00/AN0 AVSS AVCC P54/INT24 P53/INT23 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 X1 X0 MODE P42 RST P20/SCK1 P21/SO1 P22/SI1 P23/PWC P24/PWM P25/SI2 VCC P26/SO2 P27/SCK2 P30/BUZ*2 P31*2 P32*2 P33*2 P34*2 P35*2 P36*2 P50/INT20 P51/INT21 P52/INT22 (DIP-48P-M01) *1 : For pin no. 2, connect this pin to an external 0.1 F capacitor to ground (for MB89P475 only) . For MB89PV470 and MB89475, this pin should be left unconnected. *2 : High current drive type (Continued) DS07-12552-2E 5 MB89470 Series 48 47 46 45 44 43 42 41 40 39 38 37 P34*2 P35*2 P36*2 P50/INT20 P51/INT21 P52/INT22 P53/INT23 P54/INT24 AVCC AVSS P00/AN0 P01/AN1 (TOP VIEW) 1 2 3 4 5 6 7 8 9 10 11 12 36 35 34 33 32 31 30 29 28 27 26 25 P02/AN2 P03/AN3 P04/AN4 P05/AN5 P06/AN6 P07/AN7 P10/INT10 P11/INT11 P12/INT12 P13/INT13 P14/EC1 P15/TO1 P20/SCK1 RST P42 MODE X0 X1 VSS C *1 P40/X0A P41/X1A P17/TO2 P16/EC2 13 14 15 16 17 18 19 20 21 22 23 24 P33*2 P32*2 P31*2 P30/BUZ*2 P27/SCK2 P26/SO2 VCC P25/SI2 P24/PWM P23/PWC P22/SI1 P21/SO1 (FPT-48P-M26) (FPT-48P-M13) *1 : For pin no. 20, connect this pin to an external 0.1 F capacitor to ground (for MB89P475 only) . For MB89PV470 and MB89475, this pin should be left unconnected. *2 : High current drive type (Continued) 6 DS07-12552-2E MB89470 Series (Continued) *1 69 70 71 72 73 74 75 76 60 59 58 57 56 55 54 53 36 35 34 33 32 31 30 29 28 27 26 25 P02/AN2 P03/AN3 P04/AN4 P05/AN5 P06/AN6 P07/AN7 P10/INT10 P11/INT11 P12/INT12 P13/INT13 P14/EC1 P15/TO1 P20/SCK1 RST P42 MODE X0 X1 VSS C*2 P40/X0A P41/X1A P17/TO2 P16/EC2 13 14 15 16 17 18 19 20 21 22 23 24 1 2 3 4 5 6 7 8 9 10 11 12 77 78 79 80 49 50 51 52 P33*3 P32*3 P31*3 P30/BUZ*3 P27/SCK2 P26/SO2 VCC P25/SI2 P24/PWM P23/PWC P22/SI1 P21/SO1 68 67 66 65 64 63 62 61 48 47 46 45 44 43 42 41 40 39 38 37 P34*3 P35*3 P36*3 P50/INT20 P51/INT21 P52/INT22 P53/INT23 P54/INT24 AVCC AVSS P00/AN0 P01/AN1 (TOP VIEW) (MQP-48C-P01) *1 : Package upper-side pin assignment ( MB89PV470 only) Pin no. Pin name Pin no. Pin name Pin no. Pin name Pin no. Pin name 49 Vpp 57 N.C. 65 O4 73 OE 50 A12 58 A2 66 O5 74 N.C. 51 A7 59 A1 67 O6 75 A11 52 A6 60 A0 68 O7 76 A9 53 A5 61 O1 69 O8 77 A8 54 A4 62 O2 70 CE 78 A13 55 A3 63 O3 71 A10 79 A14 56 N.C. 64 Vss 72 N.C. 80 Vcc N.C. : As connected internally, do not use. *2 : Pin no. 20 should be left unconnected. *3 : High current drive type DS07-12552-2E 7 MB89470 Series PIN DESCRIPTION Pin no. LQFP/QFP/ SDIP*1 MQFP*2 17 47 Pin name I/O circuit X0 18 48 X1 16 46 MODE Function A Connection pins for a crystal or other oscillator. An external clock can be connected to X0. In this case, leave X1 open. B Input pins for setting the memory access mode. Connect directly to VSS. 14 44 RST C Reset I/O pin. The pin is a N-ch open-drain type with pull-up resistor and a hysteresis input. The pin outputs an "L" level when an internal reset request is present. Inputting an "L" level initializes internal circuits. 38 to 31 20 to 13 P00/AN0 to P07/AN7 D General-purpose I/O port. The pins are shared with the analog inputs for the A/D converter. 30 to 27 12 to 9 P10/INT10 to P13/INT13 E General-purpose I/O port. A hysteresis input for INT10 to INT13. The pin is shared with an external interrupt 1 input. 26 8 P14/EC1 E General-purpose I/O port. A hysteresis input for EC1. The pin is shared with the 8/16 bit timer 1 input. 25 7 P15/TO1 F General-purpose I/O port. The pin is shared with the output of 8/16-bit timer 1. 24 6 P16/EC2 E General-purpose I/O port. A hysteresis input for EC2. The pin is shared with the 8/16 bit timer 2 input. 23 5 P17/TO2 F General-purpose I/O port. The pin is shared with the output of 8/16-bit timer 2. 13 43 P20/SCK1 E General-purpose I/O port. A hysteresis input for SCK1. The pin is shared with the clock I/O of UART/SIO 1. 12 42 P21/SO1 F General-purpose I/O port. The pin is shared with the serial data output of UART/SIO 1. 11 41 P22/SI1 E General-purpose I/O port. A hysteresis input for SI1. The pin is shared with the serial data input of UART/SIO 1. 10 40 P23/PWC E General-purpose I/O port. A hysteresis input for PWC. This pin is shared with PWC input. 9 39 P24/PWM F General-purpose input port. This pin is shared with PWM output. 8 38 P25/SI2 E General-purpose I/O port. A hysteresis input for SI2. The pin is shared with the serial data input of UART/SIO 2. (Continued) 8 DS07-12552-2E MB89470 Series (Continued) Pin no. LQFP/QFP/ SDIP*1 MQFP*2 Pin name I/O circuit Function 6 36 P26/SO2 F General-purpose I/O port. The pin is shared with the serial data output of UART/SIO 2. 5 35 P27/SCK2 E General-purpose I/O port. A hysteresis input for SCK2. The pin is shared with the clock I/O of UART/SIO 2. 4 34 P30/BUZ G N-channel open-drain output. The pin is shared with buzzer output. 3 to 1, 48 to 46 33 to 28 P31 to P36 G N-channel open-drain output. H General-purpose input port. (single clock system) A Connection pins for a crystal or other oscillator. (dual clock system) An external clock can be connected to X0A. In this case, leave X1A open. H General-purpose input port. (single clock system) A Connection pins for a crystal or other oscillator. (dual clock system) An external clock can be connected to X0A. In this case, leave X1A open. 21 3 P40/X0A 22 4 P41/X1A 15 45 P42 H General-purpose input port. 45 to 41 27 to 23 P50/INT20 to P54/INT24 E General-purpose I/O port. A hysteresis input for INT20 to INT24. The pin is shared with an external interrupt 2 input. 20 2 C Capacitor connection pin *3 7 37 VCC Power supply pin (+5 V) . 19 1 VSS Power supply pin (GND) . 40 22 AVCC A/D converter power supply pin. 39 21 AVSS A/D converter power supply pin. Use at the same voltage level as VSS. *1 : DIP-48P-M01 *2 : FPT-48P-M26/FPT-48P-M13/MQP-48C-P01 *3 : When MB89475 or MB89PV470 is used, this pin will become a N.C. pin without internal connection. When MB89P475 is used, connect this pin to an external 0.1 F capacitor to ground. DS07-12552-2E 9 MB89470 Series * External EPROM Socket (MB89PV470 only) Pin no. Pin I/O name MQFP* Function 49 Vpp O "H" level output pin 50 51 52 53 54 55 58 59 60 A12 A7 A6 A5 A4 A3 A2 A1 A0 O Address output pins. 61 62 63 O1 O2 O3 I Data input pins. 64 VSS O Power supply pin (GND) . 65 66 67 68 69 O4 O5 O6 O7 O8 I Data input pins. 70 CE O Chip enable pin for the ROM. Outputs "H" in standby mode. 71 A10 O Address output pin. 73 OE O Output enable pin for the ROM. Always outputs "L". 75 76 77 78 79 A11 A9 A8 A13 A14 O Address output pins. 80 VCC O Power supply pin for the EPROM. 56 57 72 74 N.C. Internally connected pins. Always leave open. * : MQP-48C-P01 10 DS07-12552-2E MB89470 Series I/O CIRCUIT TYPE Type Circuit Remarks * Main and sub-clock circuits * Oscillation feedback resistance is approx. 500 k for main clock circuit and 5 M for sub-clock circuit. X1 (X1A) Nch Pch A Pch X0 (X0A) Nch Stop mode control signal * Hysteresis input * The pull-down resistor is approx. 50 k. (No pull-down resistor in MB89P475) B * The pull-up resistance (P-channel) is approx. 50 k. * Hysteresis input R Pch C Nch pull-up resistor register R Pch * CMOS output * CMOS input * Selectable pull-up resistor Approx. 50 k D Nch ADIN pull-up resistor register R Pch * CMOS output * CMOS input * Selectable pull-up resistor Approx. 50 k E Nch port resources (Continued) DS07-12552-2E 11 MB89470 Series (Continued) Type Circuit R Remarks pull-up resistor regsiter * CMOS output * CMOS input * Selectable pull-up resistor Approx. 50 k pull-up resistor register * N-channel open-drain output * Selectable pull-up resistor Approx. 50 k Pch F Nch R G Pch Nch * CMOS input H 12 port DS07-12552-2E MB89470 Series HANDLING DEVICES 1. Preventing Latchup Latchup may occur on CMOS ICs if voltage higher than VCC or lower than VSS is applied to input and output pins other than medium- to high-voltage pins or if higher than the voltage which shows on "1. Absolute Maximum Ratings" in " ELECTRICAL CHARACTERISTICS" is applied between VCC and VSS. When latchup occurs, power supply current increases rapidly and might thermally damage elements. When using, take great care not to exceed the absolute maximum ratings. Also, take care to prevent the analog power supply (AVCC) and analog input from exceeding the digital power supply (VCC) when the analog system power supply is turned on and off. 2. Treatment of Unused Input Pins Leaving unused input pins open could cause malfunctions. They should be connected to a pull-up or pull-down resistor. 3. Treatment of Power Supply Pins on Microcontrollers with A/D Converter Connect to be AVCC = VCC and AVSS = VSS even if the A/D converter is not in use. 4. Treatment of N.C. Pins Be sure to leave (internally connected) N.C. pins open. 5. Power Supply Voltage Fluctuations Although VCC power supply voltage is assured to operate within the rated range, a rapid fluctuation of the voltage could cause malfunctions, even if it occurs within the rated range. Stabilizing voltage supplied to the IC is therefore important. As stabilization guidelines, it is recommended to control power so that VCC ripple fluctuations (P-P value) will be less than 10% of the standard VCC value at the commercial frequency (50 Hz to 60 Hz) and the transient fluctuation rate will be less than 0.1 V/ms at the time of a momentary fluctuation such as when power is switched. 6. Precautions when Using an External Clock Even when an external clock is used, oscillation stabilization time is required for power-on reset (optional) and wake-up from stop mode. 7. Note to noise in the External Reset Pin (RST) If the reset pulse applied to the external reset pin (RST) does not meet the specifications, it may cause malfunctions. Use causion so that the reset pulse less than the specifications will not be fed to the external reset pin (RST). DS07-12552-2E 13 MB89470 Series PROGRAMMING OTPROM IN MB89P475 WITH SERIAL PROGRAMMER 1. Programming the OTPROM with serial programmer * All OTP products can be programmed with serial programmer. 2. Programming the OTPROM * To program the OTPROM using FUJITSU MCU programmer MB91919-001. Inquiry : Fujitsu Microelectronics Asia Pte Ltd. : TEL (65) -2810770 FAX (65) -2810220 3. Programming Adapter for OTPROM * To program the OTPROM using FUJITSU MCU programmer MB91919-001, use the programming adapter listed below. Package Compatible socket adapter DIP-48P-M01 MB91919-805+MB91919-800 FPT-48P-M26 MB91919-806+MB91919-800 FPT-48P-M13 MB91919-807+MB91919-800 Inquiry : Fujitsu Microelectronics Asia Pte Ltd. : TEL (65) -2810770 FAX (65) -2810220 4. OTPROM Content Protection For product with OTPROM content protection feature (MB89P475-102, MB89P475-202) , OTPROM content can be read using serial programmer if the OTPROM content protection mechanism is not activated. One predefined area of the OTPROM (FFFCH) is assigned to be used for preventing the read access of OTPROM content. If the protection code "00H" is written in this address (FFFCH) , the OTPROM content cannot be read by any serial programmer. Note : The program written into the OTPROM cannot be verified once the OTPROM protection code is written ("00H" in FFFCH) . It is advised to write the OTPROM protection code at last. 5. Programming Yield All bits cannot be programmed at Fujitsu shipping test to a blanked OTPROM microcomputer, due to its nature. For this reason, a programming yield of 100% cannot be assured at all times. 14 DS07-12552-2E MB89470 Series PROGRAMMING OTPROM IN MB89P475 WITH PROGRAMMER 1. Programming OTPROM with parallel programmer * Only products without protection feature (i.e. MB89P475-101 and MB89P475-201) can be programmed with parallel programmer. Product with protection feature (i.e. MB89P475-102 and MB89P475-202) cannot be programmed with parallel programmer. 2. ROM Writer Adapters and Recommended ROM Writers * The following shows ROM writer adapters and recommended ROM writers. Fujitsu Microelectronics Asia Pte Ltd. (Serial programmer) Package Applicable adapter model DIP-48P-M01 MB91919-601 FPT-48P-M26 MB91919-602 FPT-48P-M13 MB91919-603 Recommended writer MB91919-001 Inquiries : Fujitsu Microelectronics Asia Pte Ltd. : TEL (65) -2810770 Writing data to the OTPROM (1) Set the OTPROM writer for the CU50-OTP (device code : cdB6DC) . (2) Load the program data to the OTPROM writer. (3) Write data using the OTPROM writer. 3. Programming Yield All bits cannot be programmed at Fujitsu shipping test to a blanked OTPROM microcomputer, due to its nature. For this reason, a programming yield of 100% cannot be assured at all times. DS07-12552-2E 15 MB89470 Series PROGRAMMING TO THE EPROM WITH PIGGYBACK/EVALUATION DEVICE 1. EPROM for Use MBM27C256A-20TVM 2. Memory Space Memory space in each mode is diagrammed below. Address Normal operating mode Corresponding addresses on the EPROM programmer 0000H I/O 0080H RAM 0880H 8000H Not available 0000H PROM 32 KB FFFFH EPROM 32 KB 7FFFH 3. Programming to the EPROM (1) Set the EPROM programmer to the MBM27C256. (2) Load program data into the EPROM programmer at 0000H to 7FFFH. (3) Program to 0000H to 7FFFH with the EPROM programmer. 16 DS07-12552-2E MB89470 Series BLOCK DIAGRAM X0 X1 Oscillator CMOS I/O port 0 8 8 Clock Controller P40/X0A*33 P41/X1A* P42 10-bit A/D converter Sub-clock Oscillator AVCC AVSS Watch Prescaler External interrupt 1 (Level) Reset circuit (Watchdog timer) RST 21-bit Time-base timer 5 5 External interrupt 2 (Level) Internal data bus CMOS Input port 4 P50/INT20 to P54/INT24 P00/AN0 to P07/AN7 CMOS I/O port 5 1 Kbyte RAM/512 Byte RAM F2MC-8L CPU 4 4 P10/INT10 to P13/INT13 P14/EC1 P15/TO1 P16/EC2 P17/TO2 8/16-bit Timer 1, 2 8/16-bit Timer 3, 4 CMOS I/O port 1 UART/SIO 1 P20/SCK1 P21/SO1 P22/SI1 8-bit PWC P23/PWC 8-bit PWM P24/PWM UART/SIO 2 P25/SI2 P26/SO2 P27/SCK2 CMOS I/O port 2 16 Kbyte ROM Other pins MODE, VCC, VSS, C*2 P30/BUZ*1 Buzzer 6 N-ch open-drain output port 3 P31*1 to P36*1 *1 : High Current Pins *2 : Unconnected pin for MB89PV470 and MB89475 *3 : P40, P41 pins for single-clock system and X01A, X1A pins for dual-clock system DS07-12552-2E 17 MB89470 Series CPU CORE 1. Memory Space The microcontrollers of the MB89470 series offer a memory space of 64 Kbytes for storing all of I/O, data, and program areas. The I/O area is located at the lowest address. The data area is provided immediately above the I/O area. The data area can be divided into register, stack, and direct areas according to the application. The program area is located at exactly the opposite end, that is, near the highest address. Provide the tables of interrupt reset vectors and vector call instructions toward the highest address within the program area. The memory space of the MB89470 series is structured as illustrated below. Memory Map MB89475 MB89P475 0000H 0000H I/O I/O 0080H 0080H RAM 0100H Generalpurpose registers MB89PV470 0000H I/O 0080H RAM 0100H 0200H 0200H 0280H 0280H Generalpurpose registers RAM 0100H Generalpurpose registers 0200H 0480H Vacant Vacant Vacant 8000H C000H FFC0H FFFFH ROM C000H FFC0H FFFFH ROM FFC0H FFFFH External ROM (32 K) Vector table (reset, interrupt, vector call instruction) 18 DS07-12552-2E MB89470 Series 2. Registers The F2MC-8L family has two types of registers; dedicated registers in the CPU and general-purpose registers in the memory. The following registers are provided : Program counter (PC) : A 16-bit register for indicating instruction storage positions Accumulator (A) : A 16-bit temporary register for storing arithmetic operations, etc. When the instruction is an 8-bit data processing instruction, the lower byte is used. Temporary accumulator (T) : A 16-bit register which performs arithmetic operations with the accumulator. When the instruction is an 8-bit data processing instruction, the lower byte is used. Index register (IX) : A 16-bit register for index modification Extra pointer (EP) : A 16-bit pointer for indicating a memory address Stack pointer (SP) : A 16-bit register for indicating a stack area Program status (PS) : A 16-bit register for storing a register pointer, a condition code 16 bits Initial value PC FFFDH : Program counter A : Accumulator Undefined T : Temporary accumulator Undefined IX : Index register Undefined EP : Extra pointer Undefined SP : Stack pointer Undefined PS : Program status I-flag = 0, IL1, 0 = 11 Other bits are undefined. The PS can further be divided into higher 8 bits for use as a register bank pointer (RP) and the lower 8 bits for use as a condition code register (CCR) . (See the diagram below.) Structure of the Program Status Register 15 PS 14 13 12 11 RP RP DS07-12552-2E 10 9 8 Vacancy Vacancy Vacancy 7 6 H I 5 4 IL1, 0 3 2 1 0 N Z V C CCR 19 MB89470 Series The RP indicates the address of the register bank currently in use. The relationship between the pointer contents and the actual address is based on the conversion rule illustrated below. Rule for Conversion of Actual Addresses of the General-purpose Register Area Lower OP codes RP "0" Generated addresses "0" "0" "0" "0" "0" A15 A14 A13 A12 A11 A10 "0" "1" R4 A9 A8 A7 R3 A6 R2 A5 R1 A4 R0 A3 b2 b1 A2 b0 A1 A0 The CCR consists of bits indicating the results of arithmetic operations and the contents of transfer data and bits for control of CPU operations at the time of an interrupt. H-flag : I-flag : IL1, 0 : IL1 IL0 0 0 0 1 1 0 2 1 1 3 N-flag : Z-flag : V-flag : C-flag : 20 Set when a carry or a borrow from bit 3 to bit 4 occurs as a result of an arithmetic operation. Cleared otherwise. This flag is for decimal adjustment instructions. Interrupt is allowed when this flag is set to 1. Interrupt is prohibited when the flag is set to 0. Set to 0 when reset. Indicates the level of the interrupt currently allowed. Processes an interrupt only if its request level is higher than the value indicated by this bit. Interrupt level 1 High-low High Low = no interrupt Set if the MSB is set to 1 as the result of an arithmetic operation. Cleared when the bit is set to 0. Set when an arithmetic operation results in 0. Cleared otherwise. Set if the complement on 2 overflows as a result of an arithmetic operation. Reset if the overflow does not occur. Set when a carry or a borrow from bit 7 occurs as a result of an arithmetic operation. Cleared otherwise. Set to the shift-out vallue in the case of a shift instruction. DS07-12552-2E MB89470 Series The following general-purpose registers are provided : General-purpose registers : An 8-bit resister for storing data The general-purpose registers are 8 bits and located in the register banks of the memory. One bank contains eight registers. Up to a total of 32 banks can be used on the MB89470 series. The bank currently in use is indicated by the register bank pointer (RP) . Register Bank Configuration This address = 0100H + 8 x (RP) R0 R1 R2 R3 R4 R5 R6 R7 32 banks Memory area DS07-12552-2E 21 MB89470 Series I/O MAP Address Register name Register Description Read/Write Initial value 00H PDR0 Port 0 data register R/W XXXXXXXXB 01H DDR0 Port 0 data direction register W* 00000000B 02H PDR1 Port 1 data register R/W XXXXXXXXB 03H DDR1 Port 1 data direction register W* 00000000B 04H PDR2 Port 2 data register R/W 00000000B 05H (Reserved) 06H DDR2 Port 2 data direction register R/W 00000000B 07H SYCC System clock control register R/W -XXMM-00B 08H STBC Standby control register R/W 0001XXXXB 09H WDTC Watchdog timer control register W* 0---XXXXB 0AH TBTC Timebase timer control register R/W 00---000B 0BH WPCR Watch prescaler control register R/W 00--0000B 0CH PDR3 Port 3 data register R/W -1111111B 0DH PDR4 Port 4 data register R -----XXXB 0EH RSFR Reset flag register R XXXX----B 0FH BUZR Buzzer register R/W -----000B 10H PDR5 Port 5 data register R/W ---XXXXXB 11H DDR5 Port 5 data direction register R/W ---00000B 12H, 13H (Reserved) 14H T4CR Timer 4 control register R/W 000000X0B 15H T3CR Timer 3 control register R/W 000000X0B 16H T4DR Timer 4 data register R/W XXXXXXXXB 17H T3DR Timer 3 data register R/W XXXXXXXXB 18H T2CR Timer 2 control register R/W 000000X0B 19H T1CR Timer 1 control register R/W 000000X0B 1AH T2DR Timer 2 data register R/W XXXXXXXXB 1BH T1DR Timer 1 data register R/W XXXXXXXXB 1CH to 1FH (Reserved) 20H ADC1 A/D control register 1 R/W -00000X0B 21H ADC2 A/D control register 2 R/W -0000001B 22H ADDH A/D data register (Upper byte) R ------XXB 23H ADDL A/D data register (Lower byte) R XXXXXXXXB 24H ADER A/D input enable register R/W 11111111B R/W 00000000B 25H 26H (Reserved) SMC11 UART/SIO serial mode control register 11 (Continued) 22 DS07-12552-2E MB89470 Series (Continued) Address Register name Register Description Read/Write Initial value 27H SMC12 UART/SIO serial mode control register 12 R/W 00000000B 28H SSD1 UART/SIO serial status and data register 1 R 00001---B 29H SIDR1/SODR1 UART/SIO serial data register 1 R/W * XXXXXXXXB 2AH SRC1 UART/SIO serial rate control register 1 R/W XXXXXXXXB 2BH SMC21 UART serial mode control register 21 R/W 00000000B 2CH SMC22 UART serial mode control register 22 R/W 00000000B 2DH SSD2 UART serial status and data register 2 R 00001---B 2EH SIDR2/SODR2 UART serial data register 2 R/W * XXXXXXXXB 2FH SRC2 UART serial rate control register 2 R/W XXXXXXXXB 30H EIC1 External interrupt 1 control register 1 R/W 00000000B 31H EIC2 External interrupt 1 control register 2 R/W 00000000B 32H EIE2 External interrupt 2 enable register R/W ---00000B 33H EIF2 External interrupt 2 flag register R/W -------0B 34H PCR1 PWC control register 1 R/W 0-0--000B 35H PCR2 PWC control register 2 R/W 00000000B 36H PLBR PWC reload buffer register R/W XXXXXXXXB 37H (Reserved) 38H CNTR PWM timer control register R/W 0-00000000B 39H COMR PWM timer compare register W* XXXXXXXXB 3AH to 6FH (Reserved) 70H PURC0 Port 0 pull up resistor control register R/W 11111111B 71H PURC1 Port 1 pull up resistor control register R/W 11111111B 72H PURC2 Port 2 pull up resistor control register R/W 11111111B 73H PURC3 Port 3 pull up resistor control register R/W -1111111B R/W ---1111B 74H 75H (Reserved) PURC5 Port 5 pull up resistor control register 76H to 7AH (Reserved) 7BH ILR1 Interrupt level setting register 1 W* 11111111B 7CH ILR2 Interrupt level setting register 2 W* 11111111B 7DH ILR3 Interrupt level setting register 3 W* 11111111B 7EH ILR4 Interrupt level setting register 4 W* 11111111B 7FH (Reserved) * : Bit manipulation instruction cannot be used. DS07-12552-2E 23 MB89470 Series * Read/write access symbols R/W : Readable and writable R : Read-only W : Write-only * Initial value symbols 0 : The initial value of this bit is "0". 1 : The initial value of this bit is "1". X : The initial value of this bit is undefined. : Unused bit. M : The initial value of this bit is determined by mask option. 24 DS07-12552-2E MB89470 Series ELECTRICAL CHARACTERISTICS 1. Absolute Maximum Ratings (AVSS = VSS = 0.0 V) Parameter Symbol Value Unit Min Max VCC AVCC VSS - 0.3 VSS + 6.0 V Input voltage VI VSS - 0.3 VCC + 0.3 V Output voltage VO VSS - 0.3 VCC + 0.3 V "L" level maximum output current IOL 15 mA Power supply voltage Remarks AVCC must not exceed VCC IOLAV1 4 mA Average value (operating current x operating rate) P00 to P07, P10 to P17, P20 to P27, P50 to P54, RST IOLAV2 12 mA Average value (operating current x operating rate) P30 to P36 IOL 100 mA IOLAV 40 mA IOH -15 mA "H" level average output current IOHAV -2 mA "H" level total maximum output current IOH -50 mA IOHAV -20 mA Power consumption PD 300 mW Operating temperature TA -40 +85 C Tstg -55 +150 C "L" level average output current "L" level total maximum output current "L" level total average output current "H" level maximum output current "H" level total average output current Storage temperature Average value (operating current x operating rate) Average value (operating current x operating rate) Average value (operating current x operating rate) WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current, temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings. DS07-12552-2E 25 MB89470 Series 2. Recommended Operating Conditions (AVSS = VSS = 0.0 V) Parameter Power supply voltage Operating temperature Symbol VCC AVCC TA Value Unit Remarks Min Max 2.2* 5.5 V Operation assurance range MB89475 3.5* 5.5 V Operation assurance range MB89P475 2.7* 5.5 V Operation assurance range MB89PV470 1.5 5.5 V Retains the RAM state in stop mode -40 +85 C * : These values depend on the operating conditions and the analog assurance range. See "Operating Voltage vs. Main Clock Operating Frequency" and "5. A/D Converter Electrical Characteristics." 26 DS07-12552-2E ;; MB89470 Series * Operating Voltage vs. Main Clock Operating Frequency Operating Voltage (V) 5.5 5.0 Analog accuracy assurance range : VCC = AVCC = 4.5 V to 5.5 V 4.5 4.0 3.5 3.0 2.7 2.2 2.0 1.0 4.0 Note : 2.0 3.0 4.0 5.0 6.0 7.0 8.0 9.0 10.0 11.0 12.0 12.5 2.0 1.33 1.0 0.8 0.66 0.57 0.50 0.44 0.4 0.36 This area is not assured for MB89P475. This area is not assured for MB89PV470 and MB89P475. 0.33 0.32 Main clock operating Freq. (MHz) Min execution time (inst. cycle) (s) "Operating Voltage vs. Main Clock Operating Frequency" indicates the operating frequency of the external oscillator at an instruction cycle of 4/FCH. Since the operating voltage range is dependent on the instruction cycle, see minimum execution time if the operating speed is switched using a gear. WARNING: The recommended operating conditions are required in order to ensure the normal operation of the semiconductor device. All of the device's electrical characteristics are warranted when the device is operated within these ranges. Always use semiconductor devices within their recommended operating condition ranges. Operation outside these ranges may adversely affect reliability and could result in device failure. No warranty is made with respect to uses, operating conditions, or combinations not represented on the data sheet. Users considering application outside the listed conditions are advised to contact their representatives beforehand. DS07-12552-2E 27 MB89470 Series 3. DC Characteristics (AVCC = VCC = 5.0 V, AVSS = VSS = 0.0 V, TA = -40 C to +85 C) Parameter Symbol Pin Condition Value Min Typ Max Unit VIH P00 to P07, P10 to P17, P20 to P27, P40 to P42, P50 to P54 0.7 VCC VCC + 0.3 V VIHS RST, MODE, EC1, EC2, SCK1, SI1, SCK2, SI2, PWC, INT10 to INT13, INT20 to INT24 0.8 VCC VCC + 0.3 V VIL P00 to P07, P10 to P17, P20 to P27, P40 to P42, P50 to P54 VSS - 0.3 0.3 VCC V VILS RST, MODE, EC1, EC2, SCK1, SI1, SCK2, SI2, PWC, INT10 to INT13, INT20 to INT24 VSS - 0.3 0.2 VCC V VD P30 to P36 VSS - 0.3 VCC + 0.3 V VOH P00 to P07, P10 to P17, P20 to P27, P50 to P54 IOH = -2.0 mA 4.0 V VOL1 P00 to P07, P10 to P17, P20 to P27, P50 to P54, RST IOL = 4.0 mA 0.4 V VOL2 P30 to P36 IOL = 12.0 mA 0.4 V Input leakage current ILI P00 to P07, P10 to P17, P20 to P27, P50 to P54 0.45 V < VI < VCC -5 +5 A Open drain output leakage current ILOD P30 to P36 0.45 V < VI < VCC -5 +5 A "H" level input voltage "L" level input voltage Open-drain output pin application voltage "H" level output voltage "L" level output voltage Remarks Without pull-up resistor (Continued) 28 DS07-12552-2E MB89470 Series (Continued) (AVCC = VCC = 5.0 V, AVSS = VSS = 0.0 V, TA = -40 C to +85 C) Parameter Symbol Pull-down resistance Pull-up resistance Pin RDOWN MODE RPULL P00 to P07, P10 to P17, P20 to P27, P30 to P36, P50 to P54, RST Typ Max 25 50 100 Unit Remarks k Except MB89P475 When pull-up resistor is selected (except RST) 50 100 k ICC1 FCH = 12.5 MHz tinst = 0.32 s Main clock run mode 7 13 mA ICC2 FCH = 12.5 MHz tinst = 5.12 s Main clock run mode 1 3 mA ICCS1 FCH = 12.5 MHz tinst = 0.32 s Main clock sleep mode 2.5 5 mA ICCS2 FCH = 12.5 MHz tinst = 5.12 s Main clock sleep mode 0.7 2 mA 37 85 A MB89PV470 MB89475 350 785 A MB89P475 11 30 A 1.4 15 A MB89PV470 MB89475 5.6 21 A MB89P475 1 10 A FCL = 32.768 kHz Subclock mode ICCL ICCLS FCL = 32.768 kHz Subclock sleep mode ICCT FCL = 32.768 kHz Watch mode Main clock stop mode IA Ta = +25 C Subclock stop mode AVcc IAH DS07-12552-2E Min 25 ICCH Input capacitance VI = VCC Value VI = 0.0 V VCC Power supply current Condition CIN Other than VCC, VSS, AVCC, AVSS FCH = 12.5 MHz 2.8 6 mA A/D converting Ta = +25 C 1 5 A A/D stop f = 1 MHz 5 15 pF 29 MB89470 Series 4. AC Characteristics (1) Reset Timing (VCC = 5.0 V, AVSS = VSS = 0.0 V, TA = -40 C to +85 C) Parameter Symbol Condition tZLZH RST "L" pulse width Value Min Max 48 tHCYL Unit Remarks ns Notes : * tHCYL is the oscillation cycle (1/FC) to input to the X0 pin. * If the reset pulse applied to the external reset pin (RST) does not meet the specifications, it may cause malfunctions. Use caution so that the reset pulse less than the specifications will not be fed to the external reset pin (RST). tZLZH RST 0.2 VCC 0.2 VCC (2) Power-on Reset (AVSS = VSS = 0.0 V, TA = -40 C to +85 C) Parameter Symbol Power supply rising time tR Power supply cut-off time tOFF Condition Value Unit Min Max 50 ms 1 ms Remarks Due to repeated operations Note : Make sure that power supply rises within the selected oscillation stabilization time. Rapid changes in power supply voltage may cause a power-on reset. If power supply voltage needs to be varied in the course of operation, a smooth voltage rise is recommended. tR tOFF 3.5 V VCC 30 0.2 V 0.2 V 0.2 V DS07-12552-2E MB89470 Series (3) Clock Timing (AVSS = VSS = 0.0 V, TA = -40 C to +85 C) Parameter Symbol Pin FCH Input clock pulse width Unit Min Typ Max X0, X1 1 12.5 MHz FCL X0A, X1A 32.768 kHz tHCYL X0, X1 80 1000 ns tLCYL X0A, X1A 30.5 s PWH PWL X0 20 ns PWHL PWLL X0A 15.2 s tCR tCF X0, X0A 10 ns Clock frequency Clock cycle time Value Input clock rising/falling time Remarks External clock X0 and X1 Timing and Conditions tHCYL PWH PWL tCR X0 tCF 0.8 VCC 0.8 VCC 0.2 VCC 0.2 VCC 0.2 VCC Main Clock Conditions When a crystal or ceramic oscillator is used X0 When an external clock is used X0 X1 X1 FCH Open FCH C1 DS07-12552-2E C2 31 MB89470 Series Subclock Timing and Conditions tLCYL 0.8 VCC X0A 0.2 VCC PWHL PWLL tCR tCF Subclock Conditions When a crystal or ceramic oscillator is used X0A When an external clock is used When sub-clock is not used in dual clock product X0A X1A FCL X1A Rd X0A Open Open FCL C0 X1A C1 (4) Instruction Cycle Parameter Instruction cycle (minimum execution time) 32 Symbol Value Unit Remarks 4/FCH, 8/FCH, 16/FCH, 64/FCH s (4/FCH) tinst = 0.32 s when operating at FCH = 12.5 MHz 2/FCL s tinst = 61.036 s when operating at FCL = 32.768 kHz tinst DS07-12552-2E MB89470 Series (5) Serial I/O Timing (VCC = 5.0 V, AVSS = VSS = 0.0 V, TA = -40 C to +85 C) Symbol Parameter Pin Condition Serial clock cycle time tSCYC SCK1, SCK2 SCK SO time tSLOV SCK1, SO1, SCK2, SO2 Valid SI SCK tIVSH SI1, SCK1, SI2, SCK2 SCK valid SI hold time tSHIX SCK1, SI1, SCK2, SI2 Serial clock "H" pulse width tSHSL Serial clock "L" pulse width tSLSH SCK SO time tSLOV SCK1, SO1, SCK2, SO2 Valid SI SCK tIVSH SI1, SCK1, SI2, SCK2 SCK valid SI hold time tSHIX SCK1, SI1, SCK2, SI2 Internal shift clock mode SCK1, SCK2 External shift clock mode Value Unit Min Max 2 tinst* s -200 +200 ns 1/2 tinst* ns 1/2 tinst* ns 1 tinst* s 1 tinst* s 0 200 ns 1/2 tinst* ns 1/2 tinst* ns * : For information on tinst, see " (4) Instruction Cycle." Internal Clock Operation tSCYC 2.4 V SCK1, SCK2 0.8 V 0.8 V tSLOV 2.4 V SO1, SO2 0.8 V tIVSH SI1, SI2 tSHIX 0.8 VCC 0.8 VCC 0.2 VCC 0.2 VCC External Clock Operation tSLSH tSHSL 0.8 VCC SCK1, SCK2 0.2 VCC 0.8 VCC 0.2 VCC tSLOV SO1, SO2 2.4 V 0.8 V tIVSH SI1, SI2 DS07-12552-2E tSHIX 0.8 VCC 0.8 VCC 0.2 VCC 0.2 VCC 33 MB89470 Series (6) Peripheral Input Timing (AVCC = VCC = 5.0 V, AVSS = VSS = 0.0 V, TA = -40 C to +85 C) Parameter Symbol Peripheral input "H" pulse width 1 tILIH1 Peripheral input "L" pulse width 1 tIHIL1 Value Pin INT10 to INT13, INT20 to INT24, EC1, EC2, PWC Unit Min Max 2 tinst* s 2 tinst* s Remarks * : For information on tinst, see " (4) Instruction Cycle." t IHIL1 INT10 to INT13, INT20 to INT24, EC1, EC2, PWC 34 t ILIH1 0.8 VCC 0.2 VCC 0.8 VCC 0.2 VCC DS07-12552-2E MB89470 Series 5. A/D Converter Electrical Characteristics (1) A/D Converter Electrical Characteristics (AVCC = VCC = 4.5 V to 5.5 V, AVSS = VSS = 0.0 V, TA = -40 C to +85 C) Parameter Symbol Pin Resolution Total error Linearity error Differential linearity error Value Unit Min Typ Max 10 bit 4.0 LSB 2.5 LSB 1.9 LSB Zero transition voltage VOT AVSS - 1.5 LSB AVSS + 0.5 LSB AVSS + 2.5 LSB V Full-scale transition voltage VFST AVCC - 4.5 LSB AVCC - 2.5 LSB AVCC - 0.5 LSB V A/D mode conversion time 60 tinst* s Analog port input current IAIN 10 A Analog input voltage VAIN AVSS AVCC V AN0 to AN7 Remarks * : For information on tinst, see " (4) Instruction Cycle" in "4. AC Characteristics". (2) A/D Converter Glossary * Resolution Analog changes that are identifiable with the A/D converter When the number of bits is 10, analog voltage can be divided into 210 = 1024. * Linearity error (unit : LSB) The deviation of the straight line connecting the zero transition point ("00 0000 0000" "00 0000 0001") with the full-scale transition point ("11 1111 1111" "11 1111 1110") from actual conversion characteristics. * Differential linearity error (unit : LSB) The deviation of input voltage needed to change the output code by 1 LSB from the theoretical value. * Total error (unit : LSB) The difference between theoretical and actual conversion values. DS07-12552-2E 35 MB89470 Series Theoretical I/O characteristics Total error VFST 3FF 3FF 3FE 1.5 LSB 3FD Digital output Digital output 3FD 004 003 Actual conversion value 3FE VOT 002 {1 LSB x N + VOT} 004 VNT Actual conversion value Theoretical value 003 002 1 LSB 001 001 0.5 LSB AVSS AVCC 1 LSB = VFST - VOT 1022 AVCC AVSS Analog input Analog input Total error = (V) Zero transition error VNT - {1 LSB x N + 0.5 LSB} 1 LSB Full-scale transition error 004 Theoretical value Actual conversion value 3FF Actual conversion value Digital output Digital output 003 002 Actual conversion value 3FE VFST (Actual measurement) 3FD 001 Actual conversion value VOT (Actual measurement) AVSS AVCC Analog input 3FC AVCC AVSS Analog input (Continued) 36 DS07-12552-2E MB89470 Series (Continued) Differential linearity error Linearity error 3FF 3FE Theoretical value Actual conversion value N+1 {1 LSB x N + VOT} VNT VFST (Actual measurement) 004 003 Actual conversion value Digital output Digital output V (N + 1) T Actual conversion value 3FD N N-1 002 Theoretical value N-2 001 VNT Actual conversion value VOT (Actual measurement) AVSS AVCC Analog input Linearity error = DS07-12552-2E VNT - {1 LSB x N + VOT} 1 LSB AVSS AVCC Analog input Differential linearity error = V (N + 1) T - VNT 1 LSB -1 37 MB89470 Series (3) Notes on Using A/D Converter * Input impedance of the analog input pins The A/D converter used for the MB89470 series contains a sample & hold circuit as illustrated below to fetch analog input voltage into the sample & hold capacitor for 16 instruction cycles after activation A/D conversion. For this reason, if the output impedance of the external circuit for the analog input is high, analog input voltage might not stabilize within the analog input sampling period. Therefore, it is recommended to keep the output impedance of the external circuit low. Note that if the impedance cannot be kept low, it is recommended to connect an external capacitor of about 0.1 F for the analog input pin. Analog Input Circuit Model Sample & hold circuit Analog input pin Comparator If the analog input impedance is higher than to 10 k, it is recommended to connect an external capacitor of approx. 0.1 F. R C Close for 16 instruction cycles after activating A/D conversion. Analog channel selector MB89475 MB89PV470 MB89P475 R : analog input equivalent resistance 2.2 k 2.6 k C : analog input equivalent capacitance 45 pF 28 pF Sample & hold circuit 38 DS07-12552-2E MB89470 Series EXAMPLE CHARACTERISTICS * "L" level output voltage VOL1 - IOL (MB89475) VOL2 - IO2 (MB89475) 0.8 VCC = 3.0 V VCC = 3.5 V VCC = 4.0 V VCC = 4.5 V VCC = 5.0 V VCC = 5.5 V VCC = 6.0 V VOL1 (V) 0.6 0.4 VCC = 3.0 V 0.4 VCC = 3.5 V VCC = 4.0 V VCC = 4.5 V VCC = 5.0 V VCC = 5.5 V VCC = 6.0 V Ta = + 25 C 0.3 VOL2 (V) Ta = + 25 C 0.2 0.1 0.2 0.0 0 2 4 6 8 0.0 0 10 2 4 6 IOL1 (mA) 8 10 12 14 16 IOL2 (mA) * "H" level output voltage ( VCC - VOH ) - IOH (MB89475) VCC = 3.5 V 1.4 Ta = + 25 C VCC - VOH (V) 1.2 VCC = 3.0 V 1.0 VCC = 4.0 V VCC = 4.5 V VCC = 5.0 V VCC = 5.5 V VCC = 6.0 V 0.8 0.6 0.4 0.2 0.0 0 -2 -4 -6 -8 -10 IOH (mA) * "H" level input voltage/"L" level input voltage CMOS hysteresis Input (MB89475) 4.0 4.0 3.5 Ta = + 25 C 3.5 Ta = + 25 C 3.0 3.0 2.5 2.5 VIN (V) VIN (V) CMOS Input (MB89475) 2.0 2.0 1.5 1.5 1.0 1.0 0.5 0.5 0.0 1 2 3 4 VCC (V) 5 6 7 VIHS VILS 0.0 1 2 3 4 5 6 7 VCC (V) VIHS : Threshold when input voltage in hysteresis characteristics is set to "H" level. VILS : Threshold when input voltage in hysteresis characteristics is set to "L" level. DS07-12552-2E 39 MB89470 Series * Power supply current (External clock) ICC1 - VCC (MB89475) ICC2 - VCC (MB89475) 1.4 10.0 Ta = + 25 C FCH = 10.0 MHz 1.0 FCH = 10.0 MHz 0.8 FCH = 8.0 MHz 0.0 1 3.5 2 3 4 5 ICC1 (mA) 0.4 FCH = 4.0 MHz FCH = 2.0 MHz FCH = 1.0 MHz 0.2 FCH = 2.0 MHz FCH = 1.0 MHz 6 0.0 1 7 2 3 4 5 VCC (V) ICCS1 - VCC (MB89475) ICCS2 - VCC (MB89475) 1.0 Ta = + 25 C FCH = 8.0 MHz 1.5 FCH = 4.0 MHz 1.0 FCH = 2.0 MHz 0.5 FCH = 1.0 MHz 3 4 VCC (V) 5 6 7 7 FCH = 12.5 MHz 0.8 FCH = 10.0 MHz 2.0 6 Ta = + 25 C FCH = 12.5 MHz 2.5 2 0.6 FCH = 4.0 MHz VCC (V) 3.0 0.0 1 ICC1 (mA) 4.0 ICC2 (mA) ICC1 (mA) FCH = 8.0 MHz 2.0 FCH = 12.5 MHz 1.2 8.0 6.0 Ta = + 25 C FCH = 12.5 MHz FCH = 10.0 MHz FCH = 8.0 MHz 0.6 0.4 FCH = 4.0 MHz 0.2 FCH = 2.0 MHz FCH = 1.0 MHz 0.0 1 2 3 4 5 6 7 VCC (V) (Continued) 40 DS07-12552-2E MB89470 Series (Continued) ICCL - VCC (MB89475) ICCLS - VCC (MB89475) 60 16 Ta = + 25 C 50 FCH = 32.768 MHz Ta = + 25 C 14 FCH = 32.768 MHz ICCLS (A) ICCL (A) 12 40 30 20 10 8 6 4 10 2 0 0 1 2 3 4 5 6 7 1 2 3 4 5 6 7 VCC (V) VCC (V) ICCT - VCC (MB89475) 2.8 Ta = + 25 C 2.4 ICCT (A) 2.0 FCH = 32.768 MHz 1.6 1.2 0.8 0.4 0.0 1 2 3 4 5 6 7 VCC (V) DS07-12552-2E 41 MB89470 Series * Pull-up resistance RPULL - VCC (MB89475) 320 RPULL (k) 280 240 200 160 120 80 Ta = + 25 C 40 0 1 2 3 4 5 6 7 VCC (V) 42 DS07-12552-2E MB89470 Series MASK OPTIONS No. Part number MB89475 MB89P475 MB89PV470 Specifying procedure Specify when ordering mask Setting not possible Setting not possible Selectable 101/102 : Single clock 201/202 : Dual clock 101 : Single clock 201 : Dual clock Fixed to oscillation stabilization time of 218/FCH 1 Selection of clock mode * Single clock mode * Dual clock mode 2 Selection of oscillation stabilization time (OSC) Selectable * The initial value of the oscillation OSC stabilization time for the main 1 : 214/FCH clock can be set by selecting the 2 : 217/FCH values of the WTM1 and WTM0 3 : 218/FCH bits on the right. Fixed to oscillation stabilization time of 218/FCH 3 Selection of power-on stabilization time * Nil * 217/FCH Fixed to power-on stabilization time of Fixed to nil 217/FCH Selectable ORDERING INFORMATION Part number MB89475PFM MB89P475-101PFM MB89P475-102PFM MB89P475-201PFM MB89P475-202PFM Package 48-pin Plastic QFP (FPT-48P-M13) MB89475PMC MB89P475-101PMC MB89P475-102PMC MB89P475-201PMC MB89P475-202PMC 48-pin Plastic LQFP (FPT-48P-M26) MB89475P-SH MB89P475-101P-SH MB89P475-102P-SH MB89P475-201P-SH MB89P475-202P-SH 48-pin Plastic SH-DIP (DIP-48P-M01) MB89PV470-101CF MB89PV470-201CF 48-pin Ceramic MQFP (MQP-48C-P01) DS07-12552-2E Remarks 101 : Single clock, without content protection 102 : Single clock, with content protection 201 : Dual clock, without content protection 202 : Dual clock, with content protection 43 MB89470 Series PACKAGE DIMENSIONS 48-pin plastic SH-DIP Lead pitch 1.778mm(70mil) Row spacing 15.24mm(600mil) Sealing method Plastic mold (DIP-48P-M01) 48-pin plastic SH-DIP (DIP-48P-M01) +0.20 43.69 -0.30 +.008 1.720 -.012 INDEX-1 13.800.25 (.543.010) INDEX-2 0.51(.020)MIN 5.25(.207) MAX 0.250.05 (.010.002) 3.00(.118) MIN +0.50 1.00 -0 +.020 .039 -0 0.450.10 (.018.004) 15.24(.600) TYP 15MAX 1.7780.18 (.070.007) 1.778(.070) MAX C 40.894(1.610)REF 1994-2008 FUJITSU MICROELECTRONICS LIMITED D48002S-3C-4 Dimensions in mm (inches). Note: The values in parentheses are reference values. Please confirm the latest Package dimension by following URL. http://edevice.fujitsu.com/package/en-search/ (Continued) 44 DS07-12552-2E MB89470 Series 48-pin plastic LQFP Lead pitch 0.50 mm Package width x package length 7 x 7 mm Lead shape Gullwing Sealing method Plastic mold Mounting height 1.70 mm MAX Weight 0.17 g Code (Reference) P-LFQFP48-7x7-0.50 (FPT-48P-M26) 48-pin plastic LQFP (FPT-48P-M26) Note 1) * : These dimensions include resin protrusion. Note 2) Pins width and pins thickness include plating thickness. Note 3) Pins width do not include tie bar cutting remainder. 9.000.20(.354.008)SQ +0.40 +.016 * 7.00 -0.10 .276 -.004 SQ 36 0.1450.055 (.006.002) 25 37 24 0.08(.003) Details of "A" part +0.20 1.50 -0.10 +.008 48 13 "A" 0~8 LEAD No. 0.50(.020) 1 (Mounting height) .059 -.004 INDEX 0.100.10 (.004.004) (Stand off) 12 0.200.05 (.008.002) 0.08(.003) 0.25(.010) M 0.600.15 (.024.006) (c)2003-2008 FUJITSU LIMITED F48040S-c-2-3 C 2003 FUJITSU LIMITEDMICROELECTRONICS F48040S-c-2-2 Dimensions in mm (inches). Note: The values in parentheses are reference values. Please confirm the latest Package dimension by following URL. http://edevice.fujitsu.com/package/en-search/ (Continued) DS07-12552-2E 45 MB89470 Series 48-pin plastic QFP Lead pitch 0.80 mm Package width x package length 10 x 10 mm Lead shape Gullwing Sealing method Plastic mold Mounting height 2.35 mm MAX Code (Reference) P-QFP44-10x10-0.80 (FPT-48P-M13) 48-pin plastic QFP (FPT-48P-M13) Note 1) * : These dimensions do not include resin protrusion. Note 2) Pins width and pins thickness include plating thickness. Note 3) Pins width do not include tie bar cutting remainder. 13.100.40(.516.016)SQ * 10.000.20(.394.008)SQ 36 0.170.06 (.007.002) 25 24 37 Details of "A" part +0.40 0.10(.004) 1.95 -0.20 +.016 .077 -.008 (Mounting height) 0.25(.010) INDEX 0~8 13 48 1 0.80(.031) C "A" 12 0.320.05 (.013.002) 0.20(.008) 0.800.20 (.031.008) 0.880.15 (.035.006) +0.10 0.20 -0.20 +.004 .008 -.008 (Stand off) M 2003-2008 FUJITSU MICROELECTRONICS LIMITED F48023S-c-3-5 Dimensions in mm (inches). Note: The values in parentheses are reference values. Please confirm the latest Package dimension by following URL. http://edevice.fujitsu.com/package/en-search/ (Continued) 46 DS07-12552-2E MB89470 Series (Continued) 48-pin ceramic MQFP Lead pitch 0.8 mm Lead shape Straight Motherboard material Ceramic Mounted package material Plastic (MQP-48C-P01) 48-pin ceramic MQFP (MQP-48C-P01) 17.20(.677)TYP PIN No.1 INDEX 15.000.25 (.591.010) 14.820.35 (.583.014) 1.50(.059)TYP 8.80(.346)REF 1.00(.040)TYP 0.800.22 (.0315.0087) PIN No.1 INDEX 1.020.13 (.040.005) +0.13 7.14(.281) 8.71(.343) TYP TYP 10.92 -0.0 +.005 .430 -0 PAD No.1 INDEX 0.30(.012)TYP +0.45 4.50(.177)TYP 1.10 -0.25 +.018 .043 -.010 0.400.08 (.016.003) 0.60(.024)TYP 8.50(.335)MAX 0.150.05 (.006.002) C 1994-2008 FUJITSU MICROELECTRONICS LIMITED M48001SC-4-3 Dimensions in mm (inches). Note: The values in parentheses are reference values. Please confirm the latest Package dimension by following URL. http://edevice.fujitsu.com/package/en-search/ DS07-12552-2E 47 MB89470 Series MAIN CHANGES IN THIS EDITION Page Section Change Results Changed the package code. FPT-48P-M05 FPT-48P-M26 15 PROGRAMMING OTPROM IN MB89P475 Changed the "2. ROM Writer Adapters and RecomWITH PROGRAMMER mended ROM Writers". 16 PROGRAMMING TO THE EPROM WITH PIGGYBACK/EVALUATION DEVICE ORDERING INFORMATION Order informations are changed. MB89475PFV MB89475PMC MB89P475-101PFV MB89P475-101PMC MB89P475-102PFV MB89P475-102PMC MB89P475-201PFV MB89P475-201PMC MB89P475-202PFV MB89P475-202PMC PACKAGE DIMENSIONS Changed the package figure. FPT-48P-M05 FPT-48P-M26 43 45 Deleted the "2. Programming Socket Adapter" The vertical lines marked in the left side of the page show the changes. 48 DS07-12552-2E MB89470 Series MEMO DS07-12552-2E 49 MB89470 Series MEMO 50 DS07-12552-2E MB89470 Series MEMO DS07-12552-2E 51 MB89470 Series FUJITSU MICROELECTRONICS LIMITED Shinjuku Dai-Ichi Seimei Bldg., 7-1, Nishishinjuku 2-chome, Shinjuku-ku, Tokyo 163-0722, Japan Tel: +81-3-5322-3347 Fax: +81-3-5322-3387 http://jp.fujitsu.com/fml/en/ For further information please contact: North and South America FUJITSU MICROELECTRONICS AMERICA, INC. 1250 E. Arques Avenue, M/S 333 Sunnyvale, CA 94085-5401, U.S.A. Tel: +1-408-737-5600 Fax: +1-408-737-5999 http://www.fma.fujitsu.com/ Asia Pacific FUJITSU MICROELECTRONICS ASIA PTE. LTD. 151 Lorong Chuan, #05-08 New Tech Park 556741 Singapore Tel : +65-6281-0770 Fax : +65-6281-0220 http://www.fmal.fujitsu.com/ Europe FUJITSU MICROELECTRONICS EUROPE GmbH Pittlerstrasse 47, 63225 Langen, Germany Tel: +49-6103-690-0 Fax: +49-6103-690-122 http://emea.fujitsu.com/microelectronics/ FUJITSU MICROELECTRONICS SHANGHAI CO., LTD. Rm. 3102, Bund Center, No.222 Yan An Road (E), Shanghai 200002, China Tel : +86-21-6146-3688 Fax : +86-21-6335-1605 http://cn.fujitsu.com/fmc/ Korea FUJITSU MICROELECTRONICS KOREA LTD. 206 Kosmo Tower Building, 1002 Daechi-Dong, Gangnam-Gu, Seoul 135-280, Republic of Korea Tel: +82-2-3484-7100 Fax: +82-2-3484-7111 http://kr.fujitsu.com/fmk/ FUJITSU MICROELECTRONICS PACIFIC ASIA LTD. 10/F., World Commerce Centre, 11 Canton Road, Tsimshatsui, Kowloon, Hong Kong Tel : +852-2377-0226 Fax : +852-2376-3269 http://cn.fujitsu.com/fmc/en/ Specifications are subject to change without notice. For further information please contact each office. All Rights Reserved. The contents of this document are subject to change without notice. Customers are advised to consult with sales representatives before ordering. The information, such as descriptions of function and application circuit examples, in this document are presented solely for the purpose of reference to show examples of operations and uses of FUJITSU MICROELECTRONICS device; FUJITSU MICROELECTRONICS does not warrant proper operation of the device with respect to use based on such information. When you develop equipment incorporating the device based on such information, you must assume any responsibility arising out of such use of the information. FUJITSU MICROELECTRONICS assumes no liability for any damages whatsoever arising out of the use of the information. Any information in this document, including descriptions of function and schematic diagrams, shall not be construed as license of the use or exercise of any intellectual property right, such as patent right or copyright, or any other right of FUJITSU MICROELECTRONICS or any third party or does FUJITSU MICROELECTRONICS warrant non-infringement of any third-party's intellectual property right or other right by using such information. FUJITSU MICROELECTRONICS assumes no liability for any infringement of the intellectual property rights or other rights of third parties which would result from the use of information contained herein. The products described in this document are designed, developed and manufactured as contemplated for general use, including without limitation, ordinary industrial use, general office use, personal use, and household use, but are not designed, developed and manufactured as contemplated (1) for use accompanying fatal risks or dangers that, unless extremely high safety is secured, could have a serious effect to the public, and could lead directly to death, personal injury, severe physical damage or other loss (i.e., nuclear reaction control in nuclear facility, aircraft flight control, air traffic control, mass transport control, medical life support system, missile launch control in weapon system), or (2) for use requiring extremely high reliability (i.e., submersible repeater and artificial satellite). Please note that FUJITSU MICROELECTRONICS will not be liable against you and/or any third party for any claims or damages arising in connection with above-mentioned uses of the products. Any semiconductor devices have an inherent chance of failure. You must protect against injury, damage or loss from such failures by incorporating safety design measures into your facility and equipment such as redundancy, fire protection, and prevention of over-current levels and other abnormal operating conditions. Exportation/release of any products described in this document may require necessary procedures in accordance with the regulations of the Foreign Exchange and Foreign Trade Control Law of Japan and/or US export control laws. The company names and brand names herein are the trademarks or registered trademarks of their respective owners. Edited: Business & Media Promotion Dept.