M74HCT540 OCTAL BUS BUFFER WITH 3 STATE OUTPUTS (INVERTED) HIGH SPEED: tPD = 12ns (TYP.) at VCC = 4.5V LOW POWER DISSIPATION: ICC = 4A(MAX.) at TA=25C COMPATIBLE WITH TTL OUTPUTS : VIH = 2V (MIN.) VIL = 0.8V (MAX) BALANCED PROPAGATION DELAYS: tPLH tPHL SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 6mA (MIN) PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 540 DESCRIPTION The 74HCT540 is an advanced high-speed CMOS OCTAL BUS BUFFER (3-STATE) fabricated with silicon gate C2MOS technology. The M74HCT540 is an inverting buffer. The 3-STATE control gate operates as a two input AND such that if either G1 and G2 are high, all eight output are in the high impedance state. In order to enhance PC board layout the M74HCT540 offer a pinout having inputs and outputs on opposite sides of the package. ) (s t c u DIP PACKAGE TUBE t e l o s b O TSSOP u d o r P e ORDER CODES DIP SOP TSSOP ) s ( ct SOP M74HCT540B1R M74HCT540M1R T&R M74HCT540RM13TR M74HCT540TTR The M74HCT540 is designed to directly interface HSC2MOS systems with TTL and NMOS components. All inputs are equipped with protection circuits against static discharge and transient excess voltage. d o r P e t e l o s b O PIN CONNECTION AND IEC LOGIC SYMBOLS August 2001 1/9 M74HCT541 INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN DESCRIPTION PIN No SYMBOL NAME AND FUNCTION 1, 19 2, 3, 4, 5, 6, 7, 8, 9 18, 17, 16, 15, 14, 13, 12, 11 10 20 G1, G2 A1 to A8 Output Enable Inputs Data Inputs Y1 to Y8 Bus Outputs GND VCC Ground (0V) Positive Supply Voltage ) s ( ct u d o TRUTH TABLE INPUT G1 G2 An H X L L X H L L X X H L X : Don't Care Z : High Impedance ) (s ABSOLUTE MAXIMUM RATINGS Parameter Unit V DC Input Diode Current 20 mA DC Output Diode Current 20 mA DC Output Current 35 mA DC Output Voltage IIK e t e l o r P ICC or IGND DC VCC or Ground Current b O Value V VO so Z Z L H -0.5 to +7 DC Input Voltage IOK Yn -0.5 to VCC + 0.5 -0.5 to VCC + 0.5 VI IO du Supply Voltage VCC r P e t e l o s b O ct Symbol OUTPUT PD Power Dissipation Tstg Storage Temperature TL Lead Temperature (10 sec) V 70 mA 500(*) mW -65 to +150 C 300 C Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied (*) 500mW at 65 C; derate to 300mW by 10mW/ C from 65C to 85C RECOMMENDED OPERATING CONDITIONS Symbol VCC 2/9 Parameter Value Unit Supply Voltage 4.5 to 5.5 V VI Input Voltage 0 to VCC V VO Output Voltage Top Operating Temperature tr, tf Input Rise and Fall Time (VCC = 4.5 to 5.5V) 0 to VCC V -55 to 125 C 0 to 500 ns M74HCT541 DC SPECIFICATIONS Test Condition Symbol VIH Parameter VIL High Level Input Voltage VOH Low Level Input Voltage VOL II IOZ ICC ICC TA = 25C VCC (V) Min. 4.5 to 5.5 4.5 to 5.5 High Level Output Voltage 4.5 Low Level Output Voltage 4.5 Input Leakage Current High Impedance Output Leakage Current Quiescent Supply Current Additional Worst Case Supply Current Value Typ. Max. 2.0 -40 to 85C -55 to 125C Min. Min. Max. 2.0 0.8 4.4 4.5 4.4 4.4 IO=-6.0 mA 4.18 4.31 4.13 4.10 0.1 IO=6.0 mA 0.17 0.26 5.5 VI = VCC or GND 0.1 5.5 VI = VIH or VIL VO = VCC or GND 5.5 VI = VCC or GND 5.5 Per Input pin VI = 0.5V or VI = 2.4V Other Inputs at VCC or GND ) (s 0.1 V (s) ct u d o 0.33 V 0.8 IO=-20 A 0.0 Max. 2.0 0.8 IO=20 A Unit 0.1 0.40 V V 1 1 A 0.5 5 10 A 4 40 80 A 2.0 2.9 3.0 mA r P e t e l o s b O t c u AC ELECTRICAL CHARACTERISTICS (CL = 50 pF, Input tr = tf = 6ns) Symbol d o r P e Parameter so let tTLH tTHL Output Transition Time tPLH tPHL Propagation Delay Time b O tPZL tPZH Output Enable Time tPLZ tPHZ Output Disable Time Test Condition VCC (V) CL (pF) 4.5 Value TA = 25C Min. -40 to 85C -55 to 125C Min. Min. Typ. Max. 50 6 12 15 18 4.5 4.5 4.5 4.5 50 150 50 150 12 16 18 22 20 25 30 34 25 31 38 43 30 38 45 51 4.5 50 19 27 34 41 RL = 1 K RL = 1 K Max. Unit Max. ns ns ns ns 3/9 M74HCT541 CAPACITIVE CHARACTERISTICS Test Condition Symbol Parameter Value TA = 25C VCC (V) Min. Typ. Max. 10 CIN Input Capacitance 5.0 5 CPD Power Dissipation Capacitance (note 1) 5.0 34 -40 to 85C -55 to 125C Min. Min. Max. Unit Max. 10 10 pF pF 1) CPD is defined as the value of the IC's internal equivalent capacitance which is calculated from the operating current consumption without load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = C PD x VCC x fIN + ICC/8 (per circuit) ) s ( ct TEST CIRCUIT u d o r P e t e l o ) (s s b O t c u TEST tPLH, tPHL tPZL, tPLZ tPZH, tPHZ e t e ol Pr od CL = 50pF/150pF or equivalent (includes jig and probe capacitance) R1 = 1K or equivalent RT = ZOUT of pulse generator (typically 50) s b O 4/9 SWITCH Open VCC GND M74HCT541 WAVEFORM 1: PROPAGATION DELAY TIMES (f=1MHz; 50% duty cycle) ) s ( ct u d o r P e t e l o s b O WAVEFORM 2 : OUTPUT ENABLE AND DISABLE TIMES (f=1MHz; 50% duty cycle) ) (s t c u d o r P e t e l o s b O 5/9 M74HCT541 Plastic DIP-20 (0.25) MECHANICAL DATA mm. inch DIM. MIN. a1 0.254 B 1.39 TYP MAX. MIN. TYP. MAX. 0.010 1.65 0.055 0.065 b 0.45 0.018 b1 0.25 0.010 D ) s ( ct 25.4 E 8.5 e 2.54 e3 22.86 u d o 0.335 7.1 I 3.93 s ( t c 1.34 e t e ol bs O ) 3.3 Z Pr 0.100 F L 1.000 0.900 0.280 0.155 0.130 0.053 u d o r P e t e l o s b O P001J 6/9 M74HCT541 SO-20 MECHANICAL DATA mm. inch DIM. MIN. TYP A MAX. MIN. TYP. a1 2.65 MAX. 0.1 0.104 0.2 a2 0.004 0.008 2.45 0.096 b 0.35 0.49 0.014 b1 0.23 0.32 0.009 C 0.5 0.019 ) s ( ct 0.012 0.020 c1 u d o 45 (typ.) D 12.60 13.00 0.496 E 10.00 10.65 0.393 e 1.27 e3 11.43 F 7.40 7.60 L 0.50 1.27 M ) (s S e t e ol s b O 0.75 Pr 0.512 0.419 0.050 0.450 0.291 0.300 0.020 0.050 0.029 8 (max.) t c u d o r P e t e l o s b O PO13L 7/9 M74HCT541 TSSOP20 MECHANICAL DATA mm. inch DIM. MIN. TYP MAX. A MIN. TYP. MAX. 1.2 A1 0.05 A2 0.8 b 0.047 0.15 0.002 0.004 0.006 1.05 0.031 0.039 0.041 0.19 0.30 0.007 c 0.09 0.20 0.004 D 6.4 6.5 6.6 0.252 E 6.2 6.4 6.6 0.244 E1 4.3 4.4 4.48 1 e bs 0.65 BSC K 0 L 0.45 let o s b 0.60 s ( t c 0.75 du ro P e A2 A1 b 0.260 0.252 0.260 0.173 0.176 0.0256 BSC 0 8 0.018 0.024 O K e 0.030 L E c D E1 PIN 1 IDENTIFICATION 1 0087225C 8/9 0.0089 0.256 u d o r P e A O ) 8 0.012 t e l o 0.169 ) s ( ct M74HCT541 ) s ( ct u d o r P e t e l o ) (s s b O t c u d o r P e t e l o s b O Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. (c) The ST logo is a registered trademark of STMicroelectronics (c) 2001 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom (c) http://www.st.com 9/9