FN7920 Rev 0.00 Page 1 of 21
Mar 1, 2012
FN7920
Rev 0.00
Mar 1, 2012
ISL32430E, ISL32432E, ISL32433E, ISL32435E, ISL32437E
±40V Fault Protected, 3.3V to 5V, ±15V Common Mode Range, RS-485/RS-422
Transceivers With Cable Invert and ±15kV ESD
DATASHEET
The ISL32430E through ISL32437E are 3.3V to 5V powered,
fault protected, extended common mode range differential
transceivers for balanced communication. The RS-485 bus pins
(driver outputs and receiver inputs) are protected against
overvoltages up to ±40V, and against ±15kV ESD strikes.
Additionally, these transceivers operate in environments with
common mode voltages up to ±15V (exceeds the RS-485
requirement), making this RS-485 family one of the more
robust on the market.
Transmitters are RS-485 compliant with VCC ≥4.5V and
deliver a 1.1V differential output voltage into the RS-485
specified 54Ω load even with VCC =3V.
Receiver (Rx) inputs feature a “Full Fail-Safe” design, which
ensures a logic high Rx output if Rx inputs are floating, shorted,
or on a terminated but undriven (idle) bus. Rx full fail-safe
operation is maintained even when the Rx input polarity is
switched (cable invert function on ISL32437E).
The ISL32437E includes a cable invert function that reverses
the polarity of the Rx and Tx bus pins in case the cable is
misconnected during installation.
See Table 1 on page 2 for key features and configurations by
device number.
Related Literature
•See FN7921, “ISL32450E, ISL32452E, ISL32453E,
ISL32455E, ISL32457E: ±60V Fault Protected, 3.3V to 5V,
±20V Common Mode Range, RS-485/RS-422 Transceivers
with Cable Invert and ±15kV ESD”
Features
• Fault Protected RS-485 Bus Pins. . . . . . . . . . . . . . up to ±40V
• Extended Common Mode Range . . . . . . . . . . . . . . . . . . . ±15V
Larger Than Required for RS-485
• ±15kV HBM ESD Protection on RS-485 Bus Pins
• Wide Supply Range . . . . . . . . . . . . . . . . . . . . . . . . . 3V to 5.5V
• Cable Invert Pin (ISL32437E Only)
Corrects for Reversed Cable Connections While Maintaining
Rx Full Fail-safe Functionality
• 1/4 Unit Load for up to 128 Devices on the Bus
• High Transient Overvoltage Tolerance . . . . . . . . . . . . . . . ±60V
• Full Fail-safe (Open, Short, Terminated) RS-485 Receivers
• Choice of RS-485 Data Rates . . . . . . . . . . . . 250kbps or 1Mbps
• Low Quiescent Supply Current . . . . . . . . . . . . . . . . . . . 2.1mA
Ultra Low Shutdown Supply Current . . . . . . . . . . . . . . . . 10µA
• Pb-Free (RoHS Compliant)
Applications
• Utility Meters/Automated Meter Reading Systems
• Air Conditioning Systems
•Security Camera Networks
• Building Lighting and Environmental Control Systems
• Industrial/Process Control Networks
FIGURE 1. EXCEPTIONAL ISL32433E RX OPERATES AT >1Mbps
EVEN WITH ±15V COMMON MODE VOLTAGE
FIGURE 2. TRANSCEIVERS DELIVER SUPERIOR COMMON MODE
RANGE vs STANDARD RS-485 DEVICES
TIME (200ns/DIV)
VOLTAGE (V)
0
5
10
15
20
B
VID = ±1V
A
RO
VCC = 3V
2Mbps
ISL3243XE
COMMON MODE RANGE (V)
STANDARD RS-485
TRANSCEIVER
-15
-7
0
12
15
ISL32430E, ISL32432E, ISL32433E, ISL32435E, ISL32437E
FN7920 Rev 0.00 Page 2 of 21
Mar 1, 2012
TABLE 1. SUMMARY OF FEATURES
PART
NUMBER
HALF/FULL
DUPLEX
DATA RATE
(Mbps)
SLEW-RATE
LIMITED?
EN
PINS?
HOT
PLUG
CABLE INVERT
(INV) PIN?
QUIESCENT ICC
(mA)
LOW POWER
SHDN? PIN COUNT
ISL32430E Full 0.25 Yes Yes No No 2.1 Yes 10, 14
ISL32432E Half 0.25 Yes Yes No No 2.1 Yes 8
ISL32433E Full 1 Yes Yes No No 2.1 Yes 10, 14
ISL32435E Half 1 Yes Yes No No 2.1 Yes 8
ISL32437E Half 0.25 Yes Tx Only No Yes 2.1 No 8
Ordering Information
PART NUMBER
(Notes 1, 2, 3)
PART
MARKING
TEMP. RANGE
(°C)
PACKAGE
(Pb-Free)
PKG.
DWG. #
ISL32430EIBZ ISL32430 EIBZ -40 to +85 14 Ld SOIC M14.15
ISL32430EIUZ 2430E -40 to +85 10 Ld MSOP M10.118
ISL32432EIBZ 32432 EIBZ -40 to +85 8 Ld SOIC M8.15
ISL32432EIUZ 2432E -40 to +85 8 Ld MSOP M8.118
ISL32433EIBZ ISL32433 EIBZ -40 to +85 14 Ld SOIC M14.15
ISL32433EIUZ 2433E -40 to +85 10 Ld MSOP M10.118
ISL32435EIBZ 32435 EIBZ -40 to +85 8 Ld SOIC M8.15
ISL32435EIUZ 2435E -40 to +85 8 Ld MSOP M8.118
ISL32437EIBZ 32437 EIBZ -40 to +85 8 Ld SOIC M8.15
ISL32437EIUZ 2437E -40 to +85 8 Ld MSOP M8.118
NOTES:
1. Add “-T*” suffix for tape and reel. Please refer to TB347 for details on reel specifications.
2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte
tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil
Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
3. For Moisture Sensitivity Level (MSL), please see device information page for ISL32430E, ISL32432E, ISL32433E, ISL32435E, ISL32437E. For more
information on MSL please see tech brief TB363.
Pin Configurations
ISL32430E, ISL32433E
(14 LD SOIC)
TOP VIEW
ISL32430E, ISL32433E
(10 LD MSOP)
TOP VIEW
NC
RO
RE
DE
DI
GND
GND
VCC
NC
A
B
Z
Y
NC
1
2
3
4
5
6
7
14
13
12
11
10
9
8
D
R
RO
RE
DE
DI
GND
VCC
A
B
Z
Y
1
2
3
4
5
10
9
8
7
6
D
R
ISL32430E, ISL32432E, ISL32433E, ISL32435E, ISL32437E
FN7920 Rev 0.00 Page 3 of 21
Mar 1, 2012
ISL32432E, ISL32435E
(8 LD SOIC, 8 LD MSOP)
TOP VIEW
ISL32437E
(8 LD SOIC, 8 LD MSOP)
TOP VIEW
Pin Configurations (Continued)
RO
RE
DE
DI
1
2
3
4
8
7
6
5
VCC
B/Z
A/Y
GND
D
R
RO
INV
DE
DI
1
2
3
4
8
7
6
5
VCC
B/Z
A/Y
GND
D
R
Truth Tables
TRANSMITTING
INPUTS OUTPUTS
RE DE DI INV (Note 4) Y Z
X11 0 1 0
X10 0 0 1
X11 1 0 1
X10 1 1 0
0 0 X X High-Z High-Z
10X X High-Z*High-Z*
NOTES:
4. Parts without the INV pin follow the rows with INV = “0” and “X”.
*Low Power Shutdown Mode (See Notes 13 and 18).
RECEIVING
INPUTS OUTPUT
RE
(Note 18)
DE (Half
Duplex)
DE (Full
Duplex)
A-B INV (Note 4) RO
00 X -0.01V 0 1
00 X -0.2V 0 0
00 X 0.01V 1 1
00 X 0.2V 1 0
00 XInputs
Open or
Shorted
X1
10 0 X XHigh-Z*
11 1 X XHigh-Z
NOTE: *Low Power Shutdown Mode (See Notes 13 and 18).
Pin Descriptions
PIN
NAME
PIN NUMBER
FUNCTION
ISL32430E,
ISL32433E,
14 LD SOIC
ISL32430E,
ISL32433E,
10 LD MSOP
ISL32432E,
ISL32435E ISL32437E
RO 2 1 1 1 Receiver output. For parts without the cable invert function - or if INV is low - then: If
A-B -10mV, RO is high; if A - B -200mV, RO is low. If INV is high, then: If B - A -10mV,
RO is high; if B - A -200mV, RO is low. In all cases, RO = High if A and B are unconnected
(floating), or shorted together, or connected to an undriven, terminated bus (i.e., Rx is
always failsafe open, shorted, and idle, even if polarity is inverted).
RE 3 2 2 N/A Receiver output enable. RO is enabled when RE is low; RO is high impedance when RE
is high. Internally pulled low.
DE 4 3 3 3 Driver output enable. The driver outputs, Y and Z, are enabled by bringing DE high, and
they are high impedance when DE is low. Internally pulled high.
DI 5 4 4 4 Driver input. For parts without the cable invert function - or if INV is low - a low on DI
forces output Y low and output Z high, while a high on DI forces output Y high and
output Z low. The output states, relative to DI, invert if INV is high.
GND 6, 7 5 5 5 Ground connection.
A/Y N/A N/A 6 6 ±40V Fault Protected and ±15kV ESD protected RS-485/RS-422 I/O pin. For parts
without the cable invert function - or if INV is low - A/Y is the non-inverting receiver input
and non-inverting driver output. If INV is high, A/Y is the inverting receiver input and
the inverting driver output. Pin is an input if DE = 0; pin is an output if DE = 1.
ISL32430E, ISL32432E, ISL32433E, ISL32435E, ISL32437E
FN7920 Rev 0.00 Page 4 of 21
Mar 1, 2012
B/Z N/A N/A 7 7 ±40V Fault Protected and ±15kV ESD protected RS-485/RS-422 I/O pin. For parts
without the cable invert function - or if INV is low - B/Z is the inverting receiver input and
inverting driver output. If INV is high, B/Z is the non-inverting receiver input and the
non-inverting driver output. Pin is an input if DE = 0; pin is an output if DE = 1.
A 12 9 N/A N/A ±40V Fault Protected and ±15kV ESD protected RS-485/RS-422 non-inverting
receiver input.
B 11 8 N/A N/A ±40V Fault Protected and ±15kV ESD protected RS-485/RS-422 inverting receiver
input.
Y 9 6 N/A N/A ±40V Fault Protected and ±15kV ESD protected RS-485/RS-422 non-inverting driver
output.
Z 10 7 N/A N/A ±40V Fault Protected and ±15kV ESD protected RS-485/RS-422 inverting driver
output.
VCC 14 10 8 8 System power supply input (3V to 5.5V).
INV N/A N/A N/A 2 Receiver and driver Cable Invert (polarity selection) input. When driven high this pin
swaps the polarity of the driver output and receiver input pins. If unconnected
(floating) or connected low, normal RS-485 polarity conventions apply. Internally
pulled low.
NC 1, 8, 13 N/A N/A N/A No Internal Connection.
Pin Descriptions (Continued)
PIN
NAME
PIN NUMBER
FUNCTION
ISL32430E,
ISL32433E,
14 LD SOIC
ISL32430E,
ISL32433E,
10 LD MSOP
ISL32432E,
ISL32435E ISL32437E
ISL32430E, ISL32432E, ISL32433E, ISL32435E, ISL32437E
FN7920 Rev 0.00 Page 5 of 21
Mar 1, 2012
Typical Operating Circuits
ISL32430E, ISL32433E FULL DUPLEX NETWORK
ISL32432E, ISL32435E HALF DUPLEX NETWORK
ISL32437E HALF DUPLEX NETWORK USING CABLE INVERT FUNCTION
0.1µF
+
D
R
12
11
10
9
14
2
3
4
5
6, 7
VCC
GND
RO
RE
DE
DI
A
B
Y
Z
+3.3V
0.1µF +
D
R
12
11
10
9
14
2
3
4
5
6, 7
VCC
GND
RO
RE
DE
DI
A
B
Y
Z
+3.3V
RT
RT
SOIC PINOUT SHOWN
0.1µF
+
D
R
7
6
8
1
2
3
4
5
VCC
GND
RO
RE
DE
DI
A/Y
B/Z
+3.3V
0.1µF +
D
R
6
7
8
1
2
3
4
5
VCC
GND
RO
RE
DE
DI
A/Y
B/Z
+3.3V
RTRT
0.1µF
+
D
R6
7
8
1
3
4
5
VCC
GND
RO
DE
DI
B/Z
A/Y
+3.3V
RTRT
INV
2
0.1µF +
D
R
7
6
8
1
3
4
5
VCC
GND
RO
DE
DI
A/Y
B/Z
+3.3V
INV
2
THE IC ON THE LEFT HAS THE CABLE CONNECTIONS
SWAPPED, SO THE INV PIN IS STRAPPED HIGH TO
INVERT THE RX AND TX POLARITY
ISL32430E, ISL32432E, ISL32433E, ISL32435E, ISL32437E
FN7920 Rev 0.00 Page 6 of 21
Mar 1, 2012
Absolute Maximum Ratings Thermal Information
VCC to Ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7V
Input Voltages
DI, DE, RE, INV. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to VCC + 0.3V
Input/Output Voltages
A/Y, B/Z, A, B, Y, Z . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50V
A/Y, B/Z, A, B, Y, Z
(Transient Pulse Through 100, Note 5). . . . . . . . . . . . . . . . . . . ±60V
RO. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to (VCC +0.3V)
Short Circuit Duration
Y, Z . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Indefinite
ESD Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see Specification Table
Latch-up (per JESD78, Level 2, Class A) . . . . . . . . . . . . . . . . . . . . . +125°C
Thermal Resistance (Typical) JA (°C/W) JC (°C/W)
8 Ld SOIC Package (Notes 6, 7) . . . . . . . . . . 108 47
8 Ld MSOP Package (Notes 6, 7) . . . . . . . . . 140 40
10 Ld MSOP Package (Notes 6, 7) . . . . . . . . 135 50
14 Ld SOIC Package (Notes 6, 7) . . . . . . . . . 88 39
Maximum Junction Temperature (Plastic Package). . . . . . . . . . . . . . . +150°C
Maximum Storage Temperature Range . . . . . . . . . . . . . . . -65°C to +150°C
Pb-free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
Recommended Operating Conditions
Supply Voltage (VCC). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.3V or 5V
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40°C to +85°C
Bus Pin Common Mode Voltage Range. . . . . . . . . . . . . . . . . . -15V to +15V
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product
reliability and result in failures not covered by warranty.
NOTES:
5. Tested according to TIA/EIA-485-A, Section 4.2.6 (±60V for 15µs at a 1% duty cycle).
6. JA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
7. For JC, the “case temp” location is taken at the package top center.
Electrical Specifications Test Conditions: VCC = 3V to 3.6V and 4.5V to 5.5V; Unless Otherwise Specified. Typicals are at the worst
case of VCC =5V or V
CC =3.3V, T
A= +25°C (Note 8). Boldface limits apply over the operating temperature range, -40°C to +85°C.
PARAMETER SYMBOL TEST CONDITIONS
TEMP
(°C)
MIN
(Note 16) TYP
MAX
(Note 16) UNITS
DC CHARACTERISTICS
Driver Differential VOUT (No load) VOD1 Full - - VCC V
Driver Differential VOUT (Loaded,
Figure 3A)
VOD2 RL = 100Ω (RS-422), VCC ≥ 4.5V Full 23- V
RL = 54Ω (RS-485) VCC ≥ 4.5V Full 1.7 2.3 -V
VCC = 3.3V Full 1.35 1.42 -V
VCC ≥ 3V Full 1.1 1.3 -V
Change in Magnitude of Driver
Differential VOUT for Complementary
Output States
VOD RL = 54Ω or 100Ω (Figure 3A) Full - - 0.2 V
Driver Differential VOUT with
Common Mode Load (Figure 3B)
VOD3 RL = 60Ω, -15V ≤ VCM ≤ 15V, VCC ≥ 4.5V Full 1.5 --V
Driver Common-Mode VOUT
(Figure 3A)
VOC RL = 54Ω or 100ΩFull -1 -3V
Change in Magnitude of Driver
Common-Mode VOUT for
Complementary Output States
VOC RL = 54Ω or 100Ω (Figure 3A) Full - - 0.2 V
Driver Short-Circuit Current IOSD DE = VCC, -15V ≤ VO ≤ 15V (Note 10) Full -250 -250 mA
IOSD1 At First Fold-back, 24V ≤ VO ≤ -24V Full -83 -83 mA
IOSD2 At Second Fold-back, 35V ≤ VO ≤ -35V Full -13 -13 mA
Logic Input High Voltage VIH DE, DI, RE, INV (See Figure 25) Full 2.35 --V
Logic Input Low Voltage VIL DE, DI, RE, INV Full - - 0.8 V
Logic Input Current IIN1 DI Full -1 -1µA
DE, RE, INV Full -15 615 µA
ISL32430E, ISL32432E, ISL32433E, ISL32435E, ISL32437E
FN7920 Rev 0.00 Page 7 of 21
Mar 1, 2012
Input/Output Current (A/Y, B/Z) IIN2 DE = 0V, VCC =0V or
3.6V or 5.5V
VIN = 12V Full - - 250 µA
VIN = -7V Full -200 --µA
VIN = ±15V Full -800 -850 µA
VIN = ±40V, (Note 17) Full -6 -6mA
Input Current (A, B)
(Full Duplex Versions Only)
IIN3 VCC = 0V or 3.6V or
5.5V
VIN = 12V Full - - 125 µA
VIN = -7V Full -100 --µA
VIN = ±15V Full -500 -500 µA
VIN = ±40V, (Note 17) Full -3 -3mA
Output Leakage Current (Y, Z)
(Full Duplex Versions Only)
IOZD RE = 0V, DE = 0V,
VCC = 0V or 3.6V or
5.5V
VIN = 12V Full - - 200 µA
VIN = -7V Full -100 --µA
VIN = ±15V Full -500 -500 µA
VIN = ±40V, (Note 17) Full -3 -3mA
Receiver Differential Threshold
Voltage
VTH -15V ≤ VCM ≤ 15V,
(For ISL32437E only,
A-B if INV = 0; B-A if
INV = 1)
VCC ≤ 3.6V Full -200 -120 -10 mV
VCC ≥ 4.5V Full -250 -180 -10 mV
Receiver Input Hysteresis VTH -15V ≤ VCM ≤ 15V +25 - 30 - mV
Receiver Output High Voltage VOH1 VID = -10mV IO = -4mA, VCC ≥ 3V Full 2.4 --V
VOH2 IO = -8mA, VCC ≥ 4.5V Full 2.4 --V
Receiver Output Low Voltage VOL IO = 4mA, VCC ≥ 3V, VID = -200mV Full - - 0.4 V
IO = 5mA, VCC ≥ 4.5V, VID = -250mV Full - - 0.4 V
Three-State (High Impedance)
Receiver Output Current (Note 18)
IOZR 0V ≤ VO ≤ VCC Full -1 0.01 1µA
Receiver Short-Circuit Current IOSR 0V ≤ VO ≤ VCC Full - - ±115 mA
SUPPLY CURRENT
No-Load Supply Current (Note 9) ICC DE = VCC, RE =0V or V
CC, DI = 0V or VCC Full - 2.1 4.5 mA
Shutdown Supply Current (Note 18) ISHDN DE = 0V, RE = VCC, DI = 0V or VCC Full - 10 35 µA
ESD PERFORMANCE
All Pins Human Body Model
(Tested per JESD22-A114E)
+25 - ±8 - kV
Machine Model
(Tested per JESD22-A115-A)
+25 - ±700 - V
RS-485 Pins (A, B, Y, Z,
A/Y, B/Z)
Human Body Model,
From Bus Pins to
GND
Full Duplex +25 - ±15 - kV
Half Duplex +25 - ±16.5 - kV
DRIVER SWITCHING CHARACTERISTICS (250kbps Versions; ISL32430E, ISL32432E, ISL32437E)
Driver Differential Output Delay tPLH, tPHL RD = 54Ω, CD= 50pF (Figure 4) Full - 280 1000 ns
Driver Differential Output Skew tSKEW RD = 54Ω, CD= 50pF (Figure 4) Full - 4 100 ns
Driver Differential Rise or Fall Time tR, tFRD = 54Ω, CD= 50pF (Figure 4) Full 250 650 1500 ns
Maximum Data Rate fMAX CD = 820pF (Figure 6) Full 250 --kbps
Driver Enable to Output High tZH SW = GND (Figure 5), (Note 11) Full - - 1600 ns
Electrical Specifications Test Conditions: VCC = 3V to 3.6V and 4.5V to 5.5V; Unless Otherwise Specified. Typicals are at the worst
case of VCC =5V or V
CC =3.3V, T
A= +25°C (Note 8). Boldface limits apply over the operating temperature range, -40°C to +85°C. (Continued)
PARAMETER SYMBOL TEST CONDITIONS
TEMP
(°C)
MIN
(Note 16) TYP
MAX
(Note 16) UNITS
ISL32430E, ISL32432E, ISL32433E, ISL32435E, ISL32437E
FN7920 Rev 0.00 Page 8 of 21
Mar 1, 2012
Driver Enable to Output Low tZL SW = VCC (Figure 5), (Note 11) Full - - 1600 ns
Driver Disable from Output Low tLZ SW = VCC (Figure 5) Full - - 300 ns
Driver Disable from Output High tHZ SW = GND (Figure 5) Full - - 300 ns
Time to Shutdown tSHDN (Notes 13, 18) Full 60 160 600 ns
Driver Enable from Shutdown to
Output High
tZH(SHDN) SW = GND (Figure 5), (Notes 13, 14, 18) Full - - 3000 ns
Driver Enable from Shutdown to
Output Low
tZL(SHDN) SW = VCC (Figure 5), (Notes 13, 14, 18) Full - - 3000 ns
DRIVER SWITCHING CHARACTERISTICS (1Mbps Versions; ISL32433E and ISL32435E)
Driver Differential Output Delay tPLH, tPHL RD = 54Ω, CD= 50pF (Figure 4) Full - 70 200 ns
Driver Differential Output Skew tSKEW RD = 54Ω, CD= 50pF (Figure 4) Full - 4 25 ns
Driver Differential Rise or Fall Time tR, tFRD = 54Ω, CD= 50pF (Figure 4) Full 50 130 300 ns
Maximum Data Rate fMAX CD = 820pF (Figure 6) Full 1--Mbps
Driver Enable to Output High tZH SW = GND (Figure 5), (Note 11) Full - - 300 ns
Driver Enable to Output Low tZL SW = VCC (Figure 5), (Note 11) Full - - 300 ns
Driver Disable from Output Low tLZ SW = VCC (Figure 5) Full - - 300 ns
Driver Disable from Output High tHZ SW = GND (Figure 5) Full - - 300 ns
Time to Shutdown tSHDN (Note 13) Full 60 160 600 ns
Driver Enable from Shutdown to
Output High
tZH(SHDN) SW = GND (Figure 5), (Notes 13, 14) Full - - 3000 ns
Driver Enable from Shutdown to
Output Low
tZL(SHDN) SW = VCC (Figure 5), (Notes 13, 14) Full - - 3000 ns
RECEIVER SWITCHING CHARACTERISTICS (250kbps Versions; ISL32430E, ISL32432E, ISL32437E)
Maximum Data Rate fMAX (Figure 7) Full 250 --kbps
Receiver Input to Output Delay tPLH, tPHL (Figure 7) Full - 240 325 ns
Receiver Skew |tPLH - tPHL|t
SKD (Figure 7) Full - 6 25 ns
Receiver Enable to Output Low tZL RL = 1kΩ, CL = 15pF, SW = VCC (Figure 8),
(Notes 12, 18)
Full - - 80 ns
Receiver Enable to Output High tZH RL = 1kΩ, CL = 15pF, SW = GND (Figure 8),
(Notes 12, 18)
Full - - 80 ns
Receiver Disable from Output Low tLZ RL = 1kΩ, CL = 15pF, SW = VCC (Figure 8),
(Note 18)
Full - - 80 ns
Receiver Disable from Output High tHZ RL = 1kΩ, CL = 15pF, SW = GND (Figure 8),
(Note 18)
Full - - 80 ns
Time to Shutdown tSHDN (Notes 13, 18) Full 60 160 600 ns
Receiver Enable from Shutdown to
Output High
tZH(SHDN) RL = 1kΩ, CL = 15pF, SW = GND (Figure 8),
(Notes 13, 15, 18)
Full - - 2500 ns
Receiver Enable from Shutdown to
Output Low
tZL(SHDN) RL = 1kΩ, CL = 15pF, SW = VCC (Figure 8),
(Notes 13, 15, 18)
Full - - 2500 ns
RECEIVER SWITCHING CHARACTERISTICS (1Mbps Versions; ISL32433E, ISL32435E)
Maximum Data Rate fMAX (Figure 7) Full 1--Mbps
Receiver Input to Output Delay tPLH, tPHL (Figure 7) Full - 115 200 ns
Electrical Specifications Test Conditions: VCC = 3V to 3.6V and 4.5V to 5.5V; Unless Otherwise Specified. Typicals are at the worst
case of VCC =5V or V
CC =3.3V, T
A= +25°C (Note 8). Boldface limits apply over the operating temperature range, -40°C to +85°C. (Continued)
PARAMETER SYMBOL TEST CONDITIONS
TEMP
(°C)
MIN
(Note 16) TYP
MAX
(Note 16) UNITS
ISL32430E, ISL32432E, ISL32433E, ISL32435E, ISL32437E
FN7920 Rev 0.00 Page 9 of 21
Mar 1, 2012
Receiver Skew |tPLH - tPHL|t
SKD (Figure 7) Full - 4 20 ns
Receiver Enable to Output Low tZL RL = 1kΩ, CL = 15pF, SW = VCC (Figure 8),
(Note 12)
Full - - 80 ns
Receiver Enable to Output High tZH RL = 1kΩ, CL = 15pF, SW = GND (Figure 8),
(Note 12)
Full - - 80 ns
Receiver Disable from Output Low tLZ RL = 1kΩ, CL = 15pF, SW = VCC (Figure 8) Full - - 80 ns
Receiver Disable from Output High tHZ RL = 1kΩ, CL = 15pF, SW = GND (Figure 8) Full - - 80 ns
Time to Shutdown tSHDN (Note 13) Full 60 160 600 ns
Receiver Enable from Shutdown to
Output High
tZH(SHDN) RL = 1kΩ, CL = 15pF, SW = GND (Figure 8),
(Notes 13, 15)
Full - - 2500 ns
Receiver Enable from Shutdown to
Output Low
tZL(SHDN) RL = 1kΩ, CL = 15pF, SW = VCC (Figure 8),
(Notes 13, 15)
Full - - 2500 ns
NOTES:
8. All currents into device pins are positive; all currents out of device pins are negative. All voltages are referenced to device ground unless otherwise
specified.
9. Supply current specification is valid for loaded drivers when DE = 0V.
10. Applies to peak current. See “Typical Performance Curves” beginning on page 14 for more information.
11. Keep RE = 0 to prevent the device from entering SHDN (does not apply to the ISL32437E).
12. The RE signal high time must be short enough (typically <100ns) to prevent the device from entering SHDN.
13. Transceivers are put into shutdown by bringing RE high and DE low. If the inputs are in this state for less than 60ns, the parts are guaranteed not to enter
shutdown. If the inputs are in this state for at least 600ns, the parts are guaranteed to have entered shutdown. See “Low Power Shutdown Mode” on
page 13.
14. Keep RE = VCC, and set the DE signal low time >600ns to ensure that the device enters SHDN.
15. Set the RE signal high time >600ns to ensure that the device enters SHDN.
16. Compliance to data sheet limits is assured by one or more methods: production test, characterization and/or design.
17. See “Caution” statement below the “Recommended Operating Conditions” section on page 6.
18. Does not apply to the ISL32437E. The ISL32437E has no Rx enable function, and thus no SHDN function.
Test Circuits and Waveforms
FIGURE 3A. VOD AND VOC FIGURE 3B. VOD WITH COMMON MODE LOAD
FIGURE 3. DC DRIVER TEST CIRCUITS
Electrical Specifications Test Conditions: VCC = 3V to 3.6V and 4.5V to 5.5V; Unless Otherwise Specified. Typicals are at the worst
case of VCC =5V or V
CC =3.3V, T
A= +25°C (Note 8). Boldface limits apply over the operating temperature range, -40°C to +85°C. (Continued)
PARAMETER SYMBOL TEST CONDITIONS
TEMP
(°C)
MIN
(Note 16) TYP
MAX
(Note 16) UNITS
D
DE
DI
VCC
VOD
VOC
RL/2
RL/2
Z
Y
D
DE
DI VOD
375Ω
375Ω
Z
Y
VCM
VCC
RL/2
RL/2
ISL32430E, ISL32432E, ISL32433E, ISL32435E, ISL32437E
FN7920 Rev 0.00 Page 10 of 21
Mar 1, 2012
FIGURE 4A. TEST CIRCUIT
FIGURE 4B. MEASUREMENT POINTS
FIGURE 4. DRIVER PROPAGATION DELAY AND DIFFERENTIAL TRANSITION TIMES
FIGURE 5A. TEST CIRCUIT FIGURE 5B. MEASUREMENT POINTS
FIGURE 5. DRIVER ENABLE AND DISABLE TIMES
FIGURE 6A. TEST CIRCUIT FIGURE 6B. MEASUREMENT POINTS
FIGURE 6. DRIVER DATA RATE
Test Circuits and Waveforms (Continued)
D
DE
DI
VCC
SIGNAL
GENERATOR
RD
Z
Y
CD
OUT (Z)
3V
0V
50%
50%
VOH
VOL
OUT (Y)
tPLH tPHL
DIFF OUT (Y - Z)
tR
+VOD
-VOD
90% 90%
tF
10% 10%
DI
SKEW = |tPLH - tPHL|
D
DE
DI Z
Y
VCC
GND
SW
PARAMETER OUTPUT RE DI SW CL (pF)
tHZ Y/Z X 1/0 GND 50
tLZ Y/Z X 0/1 VCC 50
tZH Y/Z 0 (Note 11) 1/0 GND 100
tZL Y/Z 0 (Note 11) 0/1 VCC 100
tZH(SHDN) Y/Z 1 (Note 14) 1/0 GND 100
tZL(SHDN) Y/Z 1 (Note 1 4) 0/1 VCC 100
SIGNAL
GENERATOR
110Ω
CL
OUT (Y, Z)
3V
0V
50%50%
VOH
0V
VOH - 0.5V
tHZ
OUT (Y, Z)
VCC
VOL
VOL + 0.5V
tLZ
DE
OUTPUT LOW
tZL, tZL(SHDN)
tZH, tZH(SHDN)
50%
50%
Note 13
Note 13 OUTPUT HIGH
Note 13
D
DE
DI
VCC
SIGNAL
GENERATOR
Z
Y
CDVOD
+
-
54Ω
3V
0V
DIFF OUT (Y - Z) +VOD
-VOD
DI
0V
ISL32430E, ISL32432E, ISL32433E, ISL32435E, ISL32437E
FN7920 Rev 0.00 Page 11 of 21
Mar 1, 2012
FIGURE 7A. TEST CIRCUIT FIGURE 7B. MEASUREMENT POINTS
FIGURE 7. RECEIVER PROPAGATION DELAY AND DATA RATE
FIGURE 8A. TEST CIRCUIT FIGURE 8B. MEASUREMENT POINTS
FIGURE 8. RECEIVER ENABLE AND DISABLE TIMES
Test Circuits and Waveforms (Continued)
SIGNAL
GENERATOR
RRO
RE
A
B15pF
SIGNAL
GENERATOR
+1.5V
RO
+2.25V
+750mV
tPLH
1.5V1.5V
VCC
0V
50% 50%
tPHL
A
B
1kΩ VCC
GND
SW
PARAMETER DE A SW
tHZ 0 +1.5V GND
tLZ 0 -1.5V VCC
tZH (Note 12) 0 +1.5V GND
tZL (Note 12) 0 -1.5V VCC
tZH(SHDN) (Note 15) 0 +1.5V GND
tZL(SHDN) (Note 15) 0 -1.5V VCC
SIGNAL
GENERATOR
RRO
RE
A
B
15pF
RO
3V
0V
50%50%
VOH
0V
1.5V
VOH - 0.5V
tHZ
RO
VCC
VOL
1.5V
VOL + 0.5V
tLZ
RE
OUTPUT LOW
tZL, tZL(SHDN)
tZH, tZH(SHDN)
Note 13
Note 13 OUTPUT HIGH
Note 13
ISL32430E, ISL32432E, ISL32433E, ISL32435E, ISL32437E
FN7920 Rev 0.00 Page 12 of 21
Mar 1, 2012
Application Information
RS-485 and RS-422 are differential (balanced) data
transmission standards used for long haul or noisy environments.
RS-422 is a subset of RS-485, so RS-485 transceivers are also
RS-422 compliant. RS-422 is a point-to-multipoint (multidrop)
standard, which allows only one driver and up to 10 (assuming
one unit load devices) receivers on each bus. RS-485 is a true
multipoint standard, which allows up to 32 one unit load devices
(any combination of drivers and receivers) on each bus. To allow
for multipoint operation, the RS-485 specification requires that
drivers must handle bus contention without sustaining any
damage.
Another important advantage of RS-485 is the extended
common mode range (CMR), which specifies that the driver
outputs and receiver inputs withstand signals that range from
+12V to -7V. RS-422 and RS-485 are intended for runs as long as
4000’, thus the wide CMR is necessary to handle ground
potential differences, as well as voltages induced in the cable by
external fields.
The ISL32430E, ISL32432E, ISL32433E, ISL32435E, ISL32437E
are a family of ruggedized RS-485 transceivers that improves on
the RS-485 basic requirements, and therefore increases system
reliability. The CMR increases to ±15V, while the RS-485 bus pins
(receiver inputs and driver outputs) include fault protection
against voltages and transients up to ±40V. Additionally, the
±15kV to ±16.5kV built-in ESD protection complements the fault
protection.
Receiver (Rx) Features
These devices utilize a differential input receiver for maximum
noise immunity and common mode rejection. Input sensitivity is
better than ±200mV (3.3V operation), as required by the RS-422
and RS-485 specifications.
Receiver input (load) current surpasses the RS-422 specification
of 3mA, and is four times lower than the RS-485 “Unit Load (UL)”
requirement of 1mA maximum. Thus, these products are known
as “one-quarter UL” transceivers, and there can be up to 128 of
these devices on a network while still complying with the RS-485
loading specification.
The Rx functions with common mode voltages as great as ±15V,
making them ideal for industrial, or long networks where induced
voltages are a realistic concern.
All the receivers include a “full fail-safe” function that guarantees
a high level receiver output if the receiver inputs are unconnected
(floating), shorted together, or connected to a terminated bus
with all the transmitters disabled (i.e., an idle bus).
Receivers easily meet the data rates supported by the
corresponding driver, and most receiver outputs are
three-statable via the active low RE input.
The Rx in the 250kbps and 1Mbps versions include noise filtering
circuitry to reject high frequency signals. The 1Mbps version
typically rejects pulses narrower than 50ns (equivalent to
20Mbps), while the 250kbps Rx rejects pulses below 150ns
(6.7Mbps).
Driver (Tx) Features
The RS-485/RS-422 driver is a differential output device that
delivers at least 1.7V across a 54Ω load (RS-485), and at least 2V
across a 100Ω load (RS-422) with VCC ≥ 4.5V. The drivers feature
low propagation delay skew to maximize bit width, and to
minimize EMI, and all drivers are three-statable via the active
high DE input.
The 250kbps and 1Mbps driver outputs are slew rate limited to
minimize EMI, and to minimize reflections in unterminated or
improperly terminated networks.
High Overvoltage (Fault) Protection
Increases Ruggedness
The ±40V (referenced to the IC GND) fault protection on the
RS-485 pins, makes these transceivers some of the most rugged
on the market. This level of protection makes the ISL32430E,
ISL32432E, ISL32433E, ISL32435E, ISL32437E perfect for
applications where power (e.g., 24V supplies) must be routed in
the conduit with the data lines, or for outdoor applications where
large transients are likely to occur. When power is routed with the
data lines, even a momentary short between the supply and data
lines will destroy an unprotected device. The ±40V fault levels of this
family are at least three times higher than the levels specified for
standard RS-485 ICs. The ISL32430E, ISL32432E, ISL32433E,
ISL32435E, ISL32437E protection is active whether the Tx is
enabled or disabled, and even if the IC is powered down.
If transients or voltages (including overshoots and ringing)
greater than ±50V are possible, then additional external
protection is required. Use a protection device with the lowest
clamping voltage acceptable for the application, and remember
that TVS type devices typically clamp 5V to 10V above the
designated stand-off voltage (e.g., a “45V TVS” clamps between
50V and 55V).
Wide Common Mode Voltage (CMV) Tolerance
Improves Operating Range
RS-485 networks operating in industrial complexes, or over long
distances, are susceptible to large CMV variations. Either of these
operating environments may suffer from large node-to-node
ground potential differences, or CMV pickup from external
electromagnetic sources, and devices with only the minimum
required +12V to -7V CMR may malfunction. The ISL32430E,
ISL32432E, ISL32433E, ISL32435E, ISL32437E’s extended
±15V CMR allows for operation in environments that would
overwhelm lesser transceivers. Additionally, the Rx will not phase
invert (erroneously change state) even with CMVs of ±20V, or
differential voltages as large as 40V.
Cable Invert (Polarity Reversal) Function
With large node count RS-485 networks, it is common for some
cable data lines to be wired backwards during installation. When
this happens, the node is unable to communicate over the
network. Once a technician finds the miswired node, he must
then rewire the connector, which is time consuming.
The ISL32437E simplifies this task by including a cable invert pin
(INV) that allows the technician to invert the polarity of the Rx
input and the Tx output pins simply by moving a jumper to
change the state of the invert pin. When the invert pin is low, the
ISL32430E, ISL32432E, ISL32433E, ISL32435E, ISL32437E
FN7920 Rev 0.00 Page 13 of 21
Mar 1, 2012
IC operates like any standard RS-485 transceiver, and the bus
pins have their normal polarity definition of A and Y being
noninverting and B and Z being inverting. With the invert pin
high, the corresponding bus pins reverse their polarity, so B and Z
are now noninverting, and A and Y become inverting.
Intersil’s unique cable invert function is superior to that found on
competing devices, because the Rx full fail-safe function is
maintained, even when the Rx polarity is reversed. Competitor
devices implement the Rx invert function simply by inverting the
Rx output. This means that with the Rx inputs floating or shorted
together, the Rx appropriately delivers a logic 1 in normal
polarity, but outputs a logic low when the IC is operated in the
inverted mode. Intersil’s innovative Rx design guarantees that,
with the Rx inputs floating or shorted together (VID =0V), the Rx
output remains high, regardless of the state of the invert pin.
Data Rate, Cables, and Terminations
RS-485/RS-422 are intended for network lengths up to 4000’,
but the maximum system data rate decreases as the
transmission length increases. Devices operating at 1Mbps can
operate at full data rates with lengths up to 800’ (244m). Jitter is
the limiting parameter at this faster data rate, so employing
encoded data streams (e.g., Manchester coded or Return-to-Zero)
may allow increased transmission distances. The slow versions
can operate at 115kbps, or less, at the full 4000’ (1220m)
distance, or at 250kbps for lengths up to 3000’ (915m). DC cable
attenuation is the limiting parameter, so using better quality
cables (e.g., 22 AWG) may allow increased transmission
distance.
Twisted pair is the cable of choice for RS-485/RS-422 networks.
Twisted pair cables tend to pick up noise and other
electromagnetically induced voltages as common mode signals,
which are effectively rejected by the differential receivers in
these ICs.
Short networks using the 250kbps versions need not be
terminated, however, terminations are recommended unless
power dissipation is an overriding concern.
In point-to-point, or point-to-multipoint (single driver on bus like
RS-422) networks, the main cable should be terminated in its
characteristic impedance (typically 120Ω) at the end farthest
from the driver. In multi-receiver applications, stubs connecting
receivers to the main cable should be kept as short as possible.
Multipoint (multi-driver) systems require that the main cable be
terminated in its characteristic impedance at both ends. Stubs
connecting a transceiver to the main cable should be kept as
short as possible.
Built-In Driver Overload Protection
As stated previously, the RS-485 specification requires that
drivers survive worst case bus contentions undamaged. These
transceivers meet this requirement via driver output short circuit
current limits, and on-chip thermal shutdown circuitry.
The driver output stages incorporate a double fold-back short
circuit current limiting scheme, which ensures that the output
current never exceeds the RS-485 specification, even at the
common mode and fault condition voltage range extremes. The
first fold-back current level (≈83mA) is set to ensure that the
driver never folds back when driving loads with common mode
voltages up to ±15V. The very low second fold-back current
setting (≈13mA) minimizes power dissipation if the Tx is enabled
when a fault occurs.
In the event of a major short circuit condition, devices also include
a thermal shutdown feature that disables the drivers whenever the
die temperature becomes excessive. This eliminates the power
dissipation, allowing the die to cool. The drivers automatically
re-enable after the die temperature drops about +15°C. If the
contention persists, the thermal shutdown/re-enable cycle repeats
until the fault is cleared. Receivers stay operational during thermal
shutdown.
Low Power Shutdown Mode
These BiCMOS transceivers all use a fraction of the power
required by competitive devices, but they (excluding ISL32437E)
also include a shutdown feature that reduces the already low
quiescent ICC to a 10µA trickle. These devices enter shutdown
whenever the receiver and driver are simultaneously disabled
(RE =V
CC and DE = GND) for a period of at least 600ns.
Disabling both the driver and the receiver for less than 60ns
guarantees that the transceiver will not enter shutdown.
Note that receiver and driver enable times increase when the
transceiver enables from shutdown. Refer to Notes 11, 12, 13,
14 and 15, at the end of the “Electrical Specification” table on
page 9, for more information.
ISL32430E, ISL32432E, ISL32433E, ISL32435E, ISL32437E
FN7920 Rev 0.00 Page 14 of 21
Mar 1, 2012
Typical Performance Curves TA = +25°C; Unless Otherwise Specified.
FIGURE 9. DRIVER OUTPUT CURRENT vs DIFFERENTIAL OUTPUT
VOLTAGE
FIGURE 10. DRIVER DIFFERENTIAL OUTPUT VOLTAGE vs
TEMPERATURE
FIGURE 11. SUPPLY CURRENT vs TEMPERATURE FIGURE 12. RECEIVER OUTPUT CURRENT vs RECEIVER OUTPUT
VOLTAGE
FIGURE 13. BUS PIN CURRENT vs BUS PIN VOLTAGE FIGURE 14. DRIVER OUTPUT CURRENT vs SHORT CIRCUIT VOLTAGE
DIFFERENTIAL OUTPUT VOLTAGE (V)
DRIVER OUTPUT CURRENT (mA)
0
10
20
30
40
50
60
70
80
0 0 . 5 1 1.5 2 2.5 3 3.5 4 4.5 5
+25°C
RD = 54Ω
RD = 100Ω
RD = 30Ω
RD = 20Ω
+85°C
VCC = 5V
VCC = 3.3V
+25°C
+85°C
TEMPERATURE (°C)
DIFFERENTIAL OUTPUT VOLTAGE (V)
1.50
1.75
2.00
2.25
2.50
2.75
3.00
3.25
-40-30-20-100 1020304050607080
VCC = 5V
VCC = 3.3V
RD = 100Ω
RD = 100Ω
RD = 54Ω
RD = 54Ω
1.25
VCC = 5V
VCC = 3.3V
85
1.4
1.5
1.6
1.7
1.8
1.9
2.0
2.1
2.2
-30 -20 -10 0 10 20 30 40 50 60 70 80
TEMPERATURE (°C)
ICC (mA)
DE = VCC, RE = X
DE = GND, RE = GND
-40 85
VCC = 5V
VCC = 3.3V
DE = VCC, RE = X
DE = GND, RE = GND
VCC = 5V
VCC = 3.3V
-60
-40
-20
0
20
40
60
80
0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
RECEIVER OUTPUT VOLTAGE (V)
RECEIVER OUTPUT CURRENT (mA)
VOH, +25°C
VOH, +85°C
VOL, +25°C
VOL, +85°C
VCC = 5V
VCC = 3.3V
VCC = 5V
VCC = 3.3V
VOL, +85°C
VOL, +25°C
VOH, +85°C
VOH, +25°C
BUS PIN VOLTAGE (V)
BUS PIN CURRENT (µA)
-400
-300
-200
-100
0
100
200
300
400
-40 -30 -20 -10 0 10 20 30 40
VCC = 0V to 5.5V
Y OR Z
A/Y OR B/Z
OUTPUT VOLTAGE (V)
OUTPUT CURRENT (mA)
-125
-100
-75
-50
-25
0
25
50
75
100
125
150
-40 -30 -20 -10 0 10 20 30 40
Y OR Z = HIGH
Y OR Z = LOW
VCC = 3.3V, +25°C
VCC = 3.3V, +85°C
VCC = 5V, +25°C
VCC = 5V, +85°C
VCC = 3.3V, +25°C
VCC = 5V, +85°C
VCC = 3.3V, +85°C
VCC = 5V, +25°C
ISL32430E, ISL32432E, ISL32433E, ISL32435E, ISL32437E
FN7920 Rev 0.00 Page 15 of 21
Mar 1, 2012
FIGURE 15. DRIVER DIFFERENTIAL PROPAGATION DELAY vs
TEMPERATURE (ISL32430E, ISL32432E, ISL32437E)
FIGURE 16. DRIVER DIFFERENTIAL SKEW vs TEMPERATURE
(ISL32430E, ISL32432E, ISL32437E)
FIGURE 17. DRIVER DIFFERENTIAL PROPAGATION DELAY vs
TEMPERATURE (ISL32433E, ISL32435E)
FIGURE 18. DRIVER DIFFERENTIAL SKEW vs TEMPERATURE
(ISL32433E, ISL32435E)
FIGURE 19. ±15V RECEIVER PERFORMANCE (ISL32430E,
ISL32432E, ISL32437E)
FIGURE 20. ±15V RECEIVER PERFORMANCE (ISL32433E,
ISL32435E)
Typical Performance Curves TA = +25°C; Unless Otherwise Specified. (Continued)
TEMPERATURE (°C)
PROPAGATION DELAY (ns)
200
210
220
230
240
250
260
270
280
290
300
-40-30-20-100 1020304050607080
tPLH
tPHL
RD = 54Ω, CD = 50pF
VCC = 3.3V
VCC = 5V
tPLH
tPHL
85
TEMPERATURE (°C)
SKEW (ns)
0
1
2
3
4
5
6
7
-40 -30 -20 -10 10 20 30 40 50 60 70 80 85
VCC = 3.3V
VCC = 5V
0
|tPLH - tPHL|
TEMPERATURE (°C)
PROPAGATION DELAY (ns)
50
55
60
65
70
75
-40 -30 -20 -10 0 10 20 30 40 50 60 70 80 85
tPLH
tPHL
RD = 54Ω, CD = 50pF
VCC = 3.3V
VCC = 5V
tPLH
tPHL
TEMPERATURE (°C)
SKEW (ns)
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
-40 -30 -20 -10 0 10 20 30 40 50 60 70 80 85
VCC = 3.3V
VCC = 5V
|tPLH - tPHL|
TIME (1µs/DIV)
VOLTAGE (V)
0
5
10
15
20
-20
-15
-10
-5
0
5RO
A
B
RO
A
B
VCC = 3.3V
VCC = 5V
VCC = 3.3V
VCC = 5V
VID = ±1V
250kbps
TIME (400ns/DIV)
VOLTAGE (V)
0
5
10
15
20
-20
-15
-10
-5
0
5RO
A
B
RO
A
B
VCC = 3.3V
VCC = 5V
VCC = 3.3V
VCC = 5V
VID = ±1V
1Mbps
ISL32430E, ISL32432E, ISL32433E, ISL32435E, ISL32437E
FN7920 Rev 0.00 Page 16 of 21
Mar 1, 2012
FIGURE 21. VCC = 3.3V, DRIVER AND RECEIVER WAVEFORMS
(ISL32430E, ISL32432E, ISL32437E)
FIGURE 22. VCC = 3.3V, DRIVER AND RECEIVER WAVEFORMS
(ISL32433E, ISL32435E)
FIGURE 23. VCC = 5V, DRIVER AND RECEIVER WAVEFORMS
(ISL32430E, ISL32432E, ISL32437E)
FIGURE 24. VCC = 5V, DRIVER AND RECEIVER WAVEFORMS
(ISL32433E, ISL32435E)
FIGURE 25. LOGIC INPUT HIGH VOLTAGE vs TEMPERATURE
Die Characteristics
SUBSTRATE POTENTIAL (POWERED UP) :
GND
PROCESS:
Si Gate BiCMOS
Typical Performance Curves TA = +25°C; Unless Otherwise Specified. (Continued)
TIME (1µs/DIV)
RECEIVER OUTPUT (V)
0
3
DRIVER OUTPUT (V)
0
3
DRIVER INPUT (V)
DI
RO
-2
0
1
2
A/Y - B/Z
-1
RD = 54Ω, CD = 50pF
TIME (400ns/DIV)
RECEIVER OUTPUT (V)
0
3
DRIVER OUTPUT (V)
0
3
DRIVER INPUT (V)
DI
RO
-2
0
1
2
A/Y - B/Z
-1
RD = 54Ω, CD = 50pF
TIME (1µs/DIV)
RECEIVER OUTPUT (V)
0
5
DRIVER OUTPUT (V)
0
5
DRIVER INPUT (V)
DI
RO
-3
-2
-1
0
1
2
3
A/Y - B/Z
RD = 54Ω, CD = 50pF
TIME (400ns/DIV)
RECEIVER OUTPUT (V)
0
5
DRIVER OUTPUT (V)
0
5
DRIVER INPUT (V)
DI
RO
-3
-2
-1
0
1
2
3
A/Y - B/Z
RD = 54Ω, CD = 50pF
TEMPERATURE (°C)
INPUT HIGH VOLTAGE (V)
-40-30-20-100 1020304050607080
85
1.0
1.2
1.4
1.6
1.8
2.0
2.2
2.4
VCC = 5V
VCC = 3.3V
FN7920 Rev 0.00 Page 17 of 21
Mar 1, 2012
ISL32430E, ISL32432E, ISL32433E, ISL32435E, ISL32437E
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in the quality certifications found at www.intersil.com/en/support/qualandreliability.html
Intersil products are sold by description only. Intersil may modify the circuit design and/or specifications of products at any time without notice, provided that such
modification does not, in Intersil's sole judgment, affect the form, fit or function of the product. Accordingly, the reader is cautioned to verify that datasheets are
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subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or
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All trademarks and registered trademarks are the property of their respective owners.
Products
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For a complete listing of Applications, Related Documentation and Related Parts, please see the respective device information page on
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To report errors or suggestions for this datasheet, please go to www.intersil.com/askourstaff
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Revision History
The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to web to make sure you
have the latest Rev.
DATE REVISION CHANGE
March 1, 2012 FN7920.0 Initial Release
ISL32430E, ISL32432E, ISL32433E, ISL32435E, ISL32437E
FN7920 Rev 0.00 Page 18 of 21
Mar 1, 2012
Package Outline Drawing
M8.118
8 LEAD MINI SMALL OUTLINE PLASTIC PACKAGE
Rev 4, 7/11
DETAIL "X"
SIDE VIEW 2
TYPICAL RECOMMENDED LAND PATTERN
TOP VIEW
PIN# 1 ID
0.25 - 0.36
DETAIL "X"
0.10 ± 0.05
(4.40)
(3.00)
(5.80)
H
C
1.10 MAX
0.09 - 0.20
3°±3°
GAUGE
PLANE 0.25
0.95 REF
0.55 ± 0.15
B
0.08 C A-B D
3.0±0.05
12
8
0.85±010
SEATING PLANE
A
0.65 BSC
3.0±0.05 4.9±0.15
(0.40)
(1.40)
(0.65)
D
5
5
SIDE VIEW 1
Dimensioning and tolerancing conform to JEDEC MO-187-AA
Plastic interlead protrusions of 0.15mm max per side are not
Dimensions in ( ) are for reference only.
Dimensions are measured at Datum Plane "H".
Plastic or metal protrusions of 0.15mm max per side are not
Dimensions are in millimeters.
3.
4.
5.
6.
NOTES:
1.
2.
and AMSEY14.5m-1994.
included.
included.
0.10 C
M
ISL32430E, ISL32432E, ISL32433E, ISL32435E, ISL32437E
FN7920 Rev 0.00 Page 19 of 21
Mar 1, 2012
Package Outline Drawing
M8.15
8 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE
Rev 4, 1/12
DETAIL "A"
TOP VIEW
INDEX
AREA
123
-C-
SEATING PLANE
x 45°
NOTES:
1. Dimensioning and tolerancing per ANSI Y14.5M-1994.
2. Package length does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006
inch) per side.
3. Package width does not include interlead flash or protrusions. Interlead
flash and protrusions shall not exceed 0.25mm (0.010 inch) per side.
4. The chamfer on the body is optional. If it is not present, a visual index
feature must be located within the crosshatched area.
5. Terminal numbers are shown for reference only.
6. The lead width as measured 0.36mm (0.014 inch) or greater above the
seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch).
7. Controlling dimension: MILLIMETER. Converted inch dimensions are not
necessarily exact.
8. This outline conforms to JEDEC publication MS-012-AA ISSUE C.
SIDE VIEW “A
SIDE VIEW “B”
1.27 (0.050)
6.20 (0.244)
5.80 (0.228)
4.00 (0.157)
3.80 (0.150)
0.50 (0.20)
0.25 (0.01)
5.00 (0.197)
4.80 (0.189)
1.75 (0.069)
1.35 (0.053)
0.25(0.010)
0.10(0.004)
0.51(0.020)
0.33(0.013)
8°
0°
0.25 (0.010)
0.19 (0.008)
1.27 (0.050)
0.40 (0.016)
1.27 (0.050)
5.20(0.205)
1
2
3
45
6
7
8
TYPICAL RECOMMENDED LAND PATTERN
2.20 (0.087)
0.60 (0.023)
ISL32430E, ISL32432E, ISL32433E, ISL32435E, ISL32437E
FN7920 Rev 0.00 Page 20 of 21
Mar 1, 2012
Mini Small Outline Plastic Packages (MSOP)
NOTES:
1. These package dimensions are within allowable dimensions of
JEDEC MO-187BA.
2. Dimensioning and tolerancing per ANSI Y14.5M-1994.
3. Dimension “D” does not include mold flash, protrusions or gate
burrs and are measured at Datum Plane. Mold flash, protrusion
and gate burrs shall not exceed 0.15mm (0.006 inch) per side.
4. Dimension “E1” does not include interlead flash or protrusions
and are measured at Datum Plane. Interlead flash and
protrusions shall not exceed 0.15mm (0.006 inch) per side.
5. Formed leads shall be planar with respect to one another within
0.10mm (.004) at seating Plane.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. Dimension “b” does not include dambar protrusion. Allowable
dambar protrusion shall be 0.08mm (0.003 inch) total in excess
of “b” dimension at maximum material condition. Minimum space
between protrusion and adjacent lead is 0.07mm (0.0027 inch).
10. Datums and to be determined at Datum plane
.
11. Controlling dimension: MILLIMETER. Converted inch dimen-
sions are for reference only
L
0.25
(0.010)
L1
R1
R
4X
4X
GAUGE
PLANE
SEATING
PLANE
EE1
N
12
TOP VIEW
INDEX
AREA
-C-
-B-
0.20 (0.008) ABC
SEATING
PLANE
0.20 (0.008) C
0.10 (0.004) C
-A-
-H-
SIDE VIEW
b
e
D
A
A1
A2
-B-
END VIEW
0.20 (0.008) CD
E1
C
L
C
a
- H -
-A -
- B -
- H -
M10.118 (JEDEC MO-187BA)
10 LEAD MINI SMALL OUTLINE PLASTIC PACKAGE
SYMBOL
INCHES MILLIMETERS
NOTESMIN MAX MIN MAX
A 0.037 0.043 0.94 1.10 -
A1 0.002 0.006 0.05 0.15 -
A2 0.030 0.037 0.75 0.95 -
b 0.007 0.011 0.18 0.27 9
c 0.004 0.008 0.09 0.20 -
D 0.116 0.120 2.95 3.05 3
E1 0.116 0.120 2.95 3.05 4
e 0.020 BSC 0.50 BSC -
E 0.187 0.199 4.75 5.05 -
L 0.016 0.028 0.40 0.70 6
L1 0.037 REF 0.95 REF -
N10 107
R 0.003 - 0.07 - -
R1 0.003 - 0.07 - -
5o15o5o15o-
0o6o0o6o-
Rev. 0 12/02
ISL32430E, ISL32432E, ISL32433E, ISL32435E, ISL32437E
FN7920 Rev 0.00 Page 21 of 21
Mar 1, 2012
Package Outline Drawing
M14.15
14 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE
Rev 1, 10/09
A
D
4
0.25 A-BMC
C
0.10 C
5B
D
3
0.10 A-BC
4
0.20 C 2X
2X
0.10 DC 2X
H
0.10 C
6
36
ID MARK
PIN NO.1 (0.35) x 45°
SEATING PLANE
GAUGE PLANE
0.25
(5.40)
(1.50)
1.27
0.31-0.51
4° ± 4°
DETAIL"A" 0.22±0.03
0.10-0.25
1.25 MIN
1.75 MAX
(1.27) (0.6)
6.0
8.65
3.9
7
14 8
Dimensioning and tolerancing conform to AMSEY14.5m-1994.
Dimension does not include interlead flash or protrusions.
Dimensions in ( ) for Reference Only.
Interlead flash or protrusions shall not exceed 0.25mm per side.
Datums A and B to be determined at Datum H.
4.
5.
3.
2.
Dimensions are in millimeters.
NOTES:
1.
The pin #1 identifier may be either a mold or mark feature.
6. Does not include dambar protrusion. Allowable dambar protrusion
7. Reference to JEDEC MS-012-AB.
shall be 0.10mm total in excess of lead width at maximum condition.
DETAIL "A"
SIDE VIEW
TYPICAL RECOMMENDED LAND PATTERN
TOP VIEW
Mouser Electronics
Authorized Distributor
Click to View Pricing, Inventory, Delivery & Lifecycle Information:
Intersil:
ISL32430EIBZ-T7A ISL32430EIUZ-T7A ISL32432EIBZ-T7A ISL32432EIUZ-T7A ISL32433EIBZ-T7A
ISL32433EIUZ-T7A ISL32435EIBZ-T7A ISL32435EIUZ-T7A ISL32437EIBZ-T7A ISL32437EIUZ-T7A ISL32430EIUZ-
T ISL32432EIBZ-T ISL32432EIUZ-T ISL32433EIUZ-T ISL32435EIBZ-T ISL32435EIUZ-T ISL32437EIBZ-T
ISL32437EIUZ-T ISL32430EIBZ-T ISL32433EIBZ-T ISL32430EIUZ ISL32432EIUZ ISL32433EIUZ ISL32435EIUZ
ISL32437EIUZ ISL32430EIBZ ISL32433EIBZ ISL32432EIBZ ISL32435EIBZ ISL32437EIBZ
