TPA2005D1-Q1 www.ti.com SLOS474C - AUGUST 2005 - REVISED MARCH 2010 1.4-W MONO FILTER-FREE CLASS-D AUDIO POWER AMPLIFIER Check for Samples: TPA2005D1-Q1 FEATURES 1 * * * * Qualified for Automotive Applications 1.4 W Into 8 From a 5-V Supply at THD = 10% (Typ) Maximum Battery Life and Minimum Heat - Efficiency With an 8- Speaker: - 84% at 400 mW - 79% at 100 mW - 2.8-mA Quiescent Current - 0.5-mA Shutdown Current Only Three External Components - Optimized PWM Output Stage Eliminates LC Output Filter - Internally Generated 250-kHz Switching Frequency Eliminates Capacitor and Resistor - Improved PSRR (-71 dB at 217 Hz) and Wide Supply Voltage (2.5 V to 5.5 V) Eliminates Need for a Voltage Regulator - Fully Differential Design Reduces RF Rectification and Eliminates Bypass Capacitor - Improved CMRR Eliminates Two Input Coupling Capacitors * Space-Saving Packages - 3 mm x 3 mm QFN package (DRB) - 3 mm x 5 mm MSOP PowerPADTM Package (DGN) DESCRIPTION The TPA2005D1 is a 1.4-W high-efficiency filter-free class-D audio power amplifier in a QFN or MSOP package that requires only three external components. Features like 84% efficiency, -71-dB PSRR at 217 Hz, improved RF-rectification immunity, and 15-mm2 total PCB area make the TPA2005D1 ideal for cellular handsets. A fast start-up time of 9 ms with minimal pop makes the TPA2005D1 ideal for PDA applications. In cellular handsets, the earpiece, speaker phone, and melody ringer can each be driven by the TPA2005D1. The device allows independent gain control by summing the signals from each function, while minimizing noise to only 48 mVRMS. APPLICATION CIRCUIT To Battery Internal Oscillator + RI - RI CS IN- _ Differential Input VDD PWM VO+ H- Bridge VO- + IN+ GND SHUTDOWN Bias Circuitry TPA2005D1 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright (c) 2005-2010, Texas Instruments Incorporated TPA2005D1-Q1 SLOS474C - AUGUST 2005 - REVISED MARCH 2010 www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. ORDERING INFORMATION (1) TA PACKAGE (2) ORDERABLE PART NUMBER TOP-SIDE MARKING QFN - DRB Reel of 3000 TPA2005D1DRBRQ1 BIQ MSOP - DGN Reel of 2500 TPA2005D1DGNRQ1 2005I -40C to 105C MSOP - DGN Reel of 2500 TPA2005D1TDGNRQ1 2005T -40C to 85C (1) (2) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI web site at www.ti.com. Package drawings, thermal data, and symbolization are available at www.ti.com/packaging. ABSOLUTE MAXIMUM RATINGS over operating free-air temperature range unless otherwise noted (1) VDD Supply voltage range (2) VI Input voltage range In active mode -0.3 V to 6 V In SHUTDOWN mode -0.3 V to 7 V -0.3 V to (VDD + 0.3 V) Continuous total power dissipation See Dissipation Rating Table Industrial range -40C to 85C T-suffix range -40C to 105C TA Operating free-air temperature range TJ Operating junction temperature range -40C to 150C Tstg Storage temperature range -65C to 85C (1) (2) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. For the MSOP (DGN) package option, the maximum VDD should be limited to 5 V if short-circuit protection is desired. RECOMMENDED OPERATING CONDITIONS MIN MAX UNIT VDD Supply voltage 2.5 5.5 V VIH High-level input voltage SHUTDOWN 2 VDD V VIL Low-level input voltage SHUTDOWN 0 0.7 V RI Input resistor Gain 20 V/V (26 dB) 15 VIC Common-mode input voltage range VDD = 2.5 V, 5.5 V, CMRR -49 dB 0.5 VDD - 0.8 V TA Operating free-air temperature -40 85 C k DISSIPATION RATINGS 2 TA 25C POWER RATING PACKAGE DERATING FACTOR TA = 70C POWER RATING DRB 21.8 mW/C 2.7 W 1.7 W 1.4 W DGN 17.1 mW/C 2.13 W 1.36 W 1.11 W Submit Documentation Feedback TA = 85C POWER RATING Copyright (c) 2005-2010, Texas Instruments Incorporated Product Folder Link(s): TPA2005D1-Q1 TPA2005D1-Q1 www.ti.com SLOS474C - AUGUST 2005 - REVISED MARCH 2010 ELECTRICAL CHARACTERISTICS TA = -40C to 85C (unless otherwise noted) PARAMETER TEST CONDITIONS |VOS| Output offset voltage (measured differentially) VI = 0 V, AV = 2 V/V, VDD = 2.5 V to 5.5 V PSRR Power-supply rejection ratio VDD = 2.5 V to 5.5 V CMRR Common-mode rejection ratio VDD = 2.5 V to 5.5 V, VIC = VDD/2 to 0.5 V, VIC = VDD/2 to VDD - 0.8 V |IIH| High-level input current VDD = 5.5 V, VI = 5.8 V |IIL| Low-level input current VDD = 5.5 V, VI = 0.3 V I(Q) Quiescent current I(SD) Shutdown current rDS(on) Static drain-source on-state resistance f(sw) MIN TYP TA = 25C mV -75 -55 dB -68 -49 TA = -40C to 85C -35 50 TA = -40C to 85C 4 TA = -40C to 105C 12 3.4 VDD = 3.6 V, no load 2.8 VDD = 2.5 V, no load 2.2 TA = -40C to 85C V (SHUTDOWN) = 0.8 V, VDD = 2.5 V to 5.5 V 590 VDD = 5.5 V 500 V (SHUTDOWN) = 0.8 V VDD = 2.5 V to 5.5 V 2 Gain 2 142 kW RI k 250 2 150 kW RI mA m >1 200 mA mA 2.5 770 mA 3.2 0.5 VDD = 3.6 V dB 4.5 TA = -40C to 105C VDD = 2.5 V Switching frequency UNIT 25 VDD = 5.5 V, no load Output impedance in SHUTDOWN MAX 300 2 158 kW RI kHz V V OPERATING CHARACTERISTICS TA = 25C, Gain = 2 V/V, RL = 8 (unless otherwise noted) PARAMETER TEST CONDITIONS THD + N= 1%, f = 1 kHz, RL = 8 PO Output power THD + N= 10%, f = 1 kHz, RL = 8 THD+N Total harmonic distortion plus noise MIN TYP VDD = 5 V 1.18 VDD = 3.6 V 0.58 VDD = 2.5 V 0.26 VDD = 5 V 1.45 VDD = 3.6 V 0.75 VDD = 2.5 V 0.35 MAX UNIT W W PO = 1 W, f = 1 kHz, RL = 8 VDD = 5 V 0.18% PO = 0.5 W, f = 1 kHz, RL = 8 VDD = 3.6 V 0.19% PO = 200 mW, f = 1 kHz, RL = 8 VDD = 2.5 V 0.20% VDD = 3.6 V -71 dB dB kSVR Supply ripple rejection ratio f = 217 Hz, V(RIPPLE) = 200 mVpp, Inputs ac-grounded with Ci = 2 mF SNR Signal-to-noise ratio PO= 1 W, RL = 8 VDD = 5 V 97 48 A weighting 36 Vn Output voltage noise VDD = 3.6 V, f = 20 Hz to 20 kHz, Inputs ac-grounded with Ci = 2 mF No weighting CMRR Common-mode rejection ratio VIC = 1 Vpp , f = 217 Hz VDD = 3.6 V ZI Input impedance Start-up time from shutdown -63 142 VDD = 3.6 V mVRMS 150 dB 158 9 Submit Documentation Feedback Copyright (c) 2005-2010, Texas Instruments Incorporated Product Folder Link(s): TPA2005D1-Q1 k ms 3 TPA2005D1-Q1 SLOS474C - AUGUST 2005 - REVISED MARCH 2010 www.ti.com PIN ASSIGNMENTS 8-PIN QFN (DRB) PACKAGE (TOP VIEW) SHUTDOWN NC 1 8-PIN MSOP (DGN) PACKAGE (TOP VIEW) 8 V O- 2 SHUTDOWN 1 8 VO- NC 2 7 GND IN+ 3 6 VDD IN- 4 5 VO+ 7 GND IN+ 3 6 VDD IN- 4 5 VO+ NC - No internal connection A. The shaded terminals are used for electrical and thermal connections to the ground plane. All of the shaded terminals must be electrically connected to ground. No connect (NC) terminals still need a pad and trace. B. The thermal pad of the DRB and DGN packages must be electrically and thermally connected to a ground plane. Terminal Functions TERMINAL NAME I/O NO. DESCRIPTION IN- 4 I Negative differential input IN+ 3 I Positive differential input VDD 6 I Power supply VO+ 5 O Positive BTL output GND 7 I High-current ground VO- 8 O Negative BTL output SHUTDOWN 1 I Shutdown terminal (active low logic) NC 2 No internal connection Thermal Pad Must be soldered to a grounded pad on the PCB. FUNCTIONAL BLOCK DIAGRAM Gain = 2 V/V VDD B4, C4 VDD 150 k IN- D1 _ + + _ Deglitch Logic Gate Drive + _ Deglitch Logic Gate Drive A4 VO- _ + _ + + _ IN+ C1 150 k SHUTDOWN 4 A1 TTL SD Input Buffer Biases and References Ramp Generator Startup & Thermal Protection Logic D4 VO+ Short Circuit Detect GND A2, A3, B3, C2, C3, D2, D3 (terminal labels for MicroStar Junior package) Submit Documentation Feedback Copyright (c) 2005-2010, Texas Instruments Incorporated Product Folder Link(s): TPA2005D1-Q1 TPA2005D1-Q1 www.ti.com SLOS474C - AUGUST 2005 - REVISED MARCH 2010 TYPICAL CHARACTERISTICS Table of Graphs FIGURE PD Efficiency vs Output power 1, 2 Power dissipation vs Output power 3 Supply current vs Output power 4, 5 I(Q) Quiescent current vs Supply voltage 6 I(SD) Shutdown current vs Shutdown voltage 7 PO Output power THD+N Total harmonic distortion plus noise vs Supply voltage 8 vs Load resistance 9, 10 vs Output power 11, 12 vs Frequency 13, 14, 15, 16 vs Common-mode input voltage kSVR Supply-voltage rejection ratio GSM power-supply rejection CMRR 17 vs Frequency Common-mode rejection ratio 18, 19, 20 vs Common-mode input voltage 21 vs Time 22 vs Frequency 23 vs Frequency 24 vs Common-mode input voltage 25 TEST SETUP FOR GRAPHS CI TPA2005D1 RI IN+ + Measurement Output - CI OUT+ Load RI IN- VDD + OUT- 30 kHz Low Pass Filter + Measurement Input - GND 1 F VDD - A. CI was shorted for any common-mode input voltage measurement. B. A 33-mH inductor was placed in series with the load resistor to emulate a small speaker for efficiency measurements. C. The 30-kHz low-pass filter is required, even if the analyzer has a low-pass filter. An RC filter (100 , 47 nF) is used on each output for the data sheet graphs. Submit Documentation Feedback Copyright (c) 2005-2010, Texas Instruments Incorporated Product Folder Link(s): TPA2005D1-Q1 5 TPA2005D1-Q1 SLOS474C - AUGUST 2005 - REVISED MARCH 2010 www.ti.com EFFICIENCY vs OUTPUT POWER EFFICIENCY vs OUTPUT POWER 90 RL = 32 , 33 H 90 80 70 60 50 40 50 40 Class-AB, RL = 8 20 10 Class-AB, VDD = 5 V, RL = 8 30 20 10 VDD = 3.6 0 0 0 0.1 0.2 0.3 0.4 0.5 0 0.6 0.2 0.4 0.6 0.8 1 0.1 VDD = 5 V, RL = 8 , 33 H 0 0.2 0.4 0.6 0.8 SUPPLY CURRENT vs OUTPUT POWER SUPPLY CURRENT vs OUTPUT POWER QUIESCENT CURRENT vs SUPPLY VOLTAGE 300 I (Q) - Quiescent Current - mA 150 100 200 150 VDD = 5 V, RL = 8 , 33 H 100 50 VDD = 3.6 V, RL = 8 , 33 H 50 RL = 32 , 33 H 0 0.1 0.2 0.3 0.4 PO - Output Power - W VDD = 2.5 V, RL = 8 , 33 H 0 0.5 0 0.6 0.2 0.4 3.4 3 2.8 No Load 2.6 2.4 2.2 0.6 0.8 1 2 1.2 2.5 3 3.5 4 4.5 VDD - Supply Voltage - V Figure 5. Figure 6. SHUTDOWN CURRENT vs SHUTDOWN VOLTAGE OUTPUT POWER vs SUPPLY VOLTAGE OUTPUT POWER vs LOAD RESISTANCE 1.6 1.4 0.7 0.6 VDD = 2.5 V 0.5 0.4 VDD = 3.6 V 0.3 VDD = 5 V 1.4 RL = 8 f = 1 kHz Gain = 2 V/V VDD = 5 V 1.2 1 THD+N = 10% 0.8 0.6 THD+N = 1% 0.4 0.2 0.2 0.1 0.1 0.2 0.3 0.4 0.5 0.6 0.7 Shutdown Voltage - V Figure 7. 0.8 1 VDD = 3.6 V 0.8 VDD = 2.5 V 0.6 0.4 0.2 0 0 f = 1 kHz THD+N = 1% Gain = 2 V/V 1.2 PO - Output Power - W PO - Output Power - W 0.8 5.5 RL = 8 , 33 H 3.2 Figure 4. 1 5 3.6 PO - Output Power - W 0.9 1.2 3.8 250 RL = 8 , 33 H 1 PO - Output Power - W Figure 3. Supply Current - mA Supply Current - mA VDD = 3.6 V, RL = 8 , 33 H 0.2 Figure 2. 200 I (SD) - Shutdown Current - A 0.3 0 1.2 VDD = 3.6 V 6 0.4 Figure 1. 250 0 Class-AB, VDD = 3.6 V, RL = 8 0.5 PO - Output Power - W PO - Output Power - W 0 Class-AB, VDD = 5 V, RL = 8 0.6 VDD = 2.5 V, RL= 8 , 33 H 60 Efficiency - % RL = 16 , 33 H 30 VDD = 5 V, RL = 8 , 33 H 80 RL = 8 , 33 H 70 0.7 PD - Power Dissipation - W 100 Efficiency - % POWER DISSIPATION vs OUTPUT POWER 2.5 3 3.5 4 4.5 VDD - Supply Voltage - V Figure 8. Submit Documentation Feedback 5 0 8 12 16 20 24 28 32 RL - Load Resistance - Figure 9. Copyright (c) 2005-2010, Texas Instruments Incorporated Product Folder Link(s): TPA2005D1-Q1 TPA2005D1-Q1 SLOS474C - AUGUST 2005 - REVISED MARCH 2010 TOTAL HARMONIC DISTORTION + NOISE vs OUTPUT POWER 1.6 f = 1 kHz THD+N = 10% Gain = 2 V/V PO - Output Power - W 1.4 1.2 VDD = 5 V 1 VDD = 3.6 V 0.8 VDD = 2.5 V 0.6 0.4 0.2 0 8 12 16 20 24 28 32 THD+N - Total Harmonic Distortion + Noise - % OUTPUT POWER vs LOAD RESISTANCE RL - Load Resistance - 30 20 RL = 8 , f = 1 kHz, Gain = 2 V/V 10 5 2.5 V 2 3.6 V 1 5V 0.5 0.2 0.1 0.01 0.1 1 2 TOTAL HARMONIC DISTORTION + NOISE vs OUTPUT POWER THD+N - Total Harmonic Distortion + Noise - % www.ti.com 30 20 RL = 16 , f = 1 kHz, Gain = 2 V/V 10 5 2.5 V 2 3.6 V 1 5V 0.5 0.2 0.1 0.01 0.1 1 2 Figure 11. Figure 12. TOTAL HARMONIC DISTORTION + NOISE vs FREQUENCY TOTAL HARMONIC DISTORTION + NOISE vs FREQUENCY TOTAL HARMONIC DISTORTION + NOISE vs FREQUENCY 10 VDD = 5 V CI = 2 F RL = 8 Gain = 2 V/V 5 2 1 0.5 0.2 50 mW 0.1 1W 0.05 0.02 0.008 250 mW 20 100 1k f - Frequency - Hz 20 k 10 VDD = 3.6 V CI = 2 F RL = 8 Gain = 2 V/V 5 2 1 0.5 0.2 500 mW 25 mW 0.1 0.05 125 mW 0.02 0.01 20 100 1k 20 k THD+N - Total Harmonic Distortion + Noise - % Figure 10. THD+N - Total Harmonic Distortion + Noise - % PO - Output Power - W THD+N - Total Harmonic Distortion + Noise - % PO - Output Power - W 10 VDD = 2.5 V CI = 2 F RL = 8 Gain = 2 V/V 5 2 1 15 mW 75 mW 0.5 0.2 0.1 200 mW 0.05 0.02 0.01 20 100 1k 20 k f - Frequency - Hz f - Frequency - Hz TOTAL HARMONIC DISTORTION + NOISE vs FREQUENCY TOTAL HARMONIC DISTORTION + NOISE vs COMMON MODE INPUT VOLTAGE SUPPLY-VOLTAGE REJECTION RATIO vs FREQUENCY VDD = 3.6 V CI = 2 F RL = 16 Gain = 2 V/V 5 2 1 0.5 0.2 15 mW 0.1 75 mW 0.05 0.02 0.01 200 mW 20 100 1k 20 k f - Frequency - Hz Figure 16. 10 f = 1 kHz PO = 200 mW 1 VDD = 2.5 V VDD = 3.6 V 0.1 k 10 - Supply Voltage Rejection Ratio - dB SVR Figure 15. THD+N - Total Harmonic Distortion + Noise - % Figure 14. THD+N - Total Harmonic Distortion + Noise - % Figure 13. 0 0.5 1 1.5 2 2.5 3 3.5 VIC - Common Mode Input Voltage - V Figure 17. 0 CI = 2 F RL = 8 Vp-p = 200 mV Inputs ac-Grounded Gain = 2 V/V -10 -20 -30 -40 VDD = 3.6 V -50 VDD =2. 5 V -60 -70 VDD = 5 V -80 20 100 1k f - Frequency - Hz Figure 18. Submit Documentation Feedback Copyright (c) 2005-2010, Texas Instruments Incorporated Product Folder Link(s): TPA2005D1-Q1 20 k 7 TPA2005D1-Q1 SLOS474C - AUGUST 2005 - REVISED MARCH 2010 VDD = 2. 5 V -40 -50 VDD = 5 V -60 -70 VDD = 3.6 V -80 20 100 1k f - Frequency - Hz 20 k -30 CI = 2 F RL = 8 Inputs Floating Gain = 2 V/V -40 -50 -60 VDD = 3.6 V -70 -80 -90 -100 20 Figure 19. 100 1k f - Frequency - Hz f = 217 Hz RL = 8 Gain = 2 V/V -10 -20 -30 -40 VDD = 2.5 V -50 VDD = 3.6 V -60 -70 -80 VDD = 5 V -90 20 k 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 VIC - Common Mode Input Voltage - V Figure 20. Figure 21. GSM POWER-SUPPLY REJECTION vs TIME GSM POWER-SUPPLY REJECTION vs FREQUENCY 0 C1 - Duty 12.6% Voltage - V C1 Frequency 216.7448 Hz C1 - Amplitude 512 mV C1 - High 3.544 V VOUT -50 -100 VO - Output Voltage - dBV VDD VDD Shown in Figure 22 CI = 2 F, Inputs ac-grounded Gain = 2V/V 0 -50 -100 -150 0 400 800 1200 1600 2000 f - Frequency - Hz Figure 22. Figure 23. COMMON-MODE REJECTION RATIO vs FREQUENCY COMMON-MODE REJECTION RATIO vs COMMON-MODE INPUT VOLTAGE 0 -10 -20 CMRR - Common Mode Rejection Ratio - dB CMRR - Common Mode Rejection Ratio - dB t - Time - ms VDD = 2.5 V to 5 V VIC = 1 Vp-p RL = 8 Gain = 2 V/V -30 -40 -50 -60 -70 20 100 1k f - Frequency - Hz 0 RL = 8 Gain = 2 V/V -10 -20 -30 -40 VDD = 2.5 V VDD = 3.6 V -50 -60 -70 -80 VDD = 5 V -90 -100 20 k Figure 24. 8 -150 V DD - Supply Voltage - dBV -30 -20 - Supply Voltage Rejection Ratio - dB -20 0 0 -10 SVR Gain = 5 V/V CI = 2 F RL = 8 Vp-p = 200 mV Inputs ac-Grounded -10 SUPPLY-VOLTAGE REJECTION RATIO vs COMMON-MODE INPUT VOLTAGE k - Supply Voltage Rejection Ratio - dB SVR 0 SUPPLY-VOLTAGE REJECTION RATIO vs FREQUENCY k k - Supply Voltage Rejection Ratio - dB SVR SUPPLY-VOLTAGE REJECTION RATIO vs FREQUENCY www.ti.com 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 VIC - Common Mode Input Voltage - V 5 Figure 25. Submit Documentation Feedback Copyright (c) 2005-2010, Texas Instruments Incorporated Product Folder Link(s): TPA2005D1-Q1 TPA2005D1-Q1 www.ti.com SLOS474C - AUGUST 2005 - REVISED MARCH 2010 APPLICATION INFORMATION FULLY DIFFERENTIAL AMPLIFIER The TPA2005D1 is a fully differential amplifier with differential inputs and outputs. The fully differential amplifier consists of a differential amplifier and a common-mode amplifier. The differential amplifier ensures that the amplifier outputs a differential voltage on the output that is equal to the differential input times the gain. The common-mode feedback ensures that the common-mode voltage at the output is biased around VDD/2, regardless of the common-mode voltage at the input. The fully differential TPA2005D1 can still be used with a single-ended input; however, the TPA2005D1 should be used with differential inputs when in a noisy environment, like a wireless handset, to ensure maximum noise rejection. Advantages of Fully Differential Amplifiers * Input-coupling capacitors not required: - The fully differential amplifier allows the inputs to be biased at a voltage other than mid-supply. For example, if a codec has a mid-supply lower than the mid-supply of the TPA2005D1, the common-mode feedback circuit adjusts, and the TPA2005D1 outputs still is biased at mid-supply of the TPA2005D1. The inputs of the TPA2005D1 can be biased from 0.5 V to VDD - 0.8 V. If the inputs are biased outside of that range, input-coupling capacitors are required. * Mid-supply bypass capacitor, C(BYPASS), not required: - The fully differential amplifier does not require a bypass capacitor. This is because any shift in the mid-supply affects both positive and negative channels equally and cancels at the differential output. * Better RF immunity: - GSM handsets save power by turning on and shutting off the RF transmitter at a rate of 217 Hz. The transmitted signal is picked up on input and output traces. The fully differential amplifier cancels the signal much better than the typical audio amplifier. COMPONENT SELECTION Figure 26 shows the TPA2005D1 typical schematic with differential inputs, and Figure 27 shows the TPA2005D1 with differential inputs and input capacitors, and Figure 28 shows the TPA2005D1 with single-ended inputs. Differential inputs should be used whenever possible, because the single-ended inputs are much more susceptible to noise. Table 1. Typical Component Values REF DES VALUE EIA SIZE MANUFACTURER RI 150 k (0.5%) 0402 Panasonic ERJ2RHD154V CS 1 mF (+22%, -80%) 0402 Murata GRP155F50J105Z 3.3 nF (10%) 0201 Murata GRP033B10J332K CI (1) (1) PART NUMBER CI is needed only for single-ended input or if VICM is not between 0.5 V and VDD - 0.8 V. CI = 3.3 nF (with RI = 150 k) gives a high-pass corner frequency of 321 Hz. To Battery Internal Oscillator + RI - RI CS IN- _ Differential Input VDD PWM H- Bridge VO+ VO- + IN+ GND SHUTDOWN Bias Circuitry TPA2005D1 Filter-Free Class D Figure 26. Typical TPA2005D1 Application Schematic With Differential Input for a Wireless Phone Submit Documentation Feedback Copyright (c) 2005-2010, Texas Instruments Incorporated Product Folder Link(s): TPA2005D1-Q1 9 TPA2005D1-Q1 SLOS474C - AUGUST 2005 - REVISED MARCH 2010 www.ti.com To Battery CI Internal Oscillator RI CI RI CS IN- PWM _ Differential Input VDD H- Bridge VO+ VO- + IN+ GND Bias Circuitry SHUTDOWN TPA2005D1 Filter-Free Class D Figure 27. TPA2005D1 Application Schematic With Differential Input and Input Capacitors To Battery CI Single-ended Input Internal Oscillator RI CS IN- _ RI VDD PWM H- Bridge VO- + IN+ CI SHUTDOWN VO+ GND Bias Circuitry TPA2005D1 Filter-Free Class D Figure 28. TPA2005D1 Application Schematic With Single-Ended Input 10 Submit Documentation Feedback Copyright (c) 2005-2010, Texas Instruments Incorporated Product Folder Link(s): TPA2005D1-Q1 TPA2005D1-Q1 www.ti.com SLOS474C - AUGUST 2005 - REVISED MARCH 2010 Input Resistors (RI) The input resistors (RI) set the gain of the amplifier according to equation Equation 1. Gain + 2 150 kW R I (1) Resistor matching is very important in fully differential amplifiers. The balance of the output on the reference voltage depends on matched ratios of the resistors. CMRR, PSRR, and cancellation of the second harmonic distortion diminish if resistor mismatch occurs. Therefore, it is recommended to use 1% tolerance resistors, or better, to keep the performance optimized. Matching is more important than overall tolerance. Resistor arrays with 1% matching can be used with a tolerance greater than 1%. Place the input resistors very close to the TPA2005D1 to limit noise injection on the high-impedance nodes. For optimal performance, the gain should be set to 2 V/V or lower. Lower gain allows the TPA2005D1 to operate at its best and keeps a high voltage at the input, making the inputs less susceptible to noise. Decoupling Capacitor (CS) The TPA2005D1 is a high-performance class-D audio amplifier that requires adequate power-supply decoupling to ensure the efficiency is high and total harmonic distortion (THD) is low. For higher frequency transients, spikes, or digital hash on the line, a good low equivalent-series-resistance (ESR) ceramic capacitor, typically 1 mF, placed as close as possible to the device VDD lead, works best. Placing this decoupling capacitor close to the TPA2005D1 is very important for the efficiency of the class-D amplifier, because any resistance or inductance in the trace between the device and the capacitor can cause a loss in efficiency. For filtering lower-frequency noise signals, a 10-mF, or greater, capacitor placed near the audio power amplifier also helps, but it is not required in most applications because of the high PSRR of this device. Input Capacitors (CI) The TPA2005D1 does not require input coupling capacitors if the design uses a differential source that is biased from 0.5 V to VDD - 0.8 V (shown in Figure 26). If the input signal is not biased within the recommended common-mode input range, if needing to use the input as a high pass filter (shown in Figure 27), or if using a single-ended source (shown in Figure 28), input coupling capacitors are required. The input capacitors and input resistors form a high-pass filter with the corner frequency, fc, determined in Equation 2. 1 fc + 2p R C I I (2) The value of the input capacitor is important to consider, as it directly affects the bass (low frequency) performance of the circuit. Speakers in wireless phones usually cannot respond well to low frequencies, so the corner frequency can be set to block low frequencies in this application. Equation 3 is reconfigured to solve for the input coupling capacitance. 1 C + I 2p R f c I (3) If the corner frequency is within the audio band, the capacitors should have a tolerance of 10% or better, because any mismatch in capacitance causes an impedance mismatch at the corner frequency and below. For a flat low-frequency response, use large input coupling capacitors (1 mF). However, in a GSM phone the ground signal is fluctuating at 217 Hz, but the signal from the codec does not have the same 217-Hz fluctuation. The difference between the two signals is amplified, sent to the speaker, and heard as a 217-Hz hum. Submit Documentation Feedback Copyright (c) 2005-2010, Texas Instruments Incorporated Product Folder Link(s): TPA2005D1-Q1 11 TPA2005D1-Q1 SLOS474C - AUGUST 2005 - REVISED MARCH 2010 www.ti.com SUMMING INPUT SIGNALS WITH THE TPA2005D1 Most wireless phones or PDAs need to sum signals at the audio power amplifier or just have two signal sources that need separate gain. The TPA2005D1 makes it easy to sum signals or use separate signal sources with different gains. Many phones now use the same speaker for the earpiece and ringer, where the wireless phone would require a much lower gain for the phone earpiece than for the ringer. PDAs and phones that have stereo headphones require summing of the right and left channels to output the stereo signal to the mono speaker. Summing Two Differential Input Signals Two extra resistors are needed for summing differential signals (a total of 5 components). The gain for each input source can be set independently (see Equation 4 and Equation 5 and Figure 29). V V Gain 1 + O + 2 150 kW V R V I1 I1 (4) V V Gain 2 + O + 2 150 kW V R V I2 I2 (5) If summing left and right inputs with a gain of 1 V/V, use RI1= RI2= 300 k. If summing a ring tone and a phone signal, set the ring-tone gain to gain 2 = 2 V/V, and the phone gain to gain 1 = 0.1 V/V. The resistor values are: * RI1 = 3 M and RI2 = 150 k. Differential Input 1 + RI1 - RI1 + RI2 To Battery Internal Oscillator CS IN- _ Differential Input 2 - VDD PWM H- Bridge VO- + RI2 VO+ IN+ GND Bias Circuitry SHUTDOWN Filter-Free Class D Figure 29. Application Schematic With TPA2005D1 Summing Two Differential Inputs Summing a Differential Input Signal and a Single-Ended Input Signal Figure 30 shows how to sum a differential input signal and a single-ended input signal. Ground noise can couple in through IN+ with this method. It is better to use differential inputs. The corner frequency of the single-ended input is set by CI2, shown in Equation 8. To ensure that each input is balanced, the single-ended input must be driven by a low-impedance source even if the input is not in use. V V Gain 1 + O + 2 150 kW V R V I1 I1 (6) V V Gain 2 + O + 2 150 kW V R V I2 I2 (7) 1 C + I2 2p R f I2 c2 (8) 12 Submit Documentation Feedback Copyright (c) 2005-2010, Texas Instruments Incorporated Product Folder Link(s): TPA2005D1-Q1 TPA2005D1-Q1 www.ti.com SLOS474C - AUGUST 2005 - REVISED MARCH 2010 If summing a ring tone and a phone signal, the phone signal should use a differential input signal while the ring tone might be limited to a single-ended signal. If phone gain is set at gain 1 = 0.1 V/V, and the ring-tone gain is set to gain 2 = 2 V/V, the resistor values are: * RI1 = 3 M and RI2 = 150 k. The high-pass corner frequency of the single-ended input is set by CI2. If the desired corner frequency is less than 20 Hz, then: 1 C u I2 2p 150kW 20Hz (9) C I2 u 53pF (10) RI1 Differential Input 1 Single-Ended Input 2 RI1 To Battery Internal Oscillator CI2 R I2 VDD CS IN- _ PWM H- Bridge VO- + RI2 VO+ IN+ CI2 GND Bias Circuitry SHUTDOWN Filter-Free Class D Figure 30. Application Schematic With TPA2005D1 Summing Differential Input and Single-Ended Input Signals Summing Two Single-Ended Input Signals Four resistors and three capacitors are needed for summing single-ended input signals. The gain and corner frequencies (fc1 and fc2) for each input source can be set independently (see Equation 11 through Equation 14 and Figure 31). Resistor, RP, and capacitor, CP, are needed on the IN+ terminal to match the impedance on the IN- terminal. The single-ended inputs must be driven by low-impedance sources, even if one of the inputs is not outputting an ac signal. V V Gain 1 + O + 2 150 kW V R V I1 I1 (11) V V Gain 2 + O + 2 150 kW V R V I2 I2 (12) 1 C + I1 2p R f I1 c1 (13) 1 C + I2 2p R f I2 c2 (14) C +C ) C P I1 I2 (15) R R I2 R + I1 P R ) R I1 I2 (16) Submit Documentation Feedback Copyright (c) 2005-2010, Texas Instruments Incorporated Product Folder Link(s): TPA2005D1-Q1 13 TPA2005D1-Q1 SLOS474C - AUGUST 2005 - REVISED MARCH 2010 Single-Ended Input 1 Single-Ended Input 2 www.ti.com CI1 R I1 To Battery CI2 R I2 Internal Oscillator CS IN- _ RP VDD PWM H- Bridge VO+ VO- + IN+ CP GND SHUTDOWN Bias Circuitry Filter-Free Class D Figure 31. Application Schematic With TPA2005D1 Summing Two Single-Ended Inputs EFFICIENCY AND THERMAL INFORMATION The maximum ambient temperature depends on the heat-sinking ability of the PCB system. The derating factor for the 2,5-mm x 2,5-mm MicroStar Junior package is shown in the dissipation rating table. Converting this to qJA: 1 q + + 1 + 62.5CW JA 0.016 Derating Factor (17) Given qJA of 62.5C/W, the maximum allowable junction temperature of 150C, and the maximum internal dissipation of 0.2 W (worst case 5-V supply), the maximum ambient temperature can be calculated with equation Equation 18. T Max + T Max * q P + 150 * 62.5 (0.2) + 137.5C A J JA Dmax (18) Equation 18 shows that the calculated maximum ambient temperature is 137.5C at maximum power dissipation with a 5-V supply; however, the maximum ambient temperature of the package is limited to 85C. Because of the efficiency of the TPA2005D1, it can be operated under all conditions to an ambient temperature of 85C. The TPA2005D1 is designed with thermal protection that turns the device off when the junction temperature surpasses 150C to prevent damage to the IC. Also, using speakers more resistive than 8 dramatically increases the thermal performance by reducing the output current and increasing the efficiency of the amplifier. BOARD LAYOUT Component Location Place all the external components very close to the TPA2005D1. The input resistors need to be very close to the TPA2005D1 input pins so noise does not couple on the high-impedance nodes between the input resistors and the input amplifier of the TPA2005D1. Placing the decoupling capacitor, CS, close to the TPA2005D1 is important for the efficiency of the class-D amplifier. Any resistance or inductance in the trace between the device and the capacitor can cause a loss in efficiency. Trace Width Make the high current traces going to pins VDD, GND, VO+ and VO- of the TPA2005D1 have a minimum width of 0,7 mm. If these traces are too thin, the TPA2005D1 performance and output power will decrease. The input traces do not need to be wide, but do need to run side-by-side to enable common-mode noise cancellation. 8-Pin QFN (DRB) Layout Use the following land pattern for board layout with the 8-pin QFN (DRB) package. Note that the solder paste should use a hatch pattern to fill solder paste at 50% to ensure that there is not too much solder paste under the package. 14 Submit Documentation Feedback Copyright (c) 2005-2010, Texas Instruments Incorporated Product Folder Link(s): TPA2005D1-Q1 TPA2005D1-Q1 www.ti.com SLOS474C - AUGUST 2005 - REVISED MARCH 2010 0,7 mm 0,33 mm plugged vias (5 places) 1,4 mm 0,38 mm 0,65 mm 1,95 mm Solder Mask: 1,4 mm x 1,85 mm centered in package Make solder paste a hatch pattern to fill 50% 3,3 mm Figure 32. TPA2005D1 8-Pin QFN (DRB) Board Layout (Top View) ELIMINATING THE OUTPUT FILTER WITH THE TPA2005D1 This section focuses on why the user can eliminate the output filter with the TPA2005D1. Effect on Audio The class-D amplifier outputs a pulse-width modulated (PWM) square wave, which is the sum of the switching waveform and the amplified input audio signal. The human ear acts as a band-pass filter such that only the frequencies between approximately 20 Hz and 20 kHz are passed. The switching frequency components are much greater than 20 kHz, so the only signal heard is the amplified input audio signal. Traditional Class-D Modulation Scheme The traditional class-D modulation scheme, which is used in the TPA005Dxx family, has a differential output in which each output is 180 degrees out of phase and changes from ground to the supply voltage, VDD. Therefore, the differential pre-filtered output varies between positive and negative VDD, where filtered 50% duty cycle yields 0 V across the load. The traditional class-D modulation scheme with voltage and current waveforms is shown in Figure 33. Note that, even at an average of 0 V across the load (50% duty cycle), the current to the load is high, causing a high loss and thus causing a high supply current. Submit Documentation Feedback Copyright (c) 2005-2010, Texas Instruments Incorporated Product Folder Link(s): TPA2005D1-Q1 15 TPA2005D1-Q1 SLOS474C - AUGUST 2005 - REVISED MARCH 2010 www.ti.com OUT+ OUT- +5 V Differential Voltage Across Load 0V -5 V Current Figure 33. Traditional Class-D Modulation Scheme Output Voltage and Current Waveforms Into an Inductive Load With No Input TPA2005D1 Modulation Scheme The TPA2005D1 uses a modulation scheme that still has each output switching from 0 to the supply voltage. However, OUT+ and OUT- are now in phase with each other, with no input. The duty cycle of OUT+ is greater than 50% and OUT- is less than 50% for positive voltages. The duty cycle of OUT+ is less than 50% and OUT- is greater than 50% for negative voltages. The voltage across the load remains at 0 V throughout most of the switching period, greatly reducing the switching current, which reduces any I2R losses in the load. OUT+ OUT- Differential Voltage Across Load Output = 0 V +5 V 0V -5 V Current OUT+ OUT- Differential +5 V Voltage Across 0V Load Output > 0 V -5 V Current Figure 34. The TPA2005D1 Output Voltage and Current Waveforms Into an Inductive Load 16 Submit Documentation Feedback Copyright (c) 2005-2010, Texas Instruments Incorporated Product Folder Link(s): TPA2005D1-Q1 TPA2005D1-Q1 www.ti.com SLOS474C - AUGUST 2005 - REVISED MARCH 2010 Efficiency: Why You Must Use a Filter With the Traditional Class-D Modulation Scheme The main reason that the traditional class-D amplifier needs an output filter is that the switching waveform results in maximum current flow. This causes more loss in the load, which causes lower efficiency. The ripple current is large for the traditional modulation scheme because the ripple current is proportional to voltage multiplied by the time at that voltage. The differential voltage swing is 2 x VDD, and the time at each voltage is one-half the period for the traditional modulation scheme. An ideal LC filter is needed to store the ripple current from each half-cycle for the next half-cycle, while any resistance causes power dissipation. The speaker is both resistive and reactive, whereas an LC filter is almost purely reactive. The TPA2005D1 modulation scheme has very little loss in the load without a filter because the pulses are very short and the change in voltage is VDD instead of 2 x VDD. As the output power increases, the pulses widen, making the ripple current larger. Ripple current could be filtered with an LC filter for increased efficiency, but for most applications the filter is not needed. An LC filter with a cutoff frequency less than the class-D switching frequency allows the switching current to flow through the filter instead of the load. The filter has less resistance than the speaker, resulting in less power dissipation, which increases efficiency. Effects of Applying a Square Wave Into a Speaker If the amplitude of a square wave is high enough and the frequency of the square wave is within the bandwidth of the speaker, a square wave could cause the voice coil to jump out of the air gap and/or scar the voice coil. A 250-kHz switching frequency, however, is not significant because the speaker cone movement is proportional to 1/f2 for frequencies beyond the audio band. Therefore, the amount of cone movement at the switching frequency is very small. However, damage could occur to the speaker if the voice coil is not designed to handle the additional power. To size the speaker for added power, the ripple current dissipated in the load must be calculated by subtracting the theoretical supplied power, PSUP THEORETICAL, from the actual supply power, PSUP, at maximum output power, POUT. The switching power dissipated in the speaker is the inverse of the measured efficiency,h MEASURED, minus the theoretical efficiency,h THEORETICAL. P +P -P (at max output power) SPKR SUP SUP THEORETICAL (19) P P P + SUP - SUP THEORETICAL (at max output power) SPKR P P OUT OUT (20) 1 1 (at max output power) * OUT h MEASURED h THEORETICAL R L hTHEORETICAL + (at max output power) R ) 2r L DS(on) P SPKR +P (21) (22) The maximum efficiency of the TPA2005D1 with a 3.6-V supply and an 8- load is 86% from Equation 22. Using Equation 21 with the efficiency at maximum power (84%), we see that there is an additional 17 mW dissipated in the speaker. The added power dissipated in the speaker is not an issue as long as it is taken into account when choosing the speaker. When to Use an Output Filter Design the TPA2005D1 without an output filter if the traces from amplifier to speaker are short. The TPA2005D1 passed FCC and CE radiated emissions with no shielding and with speaker trace wires 100 mm long or less. Wireless handsets and PDAs are great applications for class-D without a filter. A ferrite bead filter often can be used if the design is failing radiated emissions without an LC filter, and the frequency-sensitive circuit is greater than 1 MHz. This is good for circuits that just have to pass FCC and CE because FCC and CE only test radiated emissions greater than 30 MHz. If choosing a ferrite bead, choose one with high impedance at high frequencies, but very low impedance at low frequencies. Use an LC output filter if there are low-frequency (<1 MHz) EMI-sensitive circuits and/or there are long leads from amplifier to speaker. Figure 35 and Figure 36 show typical ferrite bead and LC output filters. Submit Documentation Feedback Copyright (c) 2005-2010, Texas Instruments Incorporated Product Folder Link(s): TPA2005D1-Q1 17 TPA2005D1-Q1 SLOS474C - AUGUST 2005 - REVISED MARCH 2010 www.ti.com Ferrite Chip Bead OUTP 1 nF Ferrite Chip Bead OUTN 1 nF Figure 35. Typical Ferrite Chip Bead Filter (Chip bead example: NEC/Tokin: N2012ZPS121) 33 H OUTP 1 F 33 H OUTN 1 F Figure 36. Typical LC Output Filter, Cut-Off Frequency of 27 kHz 18 Submit Documentation Feedback Copyright (c) 2005-2010, Texas Instruments Incorporated Product Folder Link(s): TPA2005D1-Q1 PACKAGE OPTION ADDENDUM www.ti.com 16-Apr-2010 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty TPA2005D1DGNRQ1 ACTIVE MSOPPower PAD DGN 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPA2005D1DRBQ1 ACTIVE SON DRB 8 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPA2005D1TDGNRQ1 ACTIVE MSOPPower PAD DGN 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR Lead/Ball Finish MSL Peak Temp (3) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. 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OTHER QUALIFIED VERSIONS OF TPA2005D1-Q1 : * Catalog: TPA2005D1 NOTE: Qualified Version Definitions: * Catalog - TI's standard catalog product Addendum-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant TPA2005D1DGNRQ1 MSOPPower PAD DGN 8 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 TPA2005D1TDGNRQ1 MSOPPower PAD DGN 8 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TPA2005D1DGNRQ1 MSOP-PowerPAD DGN 8 2500 367.0 367.0 35.0 TPA2005D1TDGNRQ1 MSOP-PowerPAD DGN 8 2500 367.0 367.0 35.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46C and to discontinue any product or service per JESD48B. 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