17
P/N:PM1186
MX29LV160C T/B
REV. 1.2, JAN. 19, 2006
Toggle Bit I may be read at any address, and is valid
after the rising edge o f the final WE# o r CE#, whichever
happens first, in the command sequence (prior to the
pro gram o r erase o peratio n), and during the secto r time-
out.
During an Auto matic Program o r Erase algo rithm o pera-
tion, successive read cycles to any address cause Q6
to toggle. The system may use either OE# or CE# to
co ntrol the read cycles. When the o peratio n is complete,
Q6 sto ps to ggling.
After an erase co mmand sequence is written, if all sec-
tors selected f or erasing are pro tected, Q6 toggles and
returns to reading arra y data. If not all selected secto rs
are pro tected, the Auto matic Erase algo rithm erases the
unpro tected secto rs, and igno res the selected secto rs
that are pro tected.
The system can use Q6 and Q2 to gether to determine
whether a sector is actively erasing or is erase sus-
pended. When the device is actively erasing (that is, the
A utomatic Erase algorithm is in pro g ress), Q6 toggling.
When the device enters the Erase Suspend mode, Q6
stops toggling. Ho wever, the system must also use Q2
to determine which sectors are erasing or erase-sus-
pended. Alternatively, the system can use Q7.
If a program address f alls within a protected secto r, Q6
toggles for approximately 2 us after the program com-
mand sequence is written, then returns to reading array
data.
Q6 also toggles during the erase-suspend-program mode,
and stops toggling once the Auto matic Program algo rithm
is complete.
Table 8 shows the outputs for To ggle Bit I o n Q6.
Q2:Toggle Bit II
The "To ggle Bit II" on Q2, when used with Q6, indicates
whether a par ticular sector is actively erasing (that is,
the Auto matic Erase algorithm is in process), or whether
that sector is erase-suspended. Toggle Bit II is valid
after the rising edge o f the final WE# o r CE#, whichever
happens first, in the co mmand sequence.
Q2 to ggles when the system reads at addresses within
tho se sectors that hav e been selected fo r erasure. (The
system may use either OE# or CE# to control the read
cycles.) But Q2 cannot distinguish whether the sector
is activ ely erasing o r is erase-suspended. Q6, b y co m-
parison, indicates whether the device is actively eras-
ing, o r is in Erase Suspend, but canno t distinguish which
sectors are selected for erasure. Thus , bo th status bits
are required f o r secto rs and mo de info rmatio n. Refer to
Table 7 to co mpare o utputs f o r Q2 and Q6.
Reading Toggle Bits Q6/ Q2
Whene v er the system initially begins reading toggle bit
status, it must read Q7-Q0 at least twice in a row to
determine whether a to ggle bit is toggling. Typically , the
system would no te and store the value of the toggle bit
after the first read. After the second read, the system
would compare the new value of the toggle bit with the
first. If the to ggle bit is no t toggling, the device has co m-
pleted the pro gram o r erase o peration. The system can
read arra y data o n Q7-Q0 on the fo llowing read cycle.
How ever, if after the initial two read cycles, the system
determines that the toggle bit is still toggling, the sys-
tem also should note whether the value of Q5 is high
(see the section o n Q5). If it is, the system should then
determine again whether the toggle bit is to ggling, since
the to ggle bit may have sto pped toggling just as Q5 went
high. If the toggle bit is no longer toggling, the device
has successfully co mpleted the program o r erase opera-
tio n. If it is still to ggling, the device did not co mplete the
operation successfully, and the system must write the
reset co mmand to return to reading array data.
The remaining scenario is that system initially determines
that the to ggle bit is toggling and Q5 has no t go ne high.
The system may continue to monitor the toggle bit and
Q5 through successive read cycles, determining the sta-
tus as described in the previous paragraph. Alternatively,
it may choose to perform other system tasks. In this
case, the system must start at the beginning of the al-
gorithm when it retur ns to determine the status of the
operation.
Q5 : Exceeded Timing Limits
Q5 will indicate if the program or erase time has exceeded
the specified limits (internal pulse co unt). Under these
co nditions Q5 will produce a "1". This time-o ut co ndition
indicates that the program or erase cycle was not suc-