1. Product profile
1.1 General description
Low capacitance bidirectional double ElectroStatic Discharge (ESD) protection diode in a
small SOT23 (TO-236AB) Surface-Mounted Device (SMD) plastic package designed to
protect two data lines from the damage caused by ESD and other transients.
1.2 Features
nBidirectional ESD protection of two lines
nLow diode capacitance
nMax. peak pulse power: PPP = 130 W at tp= 8/20 µs
nLow clamping voltage: VCL = 14 V at IPP =12A
nUltra low leakage current: IRM = 5 nA at VRWM =5V
nESD protection up to 30 kV
nIEC 61000-4-2; level 4 (ESD)
nIEC 61000-4-5 (surge); IPP = 12 A at tp= 8/20 µs
1.3 Applications
nCellular handsets and accessories
nPortable electronics
nComputers and peripherals
nCommunication systems
nAudio and video equipment
1.4 Quick reference data
PESD5V0S2BT
Low capacitance bidirectional double ESD protection diode
Rev. 03 — 9 February 2009 Product data sheet
Table 1. Quick reference data
T
amb
=25
°
C unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Unit
VRWM reverse standoff voltage - - 5 V
Cddiode capacitance f = 1 MHz;
VR=0V - 3545pF
PESD5V0S2BT_3 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 03 — 9 February 2009 2 of 12
NXP Semiconductors PESD5V0S2BT
Low capacitance bidirectional double ESD protection diode
2. Pinning information
3. Ordering information
4. Marking
[1] * = -: made in Hong Kong
* = p: made in Hong Kong
* = t: made in Malaysia
* = W: made in China
5. Limiting values
[1] Non-repetitive current pulse 8/20 µs exponential decay waveform.
[2] Measured from pin 1 to 3 or pin 2 to 3.
Table 2. Pinning
Pin Description Simplified outline Graphic symbol
1 cathode 1
2 cathode 2
3 double cathode
12
31
2
3
sym031
Table 3. Ordering information
Type number Package
Name Description Version
PESD5V0S2BT - plastic surface-mounted package; 3 leads SOT23
Table 4. Marking
Type number Marking code[1]
PESD5V0S2BT *G5
Table 5. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
Per diode
PPP peak pulse power tp= 8/20 µs[1][2] - 130 W
IPP peak pulse current tp= 8/20 µs[1][2] -12A
Tjjunction temperature - 150 °C
Tamb ambient temperature −65 +150 °C
Tstg storage temperature −65 +150 °C
PESD5V0S2BT_3 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 03 — 9 February 2009 3 of 12
NXP Semiconductors PESD5V0S2BT
Low capacitance bidirectional double ESD protection diode
[1] Device stressed with ten non-repetitive ESD pulses.
[2] Measured from pin 1 to 3 or pin 2 to 3.
Table 6. ESD maximum ratings
Symbol Parameter Conditions Min Max Unit
VESD electrostatic discharge
voltage IEC 61000-4-2
(contact discharge) [1][2] -30kV
MIL-STD-883
(human body model) -10kV
Table 7. ESD standards compliance
Standard Conditions
IEC 61000-4-2; level 4 (ESD) > 15 kV (air); > 8 kV (contact)
MIL-STD-883; class 3 (human body model) > 4 kV
Fig 1. 8/20 µs pulse waveform according to
IEC 61000-4-5 Fig 2. ESD pulse waveform according to
IEC 61000-4-2
t (µs)
0403010 20
001aaa630
40
80
120
IPP
(%)
0
e−t
100 % IPP; 8 µs
50 % IPP; 20 µs
001aaa631
IPP
100 %
90 %
t
30 ns 60 ns
10 %
tr = 0.7 ns to 1 ns
PESD5V0S2BT_3 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 03 — 9 February 2009 4 of 12
NXP Semiconductors PESD5V0S2BT
Low capacitance bidirectional double ESD protection diode
6. Characteristics
[1] Non-repetitive current pulse 8/20 µs exponential decay waveform.
[2] Measured from pin 1 to 3 or pin 2 to 3.
Table 8. Electrical characteristics
T
amb
=25
°
C unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Unit
Per diode
VRWM reverse standoff voltage - - 5 V
IRM reverse leakage current VRWM = 5 V - 5 100 nA
VCL clamping voltage IPP =1A [1][2] --10V
IPP =12A [1][2] --14V
VBR breakdown voltage IR= 1 mA 5.5 - 9.5 V
rdif differential resistance IR=1mA --50Ω
Cddiode capacitance f = 1 MHz; VR=0V - 3545pF
Tamb =25°C
tp= 8/20 µs exponential decay waveform
Fig 3. Peak pulse power dissipation as a function of
pulse duration; typical values Fig 4. Relative variation of peak pulse power as a
function of junction temperature; typical
values
001aaa632
tp (µs)
110
4
103
10 102
102
103
PPP
(W)
10
Tj (°C)
0 20015050 100
001aaa633
0.4
0.8
1.2
PPP
0
PPP(25°C)
PESD5V0S2BT_3 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 03 — 9 February 2009 5 of 12
NXP Semiconductors PESD5V0S2BT
Low capacitance bidirectional double ESD protection diode
Tamb =25°C; f = 1 MHz IR< 1 nA measured at Tamb =25°C
Fig 5. Diode capacitance as a function of reverse
voltage; typical values Fig 6. Relative variation of reverse current as a
function of junction temperature; typical
values
VR (V)
054231
001aaa634
30
26
34
38
Cd
(pF)
22
001aaa635
Tj (°C)
75 150125100
10
1
102
10−1
IR
IR(85 °C)
PESD5V0S2BT_3 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 03 — 9 February 2009 6 of 12
NXP Semiconductors PESD5V0S2BT
Low capacitance bidirectional double ESD protection diode
Fig 7. ESD clamping test setup and waveforms
coa006
50 Ω
RZ
CZ
PESD5V0S2BT
vertical scale = 200 V/div
horizontal scale = 50 ns/div
unclamped +1 kV ESD voltage waveform
(IEC61000-4-2 network) clamped +1 kV ESD voltage waveform
(IEC61000-4-2 network)
unclamped −1 kV ESD voltage waveform
(IEC61000-4-2 network) clamped −1 kV ESD voltage waveform
(IEC61000-4-2 network)
vertical scale = 10 V/div
horizontal scale = 50 ns/div
vertical scale = 200 V/div
horizontal scale = 50 ns/div vertical scale = 10 V/div
horizontal scale = 50 ns/div
GND
GND
GND
GND
450 ΩRG 223/U
50 Ω coax
ESD TESTER
IEC 61000-4-2 network
CZ = 150 pF; RZ = 330 Ω
4 GHz DIGITAL
OSCILLOSCOPE
10×
ATTENUATOR
PESD5V0S2BT_3 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 03 — 9 February 2009 7 of 12
NXP Semiconductors PESD5V0S2BT
Low capacitance bidirectional double ESD protection diode
7. Application information
The PESD5V0S2BT is designed for the bidirectional protection of two lines from the
damage caused by ElectroStatic Discharge (ESD) and surge pulses.
The PESD5V0S2BT may be used on lines where the signal polarities are both, positive
and negative with respect to ground. The PESD5V0S2BT provides a surge capability of
130 W per line for an 8/20 µs waveform.
Circuit board layout and protection device placement:
Circuit board layout is critical for the suppression of ESD, Electrical Fast Transient (EFT)
and surge transients. The following guidelines are recommended:
1. Place the PESD5V0S2BT as close to the input terminal or connector as possible.
2. The path length between the PESD5V0S2BT and the protected line should be
minimized.
3. Keep parallel signal paths to a minimum.
4. Avoid running protected conductors in parallel with unprotected conductors.
5. Minimize all Printed-Circuit Board (PCB) conductive loops including power and
ground loops.
6. Minimize the length of the transient return path to ground.
7. Avoid using shared transient return paths to a common ground point.
8. Ground planes should be used whenever possible. For multilayer PCBs, use ground
vias.
Fig 8. Typical application for bidirectional protection of two lines
001aaa636
PESD5V0S2BT
GND
line 2 to be protected
line 1 to be protected
PESD5V0S2BT_3 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 03 — 9 February 2009 8 of 12
NXP Semiconductors PESD5V0S2BT
Low capacitance bidirectional double ESD protection diode
8. Package outline
9. Packing information
[1] For further information and the availability of packing methods, see Section 13.
Fig 9. Package outline SOT23 (TO-236AB)
04-11-04Dimensions in mm
0.45
0.15
1.9
1.1
0.9
3.0
2.8
2.5
2.1 1.4
1.2
0.48
0.38 0.15
0.09
12
3
Table 9. Packing methods
The indicated -xxx are the last three digits of the 12NC ordering code.
[1]
Type number Package Description Packing quantity
3000 10000
PESD5V0S2BT SOT23 4 mm pitch, 8 mm tape and reel -215 -235
PESD5V0S2BT_3 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 03 — 9 February 2009 9 of 12
NXP Semiconductors PESD5V0S2BT
Low capacitance bidirectional double ESD protection diode
10. Soldering
Fig 10. Reflow soldering footprint SOT23 (TO-236AB)
Fig 11. Wave soldering footprint SOT23 (TO-236AB)
solder lands
solder resist
occupied area
solder paste
sot023_fr
0.5
(3×)
0.6
(3×)
0.6
(3×)
0.7
(3×)
3
1
3.3
2.9
1.7
1.9
2
Dimensions in mm
solder lands
solder resist
occupied area
preferred transport direction during soldering
sot023_fw
2.8
4.5
1.4
4.6
1.4
(2×)
1.2
(2×)
2.2
2.6
Dimensions in mm
PESD5V0S2BT_3 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 03 — 9 February 2009 10 of 12
NXP Semiconductors PESD5V0S2BT
Low capacitance bidirectional double ESD protection diode
11. Revision history
Table 10. Revision history
Document ID Release date Data sheet status Change notice Supersedes
PESD5V0S2BT_3 20090209 Product data sheet - PESD5V0S2BT_2
Modifications: •The format of this data sheet has been redesigned to comply with the new identity
guidelines of NXP Semiconductors.
•Legal texts have been adapted to the new company name where appropriate.
•Table 6: ESD electro static discharge capability redefined to VESD electrostatic discharge
voltage
•Table 8: V(CL)R clamping voltage redefined to VCL
•Figure 4: figure notes removed
•Section 7 “Application information”: updated
•Figure 9: superseded by minimized package outline drawing
•Section 9 “Packing information”: added
•Section 10 “Soldering”: added
•Section 12 “Legal information”: updated
PESD5V0S2BT_2 20040527 Product data sheet - PESD5V0S2BT_1
PESD5V0S2BT_1 20040517 Product data sheet - -
PESD5V0S2BT_3 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 03 — 9 February 2009 11 of 12
NXP Semiconductors PESD5V0S2BT
Low capacitance bidirectional double ESD protection diode
12. Legal information
12.1 Data sheet status
[1] Please consult the most recently issued document before initiating or completing a design.
[2] The term ‘short data sheet’ is explained in section “Definitions”.
[3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
12.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
12.3 Disclaimers
General — Information in this document is believed to be accurate and
reliable. However, NXP Semiconductors does not give any representations or
warranties, expressed or implied, as to the accuracy or completeness of such
information and shall have no liability for the consequences of use of such
information.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in medical, military, aircraft,
space or life support equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors accepts no liability for inclusion and/or use of
NXP Semiconductors products in such equipment or applications and
therefore such inclusion and/or use is at the customer’s own risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) may cause permanent
damage to the device. Limiting values are stress ratings only and operation of
the device at these or any other conditions above those given in the
Characteristics sections of this document is not implied. Exposure to limiting
values for extended periods may affect device reliability.
Terms and conditions of sale — NXP Semiconductors products are sold
subject to the general terms and conditions of commercial sale, as published
at http://www.nxp.com/profile/terms, including those pertaining to warranty,
intellectual property rights infringement and limitation of liability, unless
explicitly otherwise agreed to in writing by NXP Semiconductors. In case of
any inconsistency or conflict between information in this document and such
terms and conditions, the latter will prevail.
No offer to sell or license — Nothing in this document may be interpreted
or construed as an offer to sell products that is open for acceptance or the
grant, conveyance or implication of any license under any copyrights, patents
or other industrial or intellectual property rights.
Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
12.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
13. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Document status[1][2] Product status[3] Definition
Objective [short] data sheet Development This document contains data from the objective specification for product development.
Preliminary [short] data sheet Qualification This document contains data from the preliminary specification.
Product [short] data sheet Production This document contains the product specification.
NXP Semiconductors PESD5V0S2BT
Low capacitance bidirectional double ESD protection diode
© NXP B.V. 2009. All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 9 February 2009
Document identifier: PESD5V0S2BT_3
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
14. Contents
1 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.1 General description. . . . . . . . . . . . . . . . . . . . . . 1
1.2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.4 Quick reference data. . . . . . . . . . . . . . . . . . . . . 1
2 Pinning information. . . . . . . . . . . . . . . . . . . . . . 2
3 Ordering information. . . . . . . . . . . . . . . . . . . . . 2
4 Marking. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
5 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2
6 Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 4
7 Application information. . . . . . . . . . . . . . . . . . . 7
8 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 8
9 Packing information. . . . . . . . . . . . . . . . . . . . . . 8
10 Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
11 Revision history. . . . . . . . . . . . . . . . . . . . . . . . 10
12 Legal information. . . . . . . . . . . . . . . . . . . . . . . 11
12.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 11
12.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
12.3 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 11
12.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 11
13 Contact information. . . . . . . . . . . . . . . . . . . . . 11
14 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
