1
IPB010N06N
Rev.2.4,2016-01-18Final Data Sheet
1
7
tab
D²-PAK7pin
Drain
Pin 4, tab
Gate
Pin 1
Source
Pin 2,3,5,6,7
MOSFET
OptiMOSTMPower-Transistor,60V
Features
•Optimizedforsynchronousrectification
•100%avalanchetested
•Superiorthermalresistance
•N-channel,normallevel
•QualifiedaccordingtoJEDEC1)fortargetapplications
•Pb-freeleadplating;RoHScompliant
•Halogen-freeaccordingtoIEC61249-2-21
Table1KeyPerformanceParameters
Parameter Value Unit
VDS 60 V
RDS(on),max 1.0 mΩ
ID180 A
Qoss 228 nC
QG(0V..10V) 208 nC
Type/OrderingCode Package Marking RelatedLinks
IPB010N06N PG-TO263-7 010N06N -
1) J-STD20 and JESD22
2
OptiMOSTMPower-Transistor,60V
IPB010N06N
Rev.2.4,2016-01-18Final Data Sheet
TableofContents
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Electrical characteristics diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Disclaimer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
3
OptiMOSTMPower-Transistor,60V
IPB010N06N
Rev.2.4,2016-01-18Final Data Sheet
1Maximumratings
atTj=25°C,unlessotherwisespecified
Table2Maximumratings
Values
Min. Typ. Max.
Parameter Symbol Unit Note/TestCondition
Continuous drain current ID
-
-
-
-
-
-
180
180
45
A
VGS=10V,TC=25°C
VGS=10V,TC=100°C
VGS=10V,TC=25°C,RthJA=40K/W1)
Pulsed drain current2) ID,pulse - - 720 A TC=25°C
Avalanche energy, single pulse3) EAS - - 1600 mJ ID=100A,RGS=25Ω
Gate source voltage VGS -20 - 20 V -
Power dissipation Ptot - - 300 W TC=25°C
Operating and storage temperature Tj,Tstg -55 - 175 °C IEC climatic category;
DIN IEC 68-1: 55/175/56
2Thermalcharacteristics
Table3Thermalcharacteristics
Values
Min. Typ. Max.
Parameter Symbol Unit Note/TestCondition
Thermal resistance, junction - case RthJC - 0.3 0.5 K/W -
Device on PCB,
minimal footprint RthJA - - 62 K/W -
Device on PCB,
6 cm² cooling area1) RthJA - - 40 K/W -
Soldering temperature, wave and
reflow soldering are allowed Tsold - - 260 °C Reflow MSL1
1) Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 µm thick) copper area for drain
connection. PCB is vertical in still air.
2) See figure 3 for more detailed information
3) See figure 13 for more detailed information
4
OptiMOSTMPower-Transistor,60V
IPB010N06N
Rev.2.4,2016-01-18Final Data Sheet
3Electricalcharacteristics
Table4Staticcharacteristics
Values
Min. Typ. Max.
Parameter Symbol Unit Note/TestCondition
Drain-source breakdown voltage V(BR)DSS 60 - - V VGS=0V,ID=1mA
Gate threshold voltage VGS(th) 2.1 2.8 3.3 V VDS=VGS,ID=280µA
Zero gate voltage drain current IDSS -
-
0.5
10
1
100 µA VDS=60V,VGS=0V,Tj=25°C
VDS=60V,VGS=0V,Tj=125°C
Gate-source leakage current IGSS - 10 100 nA VGS=20V,VDS=0V
Drain-source on-state resistance RDS(on) -
-
0.8
1.0
1.0
1.5 mΩVGS=10V,ID=100A
VGS=6V,ID=25A
Gate resistance1) RG- 1.8 2.7 Ω-
Transconductance gfs 160 310 - S |VDS|>2|ID|RDS(on)max,ID=100A
Table5Dynamiccharacteristics1)
Values
Min. Typ. Max.
Parameter Symbol Unit Note/TestCondition
Input capacitance Ciss - 15000 18750 pF VGS=0V,VDS=30V,f=1MHz
Output capacitance Coss - 3400 4250 pF VGS=0V,VDS=30V,f=1MHz
Reverse transfer capacitance Crss - 130 260 pF VGS=0V,VDS=30V,f=1MHz
Turn-on delay time td(on) - 37 - ns VDD=30V,VGS=10V,ID=100A,
RG,ext=3Ω
Rise time tr- 36 - ns VDD=30V,VGS=10V,ID=100A,
RG,ext=3Ω
Turn-off delay time td(off) - 74 - ns VDD=30V,VGS=10V,ID=100A,
RG,ext=3Ω
Fall time tf- 23 - ns VDD=30V,VGS=10V,ID=100A,
RG,ext=3Ω
Table6Gatechargecharacteristics2)
Values
Min. Typ. Max.
Parameter Symbol Unit Note/TestCondition
Gate to source charge Qgs - 65 - nC VDD=30V,ID=100A,VGS=0to10V
Gate charge at threshold Qg(th) - 46 - nC VDD=30V,ID=100A,VGS=0to10V
Gate to drain charge1) Qgd - 37 49 nC VDD=30V,ID=100A,VGS=0to10V
Switching charge Qsw - 56 - nC VDD=30V,ID=100A,VGS=0to10V
Gate charge total1) Qg- 208 243 nC VDD=30V,ID=100A,VGS=0to10V
Gate plateau voltage Vplateau - 4.2 - V VDD=30V,ID=100A,VGS=0to10V
Gate charge total, sync. FET Qg(sync) - 184 - nC VDS=0.1V,VGS=0to10V
Output charge1) Qoss - 228 285 nC VDD=30V,VGS=0V
1) Defined by design. Not subject to production test
2) See ″Gate charge waveforms″ for parameter definition
5
OptiMOSTMPower-Transistor,60V
IPB010N06N
Rev.2.4,2016-01-18Final Data Sheet
Table7Reversediode
Values
Min. Typ. Max.
Parameter Symbol Unit Note/TestCondition
Diode continuous forward current IS- - 180 A TC=25°C
Diode pulse current IS,pulse - - 720 A TC=25°C
Diode forward voltage VSD - 0.9 1.2 V VGS=0V,IF=100A,Tj=25°C
Reverse recovery time1) trr - 87 139 ns VR=30V,IF=100A,diF/dt=100A/µs
Reverse recovery charge Qrr - 144 - nC VR=30V,IF=100A,diF/dt=100A/µs
1) Defined by design. Not subject to production test
6
OptiMOSTMPower-Transistor,60V
IPB010N06N
Rev.2.4,2016-01-18Final Data Sheet
4Electricalcharacteristicsdiagrams
Diagram1:Powerdissipation
TC[°C]
Ptot[W]
0 25 50 75 100 125 150 175
0
40
80
120
160
200
240
280
320
Ptot=f(TC)
Diagram2:Draincurrent
TC[°C]
ID[A]
0 25 50 75 100 125 150 175 200
0
40
80
120
160
200
ID=f(TC);VGS≥10V
Diagram3:Safeoperatingarea
VDS[V]
ID[A]
10-1 100101102
10-1
100
101
102
103
1 µs
10 µs
100 µs
1 ms
10 ms
DC
ID=f(VDS);TC=25°C;D=0;parameter:tp
Diagram4:Max.transientthermalimpedance
tp[s]
ZthJC[K/W]
10-6 10-5 10-4 10-3 10-2 10-1 100
10-3
10-2
10-1
100
0.5
0.2
0.1
0.05
0.02
0.01
single pulse
ZthJC=f(tp);parameter:D=tp/T
7
OptiMOSTMPower-Transistor,60V
IPB010N06N
Rev.2.4,2016-01-18Final Data Sheet
Diagram5:Typ.outputcharacteristics
VDS[V]
ID[A]
0.0 0.5 1.0 1.5 2.0 2.5 3.0
0
100
200
300
400
500
600
700
6 V
7 V
10 V 5.5 V
5 V
ID=f(VDS);Tj=25°C;parameter:VGS
Diagram6:Typ.drain-sourceonresistance
ID[A]
RDS(on)[mΩ]
0 100 200 300 400 500 600 700
0.0
0.5
1.0
1.5
2.0
2.5
3.0
5 V
5.5 V
6 V
7 V
10 V
RDS(on)=f(ID);Tj=25°C;parameter:VGS
Diagram7:Typ.transfercharacteristics
VGS[V]
ID[A]
02468
0
100
200
300
400
500
600
700
175 °C 25 °C
ID=f(VGS);|VDS|>2|ID|RDS(on)max;parameter:Tj
Diagram8:Typ.forwardtransconductance
ID[A]
gfs[S]
0 30 60 90 120 150 180
0
50
100
150
200
250
300
350
400
gfs=f(ID);Tj=25°C
8
OptiMOSTMPower-Transistor,60V
IPB010N06N
Rev.2.4,2016-01-18Final Data Sheet
Diagram9:Drain-sourceon-stateresistance
Tj[°C]
RDS(on)[mΩ]
-60 -20 20 60 100 140 180
0.0
0.5
1.0
1.5
2.0
2.5
max
typ
RDS(on)=f(Tj);ID=100A;VGS=10V
Diagram10:Typ.gatethresholdvoltage
Tj[°C]
VGS(th)[V]
-60 -20 20 60 100 140 180
0
1
2
3
4
2800 µA
280 µA
VGS(th)=f(Tj);VGS=VDS
Diagram11:Typ.capacitances
VDS[V]
C[pF]
0 20 40 60
101
102
103
104
105
Ciss
Coss
Crss
C=f(VDS);VGS=0V;f=1MHz
Diagram12:Forwardcharacteristicsofreversediode
VSD[V]
IF[A]
0.0 0.5 1.0 1.5
100
101
102
103
25 °C
175 °C
IF=f(VSD);parameter:Tj
9
OptiMOSTMPower-Transistor,60V
IPB010N06N
Rev.2.4,2016-01-18Final Data Sheet
Diagram13:Avalanchecharacteristics
tAV[µs]
IAV[A]
100101102103
100
101
102
103
25 °C
100 °C
125 °C
IAS=f(tAV);RGS=25Ω;parameter:Tj(start)
Diagram14:Typ.gatecharge
Qgate[nC]
VGS[V]
0 50 100 150 200 250
0
2
4
6
8
10
12
48 V
30 V
12 V
VGS=f(Qgate);ID=100Apulsed;parameter:VDD
Diagram15:Drain-sourcebreakdownvoltage
Tj[°C]
VBR(DSS)[V]
-60 -20 20 60 100 140 180
52
54
56
58
60
62
64
66
68
VBR(DSS)=f(Tj);ID=1mA
Gate charge waveforms
10
OptiMOSTMPower-Transistor,60V
IPB010N06N
Rev.2.4,2016-01-18Final Data Sheet
5PackageOutlines
Figure1OutlinePG-TO263-7,dimensionsinmm/inches
11
OptiMOSTMPower-Transistor,60V
IPB010N06N
Rev.2.4,2016-01-18Final Data Sheet
RevisionHistory
IPB010N06N
Revision:2016-01-18,Rev.2.4
Previous Revision
Revision Date Subjects (major changes since last revision)
2.3 2014-10-03 Rev. 2.3
2.4 2016-01-18 Update package outline
TrademarksofInfineonTechnologiesAG
AURIX™,C166™,CanPAK™,CIPOS™,CoolGaN™,CoolMOS™,CoolSET™,CoolSiC™,CORECONTROL™,CROSSAVE™,DAVE™,DI-POL™,DrBlade™,
EasyPIM™,EconoBRIDGE™,EconoDUAL™,EconoPACK™,EconoPIM™,EiceDRIVER™,eupec™,FCOS™,HITFET™,HybridPACK™,Infineon™,
ISOFACE™,IsoPACK™,i-Wafer™,MIPAQ™,ModSTACK™,my-d™,NovalithIC™,OmniTune™,OPTIGA™,OptiMOS™,ORIGA™,POWERCODE™,
PRIMARION™,PrimePACK™,PrimeSTACK™,PROFET™,PRO-SIL™,RASIC™,REAL3™,ReverSave™,SatRIC™,SIEGET™,SIPMOS™,SmartLEWIS™,
SOLIDFLASH™,SPOC™,TEMPFET™,thinQ™,TRENCHSTOP™,TriCore™.
TrademarksupdatedAugust2015
OtherTrademarks
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