Philips Semiconductors Product specification 9-bit odd/even parity generator/checker 74F280B FEATURES PIN CONFIGURATION High-impedance NPN base inputs for reduced loading (201A in Low and High states) is 74] Voc Buffered inputs one normalized load 7 2 13) 15, Word length easily expanded by cascading ne [3] 2] 14 Industrial temperature range available (-40C to +85C) 'g [4] 1] Ig *e 6 10] Ip DESCRIPTION o [5 on The 74F280B is a 9-bit Parity Generator or Checker commonly used GND [7] 18] lo to detect errors in high speed data transmission or data retrieval systems. Both Even (Xie) and Odd (Y'9) parity outputs are available sFo0849 for generating or checking even or odd parity on up to 9 bits. The Even (Y.) parity output is High when an even number of Data inputs (Ig - Ig) are High. The Odd (Xo) parity output is High when an odd number of Data inputs are High. TYPICAL TYPICAL TYPE PROPAGATION SUPPLY CURRENT Expansion to larger word sizes is accomplished by tying the Even DELAY (TOTAL) (Xe) outputs of up to nine parallel devices to the data inputs of the final stage. This expansion scheme allows an 81-bit data word to be 74F280B 5.5ns 26mA checked in less than 20ns. ORDERING INFORMATION COMMERCIAL RANGE INDUSTRIAL RANGE DESCRIPTION Vec = 5V 410%, Vec = 5V +10%, PKG. DWG. # Tamb = 0C to +70C Tamb = 40C to +85C 14-pin plastic DIP N74F280BN |74F280BN SOT27-1 14-pin plastic SO N74F280BD \74F280BD SOT108-1 INPUT AND OUTPUT LOADING AND FAN-OUT TABLE 74F(U.L.) LOAD VALUE PINS DESCRIPTION HIGH/LOW HIGH/LOW lo-lg Data inputs 1.0/0.033 20 A/20NA Ye: Lo Parity outputs 50/33 1.0mA/20mA NOTE: One (1.0) FAST Unit Load is defined as: 20uA in the High state and 0.6mA in the Low state. LOGIC SYMBOL IEC/IEEE SYMBOL 8 9 10 11 12 13 1 2 4 3 2K Pit it tt 7 lo ly lo Ig 4 lh Ig 7 Ig 10 11 J =e / 5 12 J =E xO 13 + __ | eye eg ] 5 6 2 _l Voc=Pin 14 SF00845 GND=Pin 7 SF00846 1996 Mar 12 853-0363 16555Philips Semiconductors Product specification 9-bit odd/even parity generator/checker 74F280B LOGIC DIAGRAM Vec=Pin 14 GND=Pin 7 SF00847 FUNCTION TABLE INPUTS OUTPUTS Number of High Data Inputs (Ig - Ig) Ye Yo Even 0, 2, 4, 6, 8 H L Odd 1, 3, 5,7, 9 L H High voltage level Low voltage level 1996 Mar 12Philips Semiconductors Product specification 9-bit odd/even parity generator/checker 74F280B ABSOLUTE MAXIMUM RATINGS SYMBOL PARAMETER RATING UNIT Voc Supply voltage 0.5t0 +7.0 Vv VIN Input voltage 0.5t0 +7.0 Vv lIN Input current 30 to +5 mA Vout Voltage applied to output in High output state 0.5 to Voc Vv lout Current applied to output in Low output state 40 mA Commercial range 0 to +70 C Tamb Operating free-air temperature range Industrial range 40 to +85 C Tstq Storage temperature 65 to +150 C RECOMMENDED OPERATING CONDITIONS LIMITS SYMBOL PARAMETER - UNIT Min Nom Max Voc Supply voltage 4.5 5.0 5.5 Vv Vin High-level input voltage 2.0 Vv VIL Low-level input voltage 0.8 Vv lik Input clamp current -18 mA lou High-level output current -1 mA lot Low-level output current 20 mA Commercial range 0 70 C Tamb Operating free-air temperature range Industrial range 40 85 C DC ELECTRICAL CHARACTERISTICS (Over recommended operating free-air temperature range unless otherwise noted.) LIMITS SYMBOL PARAMETER TEST CONDITIONSNO TAG TYP UNIT MIN NoTaG | MAX Vec =MIN, Vit = MAX | +10%Vcoc 2.5 Vou High-level output voltage Vv Vin = MIN, low = MAX +5%Voc 2.7 3.4 Vec =MIN, Vit = MAX | +10%Vcoc 0.35 0.50 VoL Low-level output voltage Vv Vin = MIN, lo. = MAX +5%Voc 0.35 0.50 Vik Input clamp voltage Voc = MIN, ly = Ik -0.73 -1.2 Vv lI Input current at maximum input voltage Voc = 0.0V, V, = 7.0V 100 HA Commercial range 20 HA liq High-level input current Voc = MAX, V = 2.7V Industrial range 40 HA lit Low-level input current Voc = MAX, V = 0.5V -20 HA los Short-circuit output currentNO TAG Voc = MAX -60 -150 mA loc Supply current (total) Voc = MAX 26 35 mA NOTES: 1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type. 2. All typical values are at Voc = 5V, Tamp = 25C. 3. Not more than one output should be shorted at a time. For testing los, the use of high-speed test apparatus and/or sample-and-hold techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting of a High output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any sequence of parameter tests, log tests should be performed last. 1996 Mar 12 4Philips Semiconductors Product specification 9-bit odd/even parity generator/checker 74F280B AC ELECTRICAL CHARACTERISTICS LIMITS Tamb= +25C Tamb = 0C to +70C | Tamb = -40C to +85C TEST Vec =+5.V Vec =+5.V+10% Vec =4+5.V+10% SYMBOL PARAMETER CONDITIONS C, = 50pF, C, = 50pF, C, = 50pF, UNIT R, = 5002 R, = 5002 R,_ = 5000 Min | Typ | Max Min Max Min Max tPLH Propagation delay 4.0 6.5 9.0 3.5 10.0 3.0 11.0 ns tpHL Ip - Ig to Ep Waveform 1.21 459 | 70 |100| 35 11.1 35 12.0 ns t P tion del 7AF 2808 4.0 6.5 9.0 3.5 10.0 3.0 11.0 PLH ropagation delay . . . . . . . ns feo. Ip - Ig to Eq Waveform 1.21 49 | 70 | 100| 35 11.0 35 12.0 ns AC WAVEFORMS For all waveforms, V\y=1.5V. lo- Ig VM VM Ip - Ig VM VM tPHL tPLH tPLH tPHL Xe, Xo Vu Vu Se Eo Vm VM SF00848 SFO0850 Waveform 1. Propagation Delay for Inverting Outputs Waveform 2. Propagation Delay for Non-inverting Outputs TEST CIRCUIT AND WAVEFORM vec 20% if w > som AMP) | sega " y VIN VOUT 10% 10% ov GENERATOR OUT tTHL (tf) tTLH > _ RT i CL $ RL tTLH (tr) tTHL (ff > AMP (V) 90% 90% _ = oa POSITIVE = = = = = = PULSE VM VM Test Circuit for Totem-Pole Outputs 10% ~ ' > 10% ov WwW DEFINITIONS: Input Pulse Definition R_ = Load resistor; see AC ELECTRICAL CHARACTERISTICS for value. INPUT PULSE REQUIREMENTS C_ = Load capacitance includes jig and probe capacitance; family see AC ELECTRICAL CHARACTERISTICS for value. amplitude} Vm | rep. rate tw troy | tre Rr = Termination resistance should be equal to Zour of pulse generators. 74F 3.0V 1.5V| 1MHz 500ns | 2.5ns | 2.5ns SFO0006 1996 Mar 12 5Philips Semiconductors Product specification 9-bit parity odd/even parity generator/checker 74F280B DIP14: plastic dual in-line package; 14 leads (300 mil) SOT27-1 <a D > is i bi Ai [el 14 | P 8 AnadAnad x pin 1 index I p*- --- + ee | 7 it) 5 10 mm Cd scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) A Ay Ao 1 z UNIT | max. | rmit. | mex b by c pM | eM e ey L Me My wel ax mm ao | os1 | a2 | 173 | 053 | 0.96 | 19.50 | 6.48 3.60 | 825 | 10.0 1.13 0.38 0.23 18.55 6.20 2.54 7.62 3.05 7.80 8.3 0.254 22 : 0.068 | 0.021 | 0.014 | 0.77 0.26 0.14 0.32 0.39 inches 0.17 | 0.020 | 0.13 0.044 | 0.015 | 0.009 | 073 0.24 0.10 0.30 0.12 0.31 033 0.01 0.087 Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. REFERENCES oun eunoPEAN | ge pare IEC JEDEC EIAJ 22-447 $0T27-1 050G04 MO-001AA f=} ete 1996 Mar 12 6Philips Semiconductors Product specification 9-bit parity odd/even parity generator/checker 74F280B $014: plastic small outline package; 14 leads; body width 3.9 mm $OT108-1 t D > AWLP iG] y | wie f AGA Ao { a int ex _ | po } Lys VP t | - | oH ay H aca = p 4 0 2.5 5mm be scale DIMENSIONS (inch dimensions are derived from the original mm dimensions} A UNIT | ax. | Ar | Az | As | bp | c | DO | EM] e | He | L | Lp | v w y | Zz) 6 0.25 | 1.45 0.49 | 0.25] 275] 4.0 62 10 | o7 07 mm 1 175 1 gig | 1.251%] oss] o19 | a55] ag} 17} 58 1] 1] o4 | o6 | O75] O25] 91 | og g o 0.010 | 0.057 0.019 ]0.0100] 0.35 | 0.16 0.244 0.039 | 0.028 0.028] 0 inches | 0.069 | 9 94 | 0.049] 9-97 | o.o14 {0.0075 0.94 | 0.15 | &9| 9.208 | 9941 | gore | 0.024 | 201 | 9-01 | 0.004) Q 15 Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. OUTLINE REFERENCES EUROPEAN VERSION PROJECTION ISSUE DATE IEC JEDEC EIAJ 95-8+23- SOT108-1 O76E06S MS-012AB } oy phon 1996 Mar 12 7Philips Semiconductors Product specification 9-bit parity odd/even parity generator/checker 74F280B Data sheet status Data sheet Product Definition [1] status status Objective Development This data sheet contains the design target or goal specifications for product development. specification Specification may change in any manner without notice. Preliminary Qualification This data sheet contains preliminary data, and supplementary data will be published at a later date. specification Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. Product Production This data sheet contains final specifications. Philips Semiconductors reserves the right to make specification changes at any time without notice in order to improve design and supply the best possible product. [1] Please consult the most recently issued datasheet before initiating or completing a design. Definitions Short-form specification The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Disclaimers Life support These products are not designed for use in life support appliances, devices or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Philips Semiconductors Copyright Philips Electronics North America Corporation 1999 811 East Arques Avenue All rights reserved. Printed in U.S.A. P.O. Box 3409 Sunnyvale, California 94088-3409 Date of release: 11-99 Telephone 800-234-7381 Document order number: 9397-750-06589 Lett make things better ce ductor = PHILIPS