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Data Device Corporation
105 Wilbur Place
Bohemia, New York 11716
631-567-5600 Fax: 631-567-7358
www.ddc-web.com
FOR MORE INFORMATION CONTACT:
Technical Support:
1-800-DDC-5757 ext. 7677 or 7381
®
Data Device Corporation
105 Wilbur Place
Bohemia, New York 11716
631-567-5600 Fax: 631-567-7358
www.ddc-web.com
FOR MORE INFORMATION CONTACT:
Technical Support:
1-800-DDC-5757 ext. 7771
FEATURES
• 5 Volt Only
• Fully Integrated MIL-STD-1553 A/B
STANAG 3838 Compliant Terminals
• One-Square-Inch Package
• Smallest BC/RT/MT In The Industry
• Hardware and Software Compatible
with BU-61580 ACE Series
• Flexible Processor/Memory Interface
• Bootable RT* Option
• 4K x 16 or 64K x 16* Shared RAM
• Automatic BC Retries
• Programmable BC Gap Times
• Programmable Illegalization
• Simultaneous RT/Monitor Mode
• Operates From 10*/12 /16 / 20* MHz
Clock
DESCRIPTION
The BU-61588 Mini-ACE and BU-61688 Mini-ACE Plus* integrates two
5-volt-only transceivers, protocol, memory management, processor interface
logic, and 4K x 16, or 64K x 16* words of RAM in a choice of pin grid array
(PGA), quad flat pack or gull lead packages. The Mini-ACE is packaged in a
1.0 square inch, low profile, cofired ceramic multi-chip-module (MCM) pack-
age making it the smallest integrated MIL-STD-1553 BC/RT/MT in the indus-
tr y.
The Mini-ACE provides full compatibility to DDC’s BU-61580 and BU-65170
Advanced Communication Engine (ACE). As such, the Mini-ACE includes all
the hardware and software architectural features of the ACE.
The Mini-ACE contains internal address latches and bidirectional data buffers
to provide a direct interface to a host processor bus. The memory manage-
ment scheme for RT mode provides three data structures for buffering data.
These structures, combined with the Mini-ACE’s extensive interrupt capabil-
ity, serve to ensure data consistency while off-loading the host processor.
The Mini-ACE Plus* can optionally boot-up as a RT with the Busy bit set for
1760 applications. The Mini-ACE BC mode implements several features
aimed at providing an efficient real-time software interface to the host proces-
sor including automatic retries, programmable intermessage gap times, auto-
matic frame repetition, and flexible interrupt generation.
The advanced architectural features of the Mini-ACE, combined with its small
size and high reliability, make it an ideal choice for demanding military and indus-
trial processor-to-1553 applications.
BU-65178/65179*/61588/61688*/61689*
MINIATURE ADVANCED
COMMUNICATION ENGINE
(MINI-ACE®) AND MINI-ACE PLUS*
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© 1998, 1999 Data Device Corporation
All trademarks are the property of their respective owners.
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BU-65178/65179*/61688*/61689*
V-1/13-0
FIGURE 1. BU-65178/65179*/61588/61688*/61689*
TRANSCEIVER
A
CH. A
TRANSCEIVER
B
CH. B
DUAL
ENCODER/DECODER,
MULTIPROTOCOL
AND
MEMORY
MANAGEMENT
RT ADDRESS
4K X 16
OR
64K X 16 *
SHARED
RAM
ADDRESS BUS
PROCESSOR
AND
MEMORY
INTERFACE
LOGIC
DATA BUS D15-D0
A15-A0
DATA
BUFFERS
ADDRESS
BUFFERS
PROCESSOR
DATA BUS
PROCESSOR
ADDRESS BUS
MISCELLANEOUS
CLK_IN,
MSTCLR,SSFLAG/EXT_TRG
RTAD4-RTAD0, RTADP IOEN, READYD
ADDR_LAT/MEMOE, ZERO_WAIT/MEMWR,
8/16-BIT/DTREQ, POLARITY_SEL/DTACK
INT
TRANSPARENT/BUFFERED, STRBD, SELECT,
RD/WR, MEM/REG, TRIGGER_SEL/MEMENA-IN,
MSB/LSB/DTGRT
PROCESSOR
AND
MEMORY
CONTROL
INTERRUPT
REQUEST
TX/RX_A
TX/RX_A
TX/RX_B
TX/RX_B
RT_AD_LAT
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BU-65178/65179*/61688*/61689*
V-1/13-0
kohm
pF
Vp-p
Vpeak
5
0.860
10
2.5
0.200
V
V
V
V
V
6.0
7.0
Vcc+0.3
5V_XCVR + 0.3
+1.5
-0.3
-0.3
-0.3
-5V_XCVR - 0.3
-1.5
ABSOLUTE MAXIMUM RATING
Supply Voltage
Logic +5 V
Transceiver +5 V (Note 12)
Logic
Voltage Input Range
MIL-STD-1553 Transceiver Signals
Powered Input Range (Note 14)
Unpowered Input Range
TABLE 1. BU-65178/65179*/61588/61688*/61689* SPECIFICATIONS
UNITSMAXTYPMIN
PARAMETER
RECEIVER
Differential Input Resistance (Notes 1-7)
Differential Input Capacitance (Notes 1-7)
Threshold Voltage, Transformer Coupled, Measured on Stub
Common Mode Voltage (Note 7)
Vp-p
Vp-p
Vp-p
mVp-p, diff
mV
nsec
9
27
27
10
250
300
7
21
22
150
6
18
20
-250
100
TRANSMITTER
Differential Output Voltage
Direct Coupled Across 35 Ω, Measured on Bus
Transformer Coupled Across 70 Ω, Measured on Bus:
• Standard Product = – XX0
• 1760 Amplitude Compliant Product = – XX2
( Note 13 and Ordering Information – Test Criteria)
Output Noise, Differential (Direct Coupled)
Output Offset Voltage, Transformer Coupled Across 70 ohms
Rise/Fall Time
V
V
µA
µA
µA
µA
µA
V
V
mA
mA
mA
mA
pF
pF
0.8
10
-84
-42
-100
-50
0.4
-6.4
-3.2
50
50
2.0
-10
-692
-346
-794
-397
2.4
6.4
3.2
LOGIC
VIH
VIL
IIH (Vcc = 5.5 V, VIN = Vcc)
IIH (Vcc = 5.5 V, VIN = 2.7 V)
SSFLAG/EXT_TRIG
All Other Inputs
IIL (Vcc = 5.5 V, VIN = 0.4 V)
SSFLAG/EXT_TRIG
All Other Inputs
VOH (Vcc = 4.5 V, VIH = 2.7 V, VIL = 0.2 V, IOH = max)
VOL (Vcc = 4.5 V, VIH = 2.7 V, VIL = 0.2 V, IOL = max)
IOL
DB15-DB0
A15-A0
MEMOE/ADDR_LAT
MEMWR/ZEROWAIT
DTREQ/16/8
DTACK/POLARITY_SEL
INT
READYD
IOEN
IOH
DB15-DB0
A15-A0
MEMOE/ADDR_LAT
MEMWR/ZEROWAIT
DTREQ/16/8
DTACK/POLARITY_SEL
INT
READYD
IOEN
CI (Input Capacitance)
CIO (Bi-directional signal input capacitance)
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BU-65178/65179*/61688*/61689*
V-1/13-0
TABLE 1. BU-65178/65179*/61588/61688*/61689* SPECIFICATIONS (CONT.)
UNITSMAXTYPMINPARAMETER
W
W
W
W
W
W
W
W
W
W
W
W
W
W
V
V
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
µs
µs
µs
µs
µs
µs
µs
µs
5.5
5.25
100
160
265
370
580
200
180
285
390
600
19.5
23.5
51.5
131
7
2.5
9.5
18.5
22.5
50.5
129.5
668
4.5
4.75
17.5
21.5
49.5
127
4
1553 MESSAGE TIMING
Completion of CPU Write (BC Start)- to-Start of Next Message
BC Intermessage Gap (Note 8)
BC/RT/MT Response Timeout (Note 9)
18.5 nominal
22.5 nominal
50.5 nominal
128.0 nominal
T Response Time (Note 11)
Transmitter Watchdog Timeout
0.115
0.64
0.93
1.22
1.81
0.230
0.64
0.93
1.22
1.80
0.18
0.42
0.66
1.14
0.5
0.88
1.11
1.33
1.97
1.0
0.99
1.22
1.45
1.90
0.28
0.51
0.75
1.22
POWER SUPPLY REQUIREMENTS
Voltages/Tolerances
BU-65178/61588X3
• +5 V (Logic)
• +5 V (Ch. A, Ch. B)
Current Drain (Total Hybrid)
BU-65178/65179/61588X0
• +5 V (Logic)
BU-65178/65179/61588X3
• +5 V (Logic, Ch. A, Ch. B)
• Idle
• 25% Transmitter Duty Cycle
• 50% Transmitter Duty Cycle
• 100% Transmitter Duty Cycle
BU-61688*/61689X0*
• +5 V (Logic)
BU-61688*/61689X3*
• +5 V (Logic, Ch. A, Ch. B)
• Idle
• 25% Transmitter Duty Cycle
• 50% Transmitter Duty Cycle
• 100% Transmitter Duty Cycle
5.0
5.0
23
116
222
328
540
46
116
217
318
519
POWER DISSIPATION
Total Hybrid
BU-65178/65179/61588X0
• +5 V (Logic)
BU-65178/61588/65179X3
• Idle
• 25% Duty Cycle
• 50% Duty Cycle
• 100% Duty Cycle
BU-61688*/61689X0*
• +5 V (Logic)
BU-61688*/61689X3*
• Idle
• 25% Duty Cycle
• 50% Duty Cycle
• 100% Duty Cycle
Hottest Die
BU-65178/61588X3/65179X3*/ BU-61688*/61689X3*
• Idle
• 25% Duty Cycle
• 50% Duty Cycle
• 100% Duty Cycle
* Mini-ACE PLUS with 64K Words of RAM. RAM impact to Power Supply is based on Host Processor activity; subtract 140 mA if Host is idle.
5
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V-1/13-0
TABLE 1. BU-65178/65179*/61588/61688*/61689* SPECIFICATIONS (CONT.)
UNITSMAXTYPMINPARAMETER
Frequency
BU-61588/61688*/65178
• Default Mode 16
• Software Programmable Option 12
BU-61689*
• Default Mode 20
• Software Programmable Option 10
BU-65179*
• Pin Programmable Option 10/12/16/20
MHz
MHz
MHz
MHz
MHz
Long Term Tolerance
• 1553A Mode
• 1553B Mode
Short Term Tolerance, 1 second
• 1553A Mode
• 1553B Mode
Duty Cycle
• 16 MHz
• 12 MHz
• 10 MHz*
• 20 MHz
%
%
%
%
%
%
%
%
0.01
0.1
0.001
0.01
67
60
60
60
33
40
40
40
THERMAL
Thermal Resistance, Junction-to-Case, Hottest Die (θJC)
BU-65178/61588X3*
Operating Case/Ball Temperature
-1XX, -4XX
-2XX, -5XX
-3XX, -8XX
-EXX
Storage Temperature
Lead Temperature (soldering, 10 sec.)
°C/W
°C
°C
°C
°C
°C
°C
6.8
+125
+85
+70
+100
+150
+300
-55
-40
0
-40
-65
PHYSICAL CHARACTERISTICS
Size
BU-65178/61588 P
BU-65179*/61688*/61689*
BU-65178/61588 F/G
BU-65179*/61688*/61689*
Weight
BU-65178/61588 F/P/G
BU-65179*/61688*/61689*
in.
(mm)
in.
(mm)
0.3
(9)
1.0 X 1.0 X 0.150
(25.4 x 25.4 x 3.81)
1.0 X 1.0 X 0.155
(25.4 x 25.4 x 3.94)
oz
(g)
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V-1/13-0
Notes: Notes 1 through 6 are applicable to the Receiver Differential Resistance and Differential Capacitance specifications:
(1) Specifications include both transmitter and receiver (tied together internally).
(2) Measurement of impedance is directly between pins TX/RX A(B) and TX/RX A(B) of the BU-65178/61588X3 hybrid.
(3) Assuming the connection of all power and ground inputs to the hybrid.
(4) The specifications are applicable for both unpowered and powered conditions.
(5) The specifications assume a 2 volt rms balanced, differential, sinusoidal input. The applicable frequency range is 75 kHz to 1 MHz.
(6) Minimum resistance and maximum capacitance parameters are guaranteed, but not tested, over the operating range.
(7) Assumes a common mode voltage within the frequency range of dc to 2 MHz, applied to pins of the isolation transformer on the stub side (either
direct or transformer coupled), referenced to hybrid ground. Use a DDC recommended transformer or other transformer that provides an equiva-
lent CMRR.
(8) Typical value for minimum intermessage gap time. Under software control, may be lengthened to (65,535 µs minus message time), in increments
of 1 µs.
(9) Software programmable (4 options). Includes RT-to-RT Timeout (Mid-Parity of Transmit Command to Mid-Sync of Transmitting RT Status).
(10) For both +5 V logic and transceiver. +5 V for channels A and B.
(11) Measured from mid-parity crossing of Command Word to mid-sync crossing of RT’s Status Word.
(12) External 10 µF Tantalum and 0.1 µF capacitors should be located as close as possible to Pins 20 and 72 on the Flat Package and Pins A9 and
J3 on the PGA package, and 0.1 µF at Pin 37/D3.
(13) MIL-STD–1760 requires that the Mini-ACE produce a 20 Vp-p minimum output on the stub connection.
(14) Assuming the use of isolation transformers with the turns ratios shown in Figure 5 and in the absence of common mode signal on the 1553
stub, this equates to a nominal stub voltage of 38 VoltsPK-to-PK transformer-coupled, or 53 VoltsPK-to-PK direct-coupled.
7
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BU-65178/65179*/61688*/61689*
V-1/13-0
NOTES
** Note that the Test Output pins on the flat pack are pads located on
the bottom of the package.
1. BU-65179*, A15/A14 pins are actually CLK SEL 1 / CLK SEL 0 respectively.
2. BU-65179*, A12 pin selects the RT_BOOT_L OPTIONAL MODE.
3. BU-65179*, A13 pin has no connection.
35 RTAD4
**
1 MEM/REG 42 D00
2 MSTCLR 43 D02
3 A11 44 D03
4 A10 45 D05
5 TX/RX-A 46 D08
6 A08 47
7
D07
TX/RX-A 48
8
D13
A14, See NOTE 1 49 D12
9 A04 50 D14
10 A03 51 D09
11 A07 52 D11
12 A02 53 D15
13 TX/RX-B 54 D10
14 MEMOE/ADDR_LAT 55 TRANSPARENT/
BUFFERED
15 A00 56 READYD
16 TX/RX-B 57 INT
17 LOGIC GND 58 IOEN
18 LOGIC GND 59 TX_INH_A
19 LOGIC GND 60 TX_INH_B
20 +5V VCC2 61 SELECT
21 RTAD2 62 STRBD
22 A06 63 RD/WR
23 MEMWR/
ZEROWAIT
64 DTGRT/MSB/LSB
24 DTREQ/16/8 65 Test Output (RX-A)
25 Test Output (RX-B) 66 A15, See NOTE 1
26 Test Output (RX-B) 67 Test Output (RX-A)
27 A01 68 A05
28 MEMENA_IN/
TRIGGER_SEL
69 A09
29 DTACK/
POLARITY_SEL
70 A12, See NOTE 2
30 CLOCK_IN 71 A13, See NOTE 3
31 RT_AD_LAT 72 +5V VCC1
32 SSFLAG/EXT_TRIG ** TestOutput(A_RExt)
33 RTAD0
**
Test Output
(A_Test1)
34 RTAD3
** Test Output
(AB_Test4)
TestOutput(B_RExt)
36 D06
** TestOutput
(AB_Tstck)
H8
B4
B5
C2
C3
C1
D2
D1
C4
E3
F2
E1
F3
G1
G4
G3
H1
A7
A8
J8
A9
J7
F1
J2
H5
H3
H4
G2
J5
J6
H6
G7
H2
H7
G8
E8
E4
H9
F9
F7
G5
E7
E9
D7
B2
D9
B9
A2
D8
A1
C9
B8
C8
A3
B7
C7
C6
A6
A5
J1
A4
C5
B6
E2
J4
B3
B1
J3
D4
D5
D6
E6
37 D3 +5V VCC
** F4
TestOutput
(AB_Test2)
38 F8 D01
**
F5
TestOutput
(AB_Test3)
39 G6 D04
**
F6
TestOutput
(B_Test1)
40 G9 RTADP
N/A E5 No Connect
41 J9 RTAD1
TABLE 2. BU-65178/65179*/61588/61688*/61689* PIN
LISTINGS (QFP QUAD FLAT PACK, PGA-PIN GRID
ARRAY AND GULL LEAD)
NAMEPGAQFP NAMEPGAQFP
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V-1/13-0
FIGURE 2. BU-65178F / 65179F* /61588F /61688F*/61689F* MECHANICAL OUTLINE (QUAD FLAT PACK - QFP)
1.000 SQ ±0.010
(25.400 ±0.254)
72
1
VIEW "B"
0.018 ±0.002
(0.457 ±0.051)
0.050 ±0.005
(1.270 ±0.127)
Notes:
1) Dimensions are in inches (mm).
2) Package Material: Alumina (AL2O3)
3) Lead Material: Kovar, Plated by 50m in. minimum nickel under 60m in. minimum gold.
4) There are 6 test pads located on the bottom of the package. These pads are recessed
so as not to interfere when mounting the hybrid. There are no user connections to these pads.
5) Measurement shall be made 0.050” (1.27 mm) from the package body.
VIEW "B"
2.000
(50.800)
0.500 ±0.02
(12.70 ±0.127)
0.200 ±0.015
(5.080 ±0.127)
0.850 ±0.008
(21.590 ±0.203)
0.010 ±0.002
(0.254 ±0.051)
0.035 ±0.01
(0.889 ±0.127)
0.050 ±0.005
(1.270 ±0.127)
0.090 ±0.010
(2.286 ±0.254)
0.130 MAX
(3.30)
BOTTOM VIEW
SIDE VIEW
VIEW "A"
VIEW "A"
INDEX DENOTES
PIN NO. 1
P2 P1
P6 P5 P4 P3
0.100 DIA.
(2.540) (see note 4)
1.024 ±0.014 NOM.
(26.010 ±0.356) VIEW "C"
LEAD
0.035 ±0.005
(0.889 ±0.127)
VIEW "C"
(see note 5)
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V-1/13-0
FIGURE 3. BU-65178P / 65179P* /61588P /61688P*/61689P* MECHANICAL OUTLINE (PIN GRID ARRAY - PGA)
FIGURE 4. BU-65178G / 65179G* /61588G /61688G*/61689G* MECHANICAL OUTLINE (GULL LEAD)
9
8
7
6
5
4
3
2
1
0.800 ±0.005
(20.320 ±0.127) 0.100 ±0.005
(2.540 ±0.127)
TOP VIEW
Notes:
1) Dimensions are in inches (mm).
2) Package Material: Alumina (AL2O3)
3) Lead Material: Kovar, Plated by 50 in. minimum nickel under 60 in. minimum gold.
J H G F E D C B A
BOTTOM VIEW
1.000 SQ ±0.010
(25.400 ±0.254)
0.180 ±0.008
(4.572 ±0.203)
0.018 ±0.002
(0.457 ±0.051)
0.155 MAX
(3.810)
SIDE VIEW
0.070 ±0.005
(1.778 ±0.127)
0.070 ±0.005
(1.778 ±0.127)
Indicates
Pin A1
1.00 SQ ±0.01
(25.40 ±0.25)
72
1
VIEW "B"
Notes:
1) Dimensions are in inches (mm).
2) Package Material: Alumina (AL2O3)
3) Lead Material: Kovar, Plated by 50m in. minimum nickel
under 60m in. minimum gold.
4) There are 6 test pads located on the bottom of the package.
These pads are recessed so as not to interfere when
mounting the hybrid.
VIEW "B"
1.38 ±0.02
(35.05 ±0.51)
0.19 Ref
(4.83 Ref)
0.850 ±0.008
(21.590 ±0.203)
0.08 MIN FLAT
(2.03)
0.130 MAX
(3.31)
0.018 ±0.002
(0.457 ±0.051)
0.050 ±0.005
(1.270 ±0.127)
BOTTOM VIEW
SIDE VIEW
VIEW "A"
INDEX DENOTES
PIN NO. 1
P2 P1
P6 P5 P4 P3
0.100 DIA.
(2.540) (see note 4)
0.010 ±0.002
(0.254 ±0.051)
0.012 R. MAX
(0.305 R.)
0.05 MIN FLAT
(1.27)
0.075 MAX FLAT
(1.91)
1.024 ±0.014 NOM.
(26.010 ±0.356)
VIEW "A"
0.006 -0.004,+0.010
(0.152 -0.100,+ 0.254)
0.050 ±0.005
(1.27 ±0.127)
10
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V-1/13-0
TRANSFORMERS
In selecting isolation transformers to be used with the Mini-ACE,
there is a limitation on the maximum amount of leakage induc-
tance. If this limit is exceeded, the transmitter rise and fall times
may increase, possibly causing the bus amplitude to fall below
the minimum level required by MIL-STD-1553. In addition, an
excessive leakage imbalance may result in a transformer dynam-
ic offset that exceeds 1553 specifications.
The maximum allowable leakage inductance is 6.0 µH, and
is measured as follows:
The side of the transformer that connects to the
Mini-ACE is defined as the “primary” winding. If one side of the
primary is shorted to the primary center-tap, the inductance
should be measured across the “secondary” (stub side) winding.
This inductance must be less than 6.0 µH. Similarly, if the other
side of the primary is shorted to the primary center-tap, the
inductance measured across the “secondary” (stub side) wind-
ing must also be less than 6.0 µH.
The difference between these two measurements is the
“differential” leakage inductance. This value must be less than
1.0 µH.
Beta Transformer Technology Corporation (BTTC), a subsidiary
of DDC, manufactures transformers in a variety of mechanical
configurations with the required turns ratios of 1:2.5 direct cou-
pled, and 1:1.79 transformer coupled. TABLE 3 provides a listing
of many of these transformers. For further information, contact
BTTC at 631-244-7393 or at www.bttc-beta.com.
Notes:
1. All Transformers in the table above can be used with BU-6XXXXX3/6 (1553B transceivers).
2. Transformers identified with "#" in the table above are not recommended for use with the BU-6XXXXX4 (McAir-Compatable transceivers)
TABLE 3. BTTC TRANSFORMERS FOR USE WITH Mini-ACE
BTTC PART
NUMBER
# OF CHANNELS,
CONFIGURATION
COUPLING RATIO
DESCRIPTION
COUPLING
RATIO (1:X) MOUNTING MAX HEIGHT
WIDTH
(INCLUDING
LEADS)
LENGTH
(INCLUDING
LEADS)
MLP-2005 Single Direct (1:2.5) SMT 0.185" 0.4" 0.52"
MLP-3005 Single Direct (1:2.5) Through Hole 0.185" 0.4" 0.4"
B-3230 (-30) # Single Direct (1:2.5) Through Hole 0.25" 0.35" 0.5"
MLP-2205 Single Transformer (1:1.79) SMT 0.185" 0.4" 0.52"
MLP-3205 Single Transformer (1:1.79) Through Hole 0.185" 0.4" 0.4"
B-3229 (-29) # Single Transformer (1:1.79) Through Hole 0.25" 0.35" 0.5"
HLP-6015 # Single Direct & Transformer (1:2.5) &
(1:1.79) SMT 0.19" 0.63" 1.13"
B-3227 (-27) # Single Direct & Transformer (1:2.5) &
(1:1.79) SMT 0.29" 0.63" 1.13"
MLP-3305 Single Direct & Transformer (1:2.5) &
(1:1.79) Through Hole 0.185" 0.4" 0.4"
B-3226 (-26) # Single Direct & Transformer (1:2.5) &
(1:1.79) Through Hole 0.25" 0.625" 0.625"
HLP-6014 # Single Direct & Transformer (1:2.5) &
(1:1.79) Flat Pack 0.19" 0.63" 1.13"
B-3231 (-31) # Single Direct & Transformer (1:2.5) &
(1:1.79) Flat Pack 0.29" 0.63" 1.13"
DSS-2005 Dual (Side-by-Side) Direct (1:2.5) SMT 0.13" 0.72" 0.96"
DSS-2205 Dual (Side-by-Side) Transformer (1:1.79) SMT 0.13" 0.72" 0.96"
DSS-1005 Dual (Side-by-Side) Direct & Transformer (1:2.5) &
(1:1.79) SMT 0.165" 0.72" 0.96"
TSM-2005 Dual (Stacked) Direct (1:2.5) SMT 0.32" 0.4" 0.52"
TSM-2205 Dual (Stacked) Transformer (1:1.79) SMT 0.32" 0.4" 0.52"
TST-9117 # Dual (Stacked) Direct & Transformer (1:2.5) &
(1:1.79) SMT 0.335" 1.125" 1.125"
TST-9107 # Dual (Stacked) Direct & Transformer (1:2.5) &
(1:1.79) Through Hole 0.335" 0.625" 0.625"
TST-9127 # Dual (Stacked) Direct & Transformer (1:2.5) &
(1:1.79) Flat Pack 0.335" 0.625" 0.625"
11
Data Device Corporation
www.ddc-web.com
BU-65178/65179*/61688*/61689*
V-1/13-0
INTERFACE TO MIL-STD-1553 BUS
FIGURE 5 illustrates the interface between the various versions
of the Mini-ACE and a MIL-STD-1553 bus. Connections for both
direct (short stub) and transformer (long stub) coupling, as well
as the nominal peak-to-peak voltage levels at various points
(when transmitting), are indicated in the diagram.
Mini-ACE
DATA
BUS
Z0
55
55
TX/RX
TX/RX
(1:2.5)
11.2 Vpp 28 Vpp
1FT MAX
Z0
(1:1.79)
11.2 Vpp 20 Vpp
(1:1.41)
COUPLING
TRANSFORMER
0.75 Z0
0.75 Z0
LONG STUB
(TRANSFORMER
COUPLED)
20 FT MAX
28 Vpp
SHORT STUB
(DIRECT COUPLED)
OR
NOTES: 1. Z 0=70TO85 OHMS
ISOLATION
TRANSFORMER
ISOLATION
TRANSFORMER
7 Vpp
7 Vpp
2. NOMINAL VOLTAGE
LEVELS SHOWN
Mini-ACE
FIGURE 5. MINIATURE ADVANCED COMMUNICATIONS ENGINE INTERFACE TO MIL-STD-1553 BUS
12
Data Device Corporation
www.ddc-web.com
BU-65178/65179*/61688*/61689*
V-1/13-0
ORDERING INFORMATION
BU-61588F3-11XX
Supplemental Process Requirements:
S = Pre-Cap Source Inspection
L = 100% Pull Test
Q = 100% Pull Test and Pre-Cap Source Inspection
K = One Lot Date Code
W = One Lot Date Code and Pre-Cap Source Inspection
Y = One Lot Date Code and 100% Pull Test
Z = One Lot Date Code, Pre-Cap Source Inspection and 100% Pull Test
Blank = None of the Above
Test Criteria:
0 = Standard Testing
1 = X-Ray
2 = MIL-STD-1760 Amplitude Compliant - Applies to +5 Volt Transceiver Option Only
3 = MIL-STD-1760 and X-Ray
Process Requirements:
0 = Standard DDC processing, no Burn-In (See table on next page)
1 = MIL-PRF-38534 Compliant (See Note 3)
2 = B (See Note 1)
3 = MIL-PRF-38534 Compliant (See Note 3) with PIND Testing
4 = MIL-PRF-38534 Compliant (See Note 3) with Solder Dip
5 = MIL-PRF-38534 Compliant (See Note 3) with PIND Testing and Solder Dip
6 = B (See Note 1) with PIND Testing
7 = B (See Note 1) with Solder Dip
8 = B (See Note 1) with PIND Testing and Solder Dip
9 = Standard DDC Processing with Solder Dip, no Burn-In (See table on next page)
Temperature Range/Data Requirements:
1 = -55°C to +125°C
2 = -40°C to +85°C
3 = 0°C to +70°C
4 = -55°C to +125°C with Variables Test Data
5 = -40°C to +85°C with Variables Test Data
8 = 0°C to +70°C with Variables Test Data
Voltage/Transceiver Option:
0 = No Transceivers
3 = +5 Volts, rise/fall times=100 to 300 ns (-1553B) (See Test Criteria - 1760 Compliant with option -XX2)
Package Type:
F = 72-Pin Quad Flat Pack
P = 81-Pin PGA
G = 72-Pin Gull Lead
Product Type:
65178 = RT Only, 16/12 MHz, 4K RAM
61588 = BC/RT/MT, 16/12 MHz, 4K RAM
65179 = RT/RT_BOOT, 10/12/16/20 MHz, 4K RAM
61688 = BC/RT/MT, 12/16 MHz, 64K RAM
61689 = BC/RT/MT, 10/20 MHz, 64K RAM
Notes:
(1) Standard DDC Processing with burn-in and full temperature test, see table on next page.
(2) The above products contain tin-lead solder finish as applicable to solder dip requirements.
(3) MIL-PRF-38534 product grading is designated with the following dash numbers:
Class H is a -11X, 13X, 14X, 15X, 41X, 43X, 44X, 45X
Class G is a -21X, 23X, 24X, 25X, 51X, 53X, 54X, 55X
Class D is a -31X, 33X, 34X, 35X, 81X, 83X, 84X, 85X
13
Data Device Corporation
www.ddc-web.com
BU-65178/65179*/61688*/61689*
V-1/13-0
TABLE 11015 (note 1), 1030 (note 2)
BURN-IN
Notes:
1. For Process Requirement "B*" (refer to ordering information), devices may be non-compliant with MIL-
STD-883, Test Method 1015, Paragraph 3.2. Contact factory for details.
2. When applicable.
3000g2001CONSTANT ACCELERATION
C1010TEMPERATURE CYCLE
A and C1014SEAL
—2009, 2010, 2017, and 2032INSPECTION
CONDITION(S)METHOD(S)
MIL-STD-883
TEST
STANDARD DDC PROCESSING
FOR HYBRID AND MONOLITHIC HERMETIC PRODUCTS
14
V-1/13-0 PRINTED IN THE U.S.A.
DATA DEVICE CORPORATION
REGISTERED TO:
ISO 9001:2008, AS9100C:2009-01
EN9100:2009, JIS Q9100:2009
FILE NO. 10001296 ASH09
R
E
G
I
S
T
E
R
E
D
F
I
R
M
®
U
105 Wilbur Place, Bohemia, New York, U.S.A. 11716-2426
For Technical Support - 1-800-DDC-5757 ext. 7771
Headquarters, N.Y., U.S.A. - Tel: (631) 567-5600, Fax: (631) 567-7358
United Kingdom - Tel: +44-(0)1635-811140, Fax: +44-(0)1635-32264
France - Tel: +33-(0)1-41-16-3424, Fax: +33-(0)1-41-16-3425
Germany - Tel: +49-(0)89-15 00 12-11, Fax: +49-(0)89-15 00 12-22
Japan - Tel: +81-(0)3-3814-7688, Fax: +81-(0)3-3814-7689
Asia -Tel: +65-6489-4801
World Wide Web - http://www.ddc-web.com
The information in this data sheet is believed to be accurate; however, no responsibility is
assumed by Data Device Corporation for its use, and no license or rights are
granted by implication or otherwise in connection therewith.
Specifications are subject to change without notice.
Please visit our Web site at www.ddc-web.com for the latest information.
RECORD OF CHANGE
For BU-65178 Data Sheet
Revision
Date
Pages
Description
R
6/2009
8
Replaced Table 3.
T
10/2010
6 & 7
(FIGURE 2) and gull-wing (FIGURE 4)
CQFP packages has changed to six (6) test
pads
U
11/2010
6
Update to Figure 2.
V
1/2013
2 - 6
Table 1 edits: Added MIL-STD-1553
Transceiver Signals to Absolute Maximum
Rating section. Added Note 14. Reformatted
Table.
