TC7117ACLW713 - Microchip Technology

TC7116/A/TC7117/A

Features:

• Low Temperature Drift Internal Reference:

- TC7116/TC7117 80 ppm/°C, Typ.

- TC7116A/TC7117A 20 ppm/°C, Typ.

• Display Hold Function

• Directly Drives LCD or LED Display

• Zer o Readi ng with Zero Input

• Low Noise for Stable Display:

- 2V or 200mV Full Scale Range (FSR)

• Auto-Zero Cycle Eliminates Need for Zero

• Adjustment Potentiometer

• True Polarity Indication for Precision Null

Applications

• Convenient 9V Battery Operation:

(TC7116/TC7116A)

• High-Impedance CMOS Differential Inputs: 1012Ω

• Low-Power Operation: 10mW

Applications:

• Thermometry

• Bridge Readouts: Strain Gauges, Load Cells,

Null Detectors

• Digital Meters: Voltage/Current/Ohms/Power, pH

• Digital Scales, Process Monitors

• Portable Instrumentation

Device Selection Table

General Description:

The TC7116A/TC7117A are 3-1/2 digit CMOS Analog-

to-Digital Converters (ADCs) containing all the active

compon ents n ecessar y to cons truct a 0.05% resolutio n

measurement system. Seven-segment decoders,

polarity and digit drivers, voltage reference, and clock

circuit are integrated on-chip. The TC7116A drives

Liquid Crystal Displays (LCDs) and includes a back-

plane d river . Th e TC7117A dr ives common anode Lig ht

Emitting Diode (LED) displays directly with an 8mA

drive current per segment.

These devices incorporate a display hold (HLDR)

function . The dis played rea ding rema ins inde finitely, as

long as HLDR is held high. Conversions continue, but

output data display latches are not updated. The refer-

ence low input (VREF-) is not available, as it is with the

TC7106/7107. VREF- is tied internally to analog

common in the TC7116A/7117A devices.

The TC7116A/7117A reduces linearity error to less

than 1 count. Rollover error (the difference in readings

for equal magn itude but op posit e pola rity i nput s ignals )

is below ±1 count. High-impedance differential inputs

offer 1pA leakage current and a 1012Ω input imped-

ance. The 15μVP-P noise perf orm anc e en abl es a “roc k

solid” reading. The auto-zero cycle ensures a zero

display reading with a 0V input.

The TC7116A and TC7117A feature a precision, low

drift internal reference, and are functionally identical to

the TC7116/TC7117. A low drift external reference is

not normally required with the TC7116A/TC7117A.

Package Code Package Temperature Range

CPL 40-Pin PD IP 0°C to +70°C

IJL 40-Pin CERDIP -25°C to +85°C

CKW 44-Pin PQFP 0°C to +70°C

CLW 44-Pin PLCC 0°C to +70°C

3-1/2 Digit Analog-to-Digital Converters with Hold

TC7116/A/TC7117/A

Package Type

BP/

GND

COMMON

V+

18 19 20 21 23 24

AB4

POL

VIN+

VIN-

6543 1442

OSC1

OSC2

OSC3

TEST

VREF+

25 26 27 28

3214 CAZ

3115 VBUFF

3016 VINT

2917

TC7116CLW

TC7116ACLW

TC7117CLW

TC7117ACLW

TC7116CPL

TC7116ACPL

TC7117CPL

TC7117ACPL

V-

CREF+

CREF-

BP/

GND

1NC

TC7116CKW

TC7116ACKW

TC7117CKW

TC7117ACKW

12 13 14 15 17 18

44 43 42 41 39 3840

VREF+

COMMON

CAZ

VBUFF

VINT

V-

19 20 21 22

VIN+

OSC3

TEST

HLDR

OSC2

OSC1

V+

CREF+

CREF-

VIN-

POL

40-Pin PDIP 40-Pin CERDIP

44-Pin PLCC 44-Pin PQFP

OSC1

TEST

VREF+

COMMON

CAZ

HLDR

AB4

(Minus Sign) (Minus Sign)

10's

100's

1000's

(TC7116/7117)

(TC7116A/TC7117A)

(TC7116/7117)

(TC7116A/TC7117A)

100's

OSC2

OSC3

V+

CREF+

CREF-

VIN+

VIN-

VBUFF

VINT

V-

BP/GND

POL

1's

HLDR

TC7116IJL

TC7116AIJL

TC7117IJL

TC7117AIJL

OSC1

TEST

VREF+

COMMON

CAZ

HLDR

AB4

10's

100's

1000's

100's

OSC2

OSC3

V+

CREF+

CREF-

VIN+

VIN-

VBUFF

VINT

V-

BP/GND

POL

1's

Note 1: NC = No internal connection.

2: Pins 9, 25, 40 and 56 are connected to the die substrate. The potential at these pins is approximately V+. No

external connections should be made.

TC7116/A/TC7117/A

Typical Application

VREF+

TC7116/A

VREF

24kΩ

1kΩ

39 38 40

0.47μF

0.1μF

V-

OSC1OSC3

OSC2 To Analog

Common (Pin 32)

3 Conversions Per Second

COSC

100kΩ

47kΩ

0.22μF

0.01μF

nalog

Input

–

CREF-CREF+

VIN+

VIN-

ANALOG

COMMON

VINT

VBUFF

CAZ

Segment

Drive

2–19

22–25

POL

BP/GND

V+

Minus Sign Backplane Drive

ROSC 100pF

LCD Display (TC7116/7116A)

or Common Anode LED Display

(TC7117/7117A)

1MΩ

HLDR

Display

Hold

100mV

TC7117/A

TC7116/A/TC7117/A

1.0 ELECTRICAL

CHARACTERISTICS

Absolute Maximum Ratings*

Supply Voltage:

TC7116/TC7116A (V+ to V-)...........................15V

TC7117/TC7117A (V+ to GND).......................+6V

V- to GND..................................... ...... ..... .........-9V

Analog Input Voltage (Either Input) (Note 1)...V+ to V-

Reference Input Voltage (Either Input)............V+ to V-

Clock Input:

TC7116/TC7116A............................... TEST to V+

TC7117/TC7117A................................. GND to V+

Package Power Dissipation; TA ≤ 70°C (Note 2)

40-Pin CDIP................................................2.29W

40-Pin PDIP................................................1.23W

44-Pin PLCC...............................................1.23W

44-Pin PQFP...............................................1.00W

Operati ng Temperatu r e:

C (Commercial) Device................... 0°C to +70°C

I (Commercial) Device................. ... 0°C to +70°C

Storage Temperature..........................-65°C to +150°C

*Stresses above those listed under “Absolute

Maximum Ratings” may cause permanent damage to

the devi ce. These are stress ratin gs only and functional

operatio n of the devic e at these or an y other con ditions

above those indicated in the operation sections of the

specifications is not implied. Exposure to Absolute

Maximum Rating conditions for extended periods may

affect device reliability.

TABLE 1-1: TC7116/A AND TC7117/A ELECTRICAL SPECIFICATIONS

Electrical Characteristics: Unless otherwise noted, specifications apply to both the TC7116/A and TC7117/A at TA = 25°C,

fCLOCK = 48kHz. Parts are tested in the circuit of the Typical Operating Circuit.

Symbol Parameter Min Typ Max Unit Test Co nditions

ZIR Zero Input Reading — ±0 — Digital

Reading VIN = 0V

Full Scale = 200mV

Ratiometric Reading 999 999/1000 1000 Digital

Reading VIN = VREF

VREF = 100mV

R/O Rollover Error (Difference in Reading

for Equal Positive and Negative

Readings Near Full Scale)

-1 ±0.2 +1 Counts VIN- = + VIN+ ≅ 200mV

or ≈ 2V

Linearity (Maximum Deviation from

Best Straight Line Fit) -1 ±0.2 +1 Counts Full Scale = 200mV or 2V

CMRR Common Mode Rejection Ratio

(Note 3) —50—μV/V VCM = ±1V, VIN = 0V

Full Scale = 200mV

eNNoise (Peak to Peak 95% of Time) — 15 — μVV

IN = 0V

Full Scale = 200mV

ILLeakage Current at Input — 1 10 pA VIN = 0V

Zero Reading Drift — 0.2 1 μV/°C VIN = 0V

“C” Device = 0°C to +70°C

—1.02μV/°C “I” Device = -25°C to +85°C

Note 1: Input voltages may exceed the supply voltages provided the input current is limited to ±100 μA.

2: Dissipation rating assumes device is mounted with all leads soldered to printed circuit board.

3: Refer to “Differential Input” discussion.

4: Backplane drive is in phase with segment drive for “OFF” segment, 180° out of phase for “ON” segment. Frequency is

20 times conversion rate. Average DC component is less than 50mV.

5: The TC71 16/ TC7116A logic inputs have an internal pull-down resistor connected from HLDR, Pin 1 to TEST, Pin 37. The

TC7117/TC7117A logic inputs have an internal pull-down resistor connected from HLDR, Pin 1 to GND, Pin 21.

TC7116/A/TC7117/A

TCSF Scale Factor Temperature Coefficient — 1 5 ppm/°C VIN = 199mV,

“C” Device = 0°C to +70°C

(Ext. Ref = 0ppm°C)

— — 20 ppm/°C “I” Device = -25°C to +85°C

Input Resistance, Pin 1 30 70 — kΩ(Note 5)

VIL, Pin 1 — — Test + 1.5 V TC7116/A Only

VIL, Pin 1 — — GND + 1.5 V TC7117/A Only

VIH, Pin 1 V+ - 1.5 — — V Both

IDD Supply Current (Does not Include LED

Current for TC7117/A) —0.81.8mAV

IN = 0V

VCAnalog Common Voltage

(with Respect to Positive Supply) 2.4 3.05 3.35 V 25kΩ Between Common

and Positive Supply

VCTC Temperat ure Coefficient of Analog

Common (with Respect to Positive

Supply)

——

—

ppm/°C

“C” Device: 0°C to +70°C

TC7116A/TC7117A

TC7116/TC7117

VSD TC7116/TC7117A ONLY Peak to Peak

Segment Drive Voltage 4 5 6 V V+ to V - = 9V

(Note 4)

VBD TC7116A/TC7116A ONLY Peak to

Peak

Backplane Drive Voltage

4 5 6 V V+ to V- = 9V

(Note 4)

TC7117/TC7117A ONLY

Segment Sinking Current

(Except Pin 19)

5 8 — mA V+ = 5.0V

Segment V oltage = 3V

TC7117/TC7117A ONLY

Segment Sinking Current (Pin 19 Only) 10 16 — mA V+ = 5.0V

Segment V oltage = 3V

TABLE 1-1: TC7116/A AND TC7117/A ELECTRICAL SPECIFICATIONS (CONTINUED)

Electrical Characteristics: Unless otherwise noted, specifications apply to both the TC7116/A and TC7117/A at TA = 25°C,

fCLOCK = 48kHz. Parts are tested in the circuit of the Typical Operating Circuit.

Symbol Parameter Min Typ Max Unit Test Co nditions

Note 1: Input voltages may exceed the supply voltages provided the input current is limited to ±100 μA.

2: Dissipation rating assumes device is mounted with all leads soldered to printed circuit board.

3: Refer to “Differential Input” discussion.

4: Backplane drive is in phase with segment drive for “OFF” segment, 180° out of phase for “ON” segment. Frequency is

20 times conversion rate. Average DC component is less than 50mV.

5: The TC71 16/ TC7116A logic inputs have an internal pull-down resistor connected from HLDR, Pin 1 to TEST, Pin 37. The

TC7117/TC7117A logic inputs have an internal pull-down resistor connected from HLDR, Pin 1 to GND, Pin 21.

TC7116/A/TC7117/A

2.0 PIN DESCRIPTIONS

The descriptions of the pins are listed in Table 2-1.

TABLE 2-1: PIN FUNCTION T ABLE

Pin Nu m ber

(40-Pin PDIP)

(40-Pin CER DIP)

Pin Number

(44-Pin PQ F P) Symbol Description

1 8 HLDR Hold pin, Logic 1 holds present display reading.

29D

1Activates the D section of the units display.

310C

1Activates the C section of the units display.

411B

1Activates the B section of the units display.

512A

1Activates the A section of the units display.

613F

1Activates the F section of the unit s display.

714G

1Activates the G section of the units display.

815E

1Activates the E section of the units display.

916D

2Activates the D section of the tens display.

10 17 C2Activates the C section of the tens display.

11 18 B2Activates the B section of the tens display.

12 19 A2Activates the A section of the tens display.

13 20 F2Activates the F section of the tens display.

14 21 E2Activates the E section of the tens display.

15 22 D3Activates the D section of the hundreds display.

16 23 B3Activates the B section of the hundreds display.

17 24 F3Activates the F section of the hundreds display.

18 25 E3Activates the E section of the hundreds display.

19 26 AB4Activates both halves of the 1 in the thousands display.

20 27 POL Activates the negative polarity display.

21 28 BP/

GND LCD backplane drive output (TC7116/TC7116A). Digit al ground

(TC7117/TC7117A).

22 29 G3Activates the G section of the hundreds display.

23 30 A3Activates the A section of the hundreds display.

24 31 C3Activates the C section of the hundreds display.

25 32 G2Activates the G section of the tens display.

26 34 V- Negative power supply voltage.

27 35 VINT Integrator output. Connection point for integration capacitor.

See Section 4.3 “Integrating Capacitor”, Inte g ra ting Ca pacitor fo r more

details.

28 36 VBUFF Integration resistor connection. Use a 47kΩ resistor for a 200mV full scale range

and a 470kΩ resistor for 2V full scale range.

29 37 CAZ The size of the auto-zero capacitor influences system noise. Use a 0.47μF

capacitor for 200mV full scale, and a 0.047μF capacitor for 2V full scale.

See Section 4.1 “Auto-Zero Capacitor”, Auto-Zero Capacitor for more details.

30 38 VIN- The analog LOW input is connected to this pin.

31 39 VIN+ The analog HIGH input signal is connected to this pin.

32 40 COMMON This pin is primarily used to set the Analog Common mode voltage for battery

operation, or in systems where the input signal is referenced to the power sup-

ply. It also acts as a reference voltage source. See Section 3.1.6 “Analog Com-

mon”, Analog Common for more details.

33 41 CREF- See Pin 34.

TC7116/A/TC7117/A

34 42 CREF+A 0.1μF capacitor is used in most applications. If a large Common mode voltage

exists (for example, the VIN- pin is not at analog common), and a 200mV scale is

used, a 1μF capacitor is recommended and will hold the rollover error to

0.5 count.

35 43 V+ Positive Power Supply Voltage.

36 44 VREF+ The analog input required to generate a full scale output (1999 counts). Place

100mV between Pins 32 and 36 for 199.9mV full scale. Place 1V between

Pins 35 and 36 for 2V full scale. See Section 4.6 “Reference Voltage”, Re fe r-

ence Voltage.

37 3 TEST Lamp test. When pulled HIGH (to V +), all segments will be turned on and the di s-

play should read -1888. It may also be used as a negative supply for externally

generated decimal points. See Sec tion 3.1.7 “Test”, TEST for additional infor-

mation.

38 4 OSC3 See Pin 40.

39 6 OSC2 See Pin 40.

40 7 OSC1 Pins 40, 39, 38 make up the oscillator section. For a 48kHz clock (3 readings per

section), connect Pin 40 to the junction of a 100kΩ resistor and a 100pF capaci-

tor. The 100kΩ resistor is tied to Pin 39 and the 100pF capacitor is tied to Pin 38.

TABLE 2-1: PIN FUNCTION TABLE (CONTINUED)

Pin Nu m ber

(40-Pin PDIP)

(40-Pin CER DIP)

Pin Number

(44-Pin PQ F P) Symbol Description

TC7116/A/TC7117/A

3.0 DETAILED DESCRIPTION

(All Pin Designations Refer to 40-Pin PDIP.)

3.1 Analog Section

Figure 3-1 show s the bloc k dia gra m of the analog se c-

tion for the TC7116/TC7116A and TC7117/TC7117A.

Each me asur eme nt cycl e is div ide d int o thre e phas es:

(1) Auto-Zero (AZ), (2) Signal Integrate (INT), and

(3) Reference Integrate (REF), or De-integrate (DE).

3.1.1 AUTO-ZERO PHASE

High and low inputs are disconnected f rom the pins and

internally shorted to analog common. The reference

capacitor is charged to the reference voltage. A feed-

back loop is closed around the system to charge the

auto-zero capacitor (CAZ) to compensate for offset volt-

ages in the buffer a mplif ier, integrator, and com pa rator.

Since the comparator is included in the loop, AZ

accuracy is limited only by system noise. The offset

referred to the input is less than 10μV.

3.1.2 SIGNAL INTEGRATE PHASE

The auto-zero loop is opened, the internal short is

removed, and the internal high and low inputs are

connec ted to the external p ins. The con verter then inte-

grates the differential voltages between VIN+ and VIN-

for a fix ed tim e. Thi s dif fere ntial volt age c an be within a

wide Common mode range: 1V of either supply. How-

ever, if the input si gnal has no return wit h respec t to the

converter power supply, VIN- can be tied to analog

common to establish the correct Common mode

voltage. At the end of this phase, the polarity of the

integrated signal is determined.

FIGURE 3-1: Analog Section of TC7116/TC7116A and TC7117/TC7117A

3.1.3 REFERENCE INTEGRATE PHASE

The final phase is reference integrate, or de-integrate.

Input low is internally connected to analog common

and input high is connected across the previously

charged reference capacitor. Circuitry within the chip

ensures that the capacitor will be connected with the

correct polarity to cause the integrator output to return

to zero. The time required for the output to return to

zero is proportional to the input signal. The digital

reading dis pl ay ed is:

EQUATION 3-1:

3.1.4 REFERENCE

The positive reference voltage (VREF+) is referred to

analog common.

TC7116

TC7116A

TC7117

TC7117A

REF

INT

V+

Auto-Zero V

INT

28 35 29 27333634

10μA

INT

AZ & DE (±)

INT 26

Integrator

V+ -3V

Comparator

Digital

Section

DE (+)

(–)

(+)

DE (–)

V+

Analog

Common

BUFF

INT

REF

Low

Temp.

Drift

Zener

REF

V-

–

– +

–

1000 = VIN

VREF

TC7116/A/TC7117/A

3.1.5 DIFFERENTIAL INPUT

This input can accept differential voltages anywhere

within the Common mode range of the input amplifier

or, specifical ly, from 1V below th e positi ve sup ply to 1V

above the negative supply. In this range, the system

has a CMRR of 86d B, typi ca l. How ev er, since the in te-

grator also swings with the Common mode voltage,

care must be exercised to ensure that the integrator

output do es not saturate . A worst-case conditio n would

be a large, pos it ive C om m on mo de v ol tage with a ne ar

full scale negative differential input voltage. The nega-

tive input signal drives the integrator positive, when

most of its swing has been used up by the positive

Common mode voltage. For these critical applications,

the integrator swing can be reduced to less than the

recommended 2V full scale swing with little loss of

accuracy. The integrator output can swing within 0.3V

of either supply without loss of linearity.

3.1.6 ANALOG COMMON

This pin is included primarily to set the Common mode

volt age for b attery operati on (TC 7116/TC7116A), or for

any system where the input signals are floating, with

respect to the power supply. The analog common pin

sets a voltage approximately 2.8V more negative than

the positive supply. This is selected to give a minimum

end of life battery volt age of about 6V. However , an alog

common has some attributes of a reference voltage.

When the tot al s upply volt age is larg e en ough t o caus e

the Zener to regulate (>7V), the analog common volt-

age will have a low voltage coefficient (0.001%), low

output impedance (≅15Ω), and a temperature coeffi-

cient of less than 20ppm/°C, typically , a nd 50 ppm max-

imum. The TC7116/TC7117 temperature coefficients

are typically 80ppm/°C.

An external reference may be used, if necessary, as

shown in Figure 3-2.

FIGURE 3-2: Using an External

Reference

Analog common is also used as VIN- return during

auto-zero and de -integrate. If VIN- is dif ferent from ana-

log common, a Common mode voltage exists in the

system and is taken care of by the excellent CMRR of

the converter. However, in some applications, VIN- will

be set at a fixed, known voltage (power supply common

for instance). In this application, analog common

should be tied to the same point, thus removing the

Common mode voltage from the converter. The same

holds true for the reference voltage; if it can be conve-

niently referenced to analog common, it shou ld be. This

removes the Common mode voltage from the

reference system.

Within the IC, analog common is tied to an N-channel

FET, that can sink 30mA or more of current to hold the

voltage 3V below the positive supply (when a load is

trying to pull the analog common line positive). How-

ever, there is only 10μA of source current, so analog

commo n may easily be ti ed to a more negative vol tage,

thus overriding the internal reference.

3.1.7 TEST

The TEST pin serves two functions. On the TC7117/

TC7117A, it is coupled to the internally generated digi-

ta l supply through a 500Ω resistor . Thus, it can be used

as a negative supply for externally generated segment

drivers, such as decimal points, or any other presenta-

tion the user may want to include on the LCD.

(Figure 3-3 and Figure 3-4 show such an application.)

No more than a 1mA load should be applied.

The second function is a “lamp test.” When TEST is

pulled HIGH (to V+), all segments will be turned ON

and the display should read -1888. The TEST pin will

sink about 10mA under these conditions.

FIGURE 3-3: Simple Inv er ter for Fixe d

Decimal Point

V+

1.2V REF

COMMON

TC7116

TC7116A

TC7117

TC7117A

6.8kΩ

VREF+

20kΩ

TC7116

TC7116A

TEST 37

V+ V+

GND

To LCD

Decimal

Point

To LCD

Backplane

4049

TC7116/A/TC7117/A

FIGURE 3-4: Exclusive “OR” Gate for

Decimal Point Drive

3.2 Di g ital Section

Figure 3-5 and Figure show the digital section for

TC7116/TC 7116A and TC7117/TC7 117A, respecti vely.

For the TC7116/TC7116A (Figure 3-5), an internal dig-

ital ground is generated from a 6V Zener diode and a

large P-channel source follower. This supply is made

stiff to absorb the relative large capacitive currents

when the backplane (BP) voltage is switched. The BP

frequency is the clock frequency 4800. For 3 readings

per second, this is a 60Hz squ are wa ve with a nomina l

amplitude of 5V. The segments are driven at the same

frequency and amplitude, and are in phase with BP

when OFF, but out of phase when ON. In all cases,

negligible DC voltage exists across the segments.

Figur e is the dig ita l se ction of th e TC7117/TC7117A. It

is identical to the TC7116/TC7116A, except that the

regulated supply and BP drive have been eliminated,

and the segment d rive is ty pically 8mA. The 1000’ s out-

put (Pin 1 9) sinks current from two LED seg ment s, and

has a 1 6mA d rive cap abilit y. The TC7117/TC 7117A are

designed to drive common anode LED displays.

In both devic es, the pol arity ind ic ati on is O N for analo g

inputs. If VIN- and VIN+ are reversed, this indication ca n

be reversed also, if desired.

FIGURE 3-5: TC7116/TC7116A Digital Section

TC7116

TC7116A

Decimal

Point

Select

V+

TEST GND

4030

To LCD

Decimal

Point

TC7116

TC7116A

LCD Phase Driver

Thousands Hundreds Tens Units

Backplane

OSC2

Internal Digital Ground

V+

V-

TES

6.2V

500Ω

To Switch Drivers

From Comparator Output

Clock

= 1V

7-Segment

Decode

7-Segment

Decode

7-Segment

Decode 200

40 38

Typical Segment Output

Internal Digital Ground

Segment

Output

V+

0.5mA

2mA Latch

OSC3OSC1

HLDR

~70kΩ

Logic Control

TC7116/A/TC7117/A

3.2.1 SYSTEM TIMING

The clocking method used for the TC7116/TC7116A

and TC7117/TC7117A is shown in Figure . Three

cloc king methods may be used:

1. An external oscillator connected to Pin 40.

2. A crystal between Pins 39 and 40.

3. An RC network using all three pins.

The oscillator frequency is ÷4 before it clocks the

decade counters. It is then further divided to form the

three convert cycle phases: Signal Integrate (1000

counts), Reference De-integrate (0 to 2000 counts),

and Auto-Zero (1000 to 3000 counts). For signals less

than full scale, auto -zero get s the unused po rtion of ref-

erence de-integrate. This makes a complete measure

cycle of 4000 (16,000 clock pulses), independent of

input voltage. For 3 readings per second, an oscillator

frequency of 48kHz would be used.

To achie ve m axi mu m rejec tio n of 60H z pi ck up , the si g-

nal integrate cycle should be a multiple of 60Hz. Oscil-

lator frequencies of 240kHz, 120kHz, 80kHz, 60kHz,

48kHz , 40kHz, e tc. should be selecte d. For 50Hz re jec-

tion, oscillator frequencies of 200kHz, 100kHz,

66-2/3kH z, 50k Hz, 40kHz , etc. wo uld be sui tab le. No te

that 40kHz (2.5 readings per second) will reject both

50Hz and 60Hz.

3.2.2 HOLD READING INPUT

When HLDR is at a logic HIGH, the latch will not be

updated. Analog-to-Digital conversions will continue,

but will not be updated until HLDR is returned to LOW.

To continuously update the display, connect to TEST

(TC7116/TC7116A) or GROUND (TC7117/TC7117A),

or disconnect. This input is CMOS compatible with

70kΩ ty pical resis tanc e to TEST (TC7116/TC 7116A) or

GROUND (TC7117/TC7117A).

FIGURE 3-6: TC7117/TC7117A Digital Section

TC7117

TC7117A

OSC2

V+

Digital

GND

TEST

Clock

40 38

OSC3OSC1

HLDR

Control Logic

Typical Segment Output

Digital Ground

Segment

V+

0.5mA

8mA

500Ω

V+

Latch

~70kΩ

To Switch Drivers

From Comparator Output

Internal Digital Ground

Thousands Hundreds Tens Units

7-Segment

Decode

7-Segment

Decode

7-Segment

Decode

TC7116/A/TC7117/A

4.0 COMPONENT VALUE

SELECTION

4.1 Auto-Zero Capacitor

The size of the auto-zero cap acitor ha s some influ ence

on system noise. For 200mV full scale, where noise is

very important, a 0.47μF capacitor is recommended.

On the 2V scale, a 0.047μF capacitor increases the

speed of recovery from overload and is adequate for

noise on this scale.

4.2 Reference Capacitor

A 0.1μF capacitor is acceptable in most applications.

However, where a large Common mode voltage exists

(i.e., the VIN- pin is not at analog common), and a

200mV scale is used, a larger value is required to pre-

vent rollover error. Generally, 1μF will hold the rollover

error to 0.5 count in this instance.

4.3 Integrating Capacit or

The int egrating capacitor s hould be s elected to give the

maxim um voltage s wing that ensures tolerance bui ldup

will not saturate the integrator swing (approximately

0.3V from either supply). In the TC7116/TC7116A or

the TC7117/TC7117A, when the analog common is

used as a reference, a nominal ± 2V full scale integrator

swing is acceptable. For the TC7117/TC7117A, with

±5V supplies and analog common tied to supply

ground, a ±3.5V to ±4V swing is nominal. For 3 read-

ings pe r second (48kHz clo ck), nom inal val ues for CINT

are 0.22μ1F and 0.10μF, respectively. If different oscil-

lator frequencies are used, these values should be

changed in inverse proportion to maintain the output

swing. The integ ratin g capacitor must have low dielec-

tric abs orption to prevent rollover errors . Polypropylene

capacitors are recommended for this application.

4.4 Integrating Resistor

Both the buf fer amplifier and the integrator have a class

A output stage with 100μA of quiescent current. They

can supply 20μA of drive current with negligible non-

linearity. The integrating resistor should be large

enough to remain in this very linear region over the

input vo ltage ra nge , but small eno ug h tha t und ue leak-

age requirements are not placed on the PC board. For

2V full scale, 470kΩ is near optimum and, similarly,

47kΩ for 200mV full scale.

4.5 Oscillator Components

For all frequency ranges, a 100kΩ resistor is recom-

mended; the capacitor is selected from the equation:

EQUATION 4-1:

For a 48kH z clo ck (3 readi ngs per s econd), C = 100pF.

4.6 Ref erence Voltage

To generate full sc ale outp ut (2 000 counts ), th e an alo g

input requ irement is V IN = 2VREF. Thus, for the 200mV

and 2V scale, VREF should equal 100mV and 1V,

respectively. In many applications, where the ADC is

connected to a transducer, a scale factor exists

between the input voltage and the digital reading. For

instance, in a measuring system, the designer might like

to have a f ull scale readi ng when the voltage f rom th e

transducer is 700mV. Instead of dividing the input down

to 200mV, the designer should use the input voltage

directly and select VREF = 350mV. Suitable values for

integrat ing resist or and ca pacitor w ould b e 1 20kW an d

0.22μF. This makes the system slightly quieter and also

avoids a divider network on the input. The TC7117/

TC7117A, with ±5V supplies, can accept input signals

up to ±4V. Another adva ntage of t his sys tem is when a

digital readin g of zero is desired fo r VIN ≠ 0. Tempera-

ture and weighing systems with a variable tare are

examples. This offset reading can be conveniently gen-

erated by connecting the voltage transducer between

VIN+ and analog common, and the variable (or fixed)

offset voltage between analog common and VIN-.

f0.45

-------=

TC7116/A/TC7117/A

5.0 TC7117/TC7117A POWER

SUPPLIES

The TC7117/TC7117A are designed to operate from

± 5V supplies. However, if a neg ative supply is not avai l-

able, it can be generated with a TC7660 DC-to -DC con-

verter and two capacitors. Figure 5-1 shows this

application.

In selected applications, a negative supply is not

required. The conditions for using a single +5V supply

are:

1. The inpu t sign al can be refe renced to the cen ter

of the Comm on mode range of the converter.

2. The signal is less than ±1.5V.

3. An external reference is used.

FIGURE 5-1: Negati ve Power Suppl y

Generation with TC7660

VREF+

V+

TC7117

TC7117A

10μF

VIN+

VIN-

COM

GND

10μF

VIN

V-

(-5V)5

+5V

TC7660 26

–

LED

Drive

TC7116/A/TC7117/A

6.0 TYPICAL APPLICATIONS

The TC7117/TC7117A sink the LED display current,

causing heat to build up in the IC package. If the inter-

nal voltage reference is used, the changing chip tem-

perature can cause the display to change reading. By

reducin g the LED comm on anode volt age, the TC7117/

TC7117A package power dissipation is reduced.

Figure 6-1 is a curve tracer display showing the rela-

tionship between output current and output voltage for

typical TC7117CPL/TC7117ACPL devices. Since a

typical LED has 1.8V across it at 8mA and i ts common

anode is connected to +5V, the TC7117/TC7117A out-

put is at 3.2V (Point A, Figure 6-1). Maximum power

dissipation is 8.1mA x 3.2V x 24 segments = 622mW.

However, notice that once the TC7117/TC7117A’s out-

put voltage is above 2V, the LED current is essentially

constant as output voltage increases. Reducing the

output voltage by 0.7V (Point B Figure 6-1) results in

7.7mA of L ED cur rent , on ly a 5 % red uct ion. Max imum

power dissipation is now only 7.7mA x 2.5V x 24 =

462mW, a reduction of 26%. An output voltage reduc-

tion of 1V (Point C) reduces LED current by 10%

(7.3 mA), but power dissipati on by 38 % (7.3m A x 2.2V

x 24 = 385mW).

FIGURE 6-1: TC7117/TC7117A Output

vs. Output Voltage

Reduced power dissipation is very easy to obtain.

Figure 6-2 shows two ways: either a 5.1Ω, 1/4W resis-

tor, or a 1A diode placed in series with the display (but

not in series with the TC7117/TC7117A). The resistor

reduces the TC7117/TC7117A’s output voltage (when

all 24 segment s are ON) to Point C o f Figure 6-1. When

segmen ts turn of f, the outpu t volt age w ill increas e. The

diode, however, will result in a relatively steady output

voltage, around Point B.

In addition to limiting maximum power dissipation, the

resistor reduces change in power dissipation as the

display changes. The effect is caused by the fact that,

as fewer segments are ON, each ON output drops

more voltage and current. For the best-case of six

segments (a “111” display) to worst-case (a “1888”

display), the resistor circuit will change about 230mW,

while a circuit without the resistor will change about

470mW. Therefore, the resistor will reduce the effect of

display dissipation on reference voltage drift by about

50%.

The cha nge in LED br ightness ca used by the resistor is

almost unnoticeable as more segments turn off. If

display brightness remaining steady is very important

to the designer, a diode may be used instead of the

resistor.

FIGURE 6-2: Diode or Resistor L im its

Package Power Dissipation

CBA

6.000

7.000

8.000

9.000

10.000

2.00 2.50 3.00 3.50 4.00

Output Vo ltage (V)

Output Current (mA)

TP2

TP5

100

kΩTP1

24kΩ

1kΩ

0.1

μF

TP3

0.01

μF

+In –

0.22

μF

Display

100

+5V

1MΩ

-5V

150kΩ

0.47

μF

TC7117

TC7117A

40 TP

3035 21

20101

kΩ

1N4001

1.5W, 1/4Ω

TC7116/A/TC7117/A

FIGURE 6-3: TC7116/TC7117A Using the Internal Reference (200 mV Full Scale, 3 Readings Per

Second – RPS)

FIGURE 6-4: TC7117/TC7117A Internal Reference (200 mV Full Scale, 3 RPS, VIN- Tied to GND for

Single Ended Inputs

100kΩ

100pF

0.47μF

47kΩ

0.22μF

To Display

To Backplane

0.1pF

1kΩ

22kΩ

Set V

REF

= 100mV

TC7116

TC7116A

0.01μF

1MΩ

–

100kΩ

100pF

0.47μF

47kΩ

0.22μF

To Display

0.1pF

1kΩ

22kΩ

Set V

REF

= 100mV

0.01μF

1MΩ

–

-5V

+5V

TC7117

TC7117A

TC7116/A/TC7117/A

FIGURE 6-5: Circuit for Developing Under Range and Over Range Signals From TC7116/TC7117A

Outputs

FIGURE 6-6: TC7117/TC7117A With A 1.2 External Bandgap Reference (VIN- Tied to Common)

2120

To Logic

GND

V-

To Logic V

V+

CD4077

U/R

O/R

CD4023

or 74C10

TC7116

TC7116A

O/R = Over Range

U/R = Under Range

100pF

0.47μF

47kΩ

To Display

0.1pF 1kΩ

V+

Set V

REF

= 100mV

10kΩ10kΩ

1.2V

0.01μF

–

1MΩ

100kΩ

0.22μF

TC7117

TC7117A

TC7116/A/TC7117/A

FIGURE 6-7: Recommended Component Values for 2V Full Scale (TC7116/TC7116A and TC7117/

TC7117A)

FIGURE 6-8: TC7117/TC7 117A Op erat ed From Single +5V Su pply ( An Ext ernal Refe rence M ust be

Used in This Application)

100kΩ

100pF

0.047μF

470kΩ

0.22μF

To Display

0.1μF25kΩ

24kΩ

V+

Set VREF = 1V

0.01μF

1MΩ

–

V-

TC7116

TC7116A

TC7117

TC7117A

100pF

0.47μF

47kΩ

To Display

0.1pF 1kΩ

V+

Set V

REF

= 100mV

10kΩ10kΩ

1.2V

0.01μF

–

1MΩ

100kΩ

0.22μF

TC7117

TC7117A

TC7116/A/TC7117/A

7.0 PACKAGING INFORMATION

7.1 Package Marking Information

Package marking data not available at this time.

7.2 Taping Form

Pin 1

Component Taping Orientation for 44-Pin PLCC Devices

User Direction of Feed

Standard Reel Component Orientation

for 713 Suffix Device

Note: Drawing does not represent total number of pins.

Package Carrier Width (W) Pitch (P) Part Per Full Reel Reel Size

44-Pin PLCC 32 mm 24 mm 500 13 in

Carrier Tape, Number of Components Per Reel and Reel Size

Component Taping Orientation for 44-Pin PQFP Devices

User Direction of Feed

Pin 1

Standard Reel Component Orientation

for 713 Suffix Device

Package Carrier Width (W) Pitch (P) Part Per Full Reel Reel Size

44-Pin PQFP 24 mm 16 mm 500 13 in

Carrier Tape, Number of Components Per Reel and Reel Size

Note: Drawing does not represent total number of pins.

TC7116/A/TC7117/A

7.3 Package Dimensions

Dimen sio ns: inc h es (mm)

2.065 (52.45)

2.027 (51.49)

.200 (5.08)

.140 (3.56)

.150 (3.81)

.115 (2.92)

.070 (1.78)

.045 (1.14)

.022 (0.56)

.015 (0.38)

.110 (2.79)

.090 (2.29)

.555 (14.10)

.530 (13.46)

.610 (15.49)

.590 (14.99)

.015 (0.38)

.008 (0.20)

.700 (17.78)

.610 (15.50)

.040 (1.02)

.020 (0.51)

40-Pin PDIP (Wide)

Pin 1

3° Min.

Dimensions : inches (mm)

.015 (0.38)

.008 (0.20)

.620 (15.75)

.590 (15.00)

.700 (17.78)

.620 (15.75)

.540 (13.72)

.510 (12.95)

2.070 (52.58)

2.030 (51.56)

.210 (5.33)

.170 (4.32)

.020 (0.51)

.016 (0.41)

.110 (2.79)

.090 (2.29)

.065 (1.65)

.045 (1.14)

.200 (5.08)

.125 (3.18)

.098 (2.49) Max. .030 (0.76) Min.

.060 (1.52)

.020 (0.51)

.150 (3.81)

Min.

40-Pin CERDIP (Wide)

Pin 1

3° Min.

TC7116/A/TC7117/A

7.3 Package Dimensions (Continued)

Dimensions: inches (mm)

Standard Reel Component Orientation

for 713 Suffix Device

Note: Drawing does not represent total number of pins.

Package Carrier Width (W) Pitch (P) Part Per Full Reel Reel Size

44-Pin PLCC 32 mm 24 mm 500 13 in

Carrier Tape, Number of Components Per Reel and Reel Size

Dimensions : inches (mm)

.557 (14.15)

.537 (13.65)

.398 (10.10)

.390 (9.90)

.031 (0.80) Typ.

.018 (0.45)

.012 (0.30) .398 (10.10)

.390 (9.90)

.010 (0.25) Typ.

.096 (2.45) Max.

.557 (14.15)

.537 (13.65)

.083 (2.10)

.075 (1.90)

.041 (1.03)

.026 (0.65)

7° Max.

.009 (0.23)

.005 (0.13)

44-Pin PQFP

Pin 1

TC7116/A/TC7117/A

PRODUCT IDENTIFICATION SYSTEM

To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.

PART CODE TC711X X X XXX

6 = LCD

7 = LED

A or blank*

R (reversed pins) or blank (CPL pkg only)

* "A" parts have an improved reference TC

Package Code (see Device Selection Table)

}

TC7116/A/TC7117/A

NOTES:

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