Datasheet Please read the Important Notice and Warnings at the end of this document V 2.9
www.infineon.com page 1 of 17 2017-09-06
Control Integrated POwer System
(CIPOS™)
IGCM10F60GA
Datasheet
Datasheet 2 of 17 V 2.9
2017-09-06
Control Integrated POwer System (CIPOS™)
IGCM10F60GA
Table of contents
Table of contents ................................................................................................................................................... 2
CIPOS™ Control Integrated POwer System ............................................................................................................ 3
Features .................................................................................................................................................................. 3
Target Applications ...................................................................................................................................................... 3
Description .................................................................................................................................................................. 3
System Configuration .................................................................................................................................................. 3
Pin Configuration ................................................................................................................................................... 4
Internal Electrical Schematic ................................................................................................................................. 4
Pin Assignment ...................................................................................................................................................... 5
Pin Description ...................................................................................................................................................... 5
HIN(U, V, W) and LIN(U, V, W) (Low side and high side control pins, Pin 7 - 12)......................................................... 5
VFO (Fault-output and NTC, Pin 14) ............................................................................................................................ 6
ITRIP (Over current detection function, Pin 15) .......................................................................................................... 6
VDD, VSS (Low side control supply and reference, Pin 13, 16) ................................................................................... 6
VB(U, V, W) and VS(U, V, W) (High side supplies, Pin 1 - 6) .......................................................................................... 6
NW, NV, NU (Low side emitter, Pin 17 - 19) ................................................................................................................. 6
W, V, U (High side emitter and low side collector, Pin 20 - 22) ................................................................................... 6
P (Positive bus input voltage, Pin 23) .......................................................................................................................... 6
Absolute Maximum Ratings ................................................................................................................................... 7
Module Section ............................................................................................................................................................ 7
Inverter Section............................................................................................................................................................ 7
Control Section ............................................................................................................................................................ 7
Recommended Operation Conditions ................................................................................................................... 8
Static Parameters .................................................................................................................................................. 9
Dynamic Parameters ........................................................................................................................................... 10
Bootstrap Parameters ......................................................................................................................................... 10
Thermistor ........................................................................................................................................................... 11
Mechanical Characteristics and Ratings .............................................................................................................. 11
Circuit of a Typical Application ............................................................................................................................ 12
Switching Times Definition .................................................................................................................................. 13
Electrical characteristic ....................................................................................................................................... 14
Package Outline ................................................................................................................................................... 15
Revision history ................................................................................................................................................... 16
Datasheet 3 of 17 V 2.9
2017-09-06
Control Integrated POwer System (CIPOS™)
IGCM10F60GA
CIPOS™
Control Integrated POwer System
Dual In-Line Intelligent Power Module
3Φ -bridge 600V / 10A
Features
Fully isolated Dual In-Line molded module
Reverse conducting IGBTs with monolithic body
diode
Rugged SOI gate driver technology with stability
against transient and negative voltage
Allowable negative VS potential up to -11V for
signal transmission at VBS=15V
Integrated bootstrap functionality
Over current shutdown
Temperature monitor
Under-voltage lockout at all channels
Low side emitter pins accessible for all phase
current monitoring (open emitter)
Cross-conduction prevention
All of 6 switches turn off during protection
Lead-free terminal plating; RoHS compliant
Target Applications
Dish washers
Refrigerators
Washing machines
Air-conditioners
Fans
Low power motor drives
Description
The CIPOS™ module family offers the chance for
integrating various power and control components
to increase reliability, optimize PCB size and system
costs.
It is designed to control three phase AC motors and
permanent magnet motors in variable speed drives
for applications like an air conditioning, a
refrigerator and a washing machine. The package
concept is specially adapted to power applications,
which need good thermal conduction and electrical
isolation, but also EMI-save control and overload
protection.
The reverse conducting IGBTs are combined with an
optimized SOI gate driver for excellent electrical
performance.
System Configuration
3 half bridges with reverse conducting IGBTs
3Φ SOI gate driver
Thermistor
Pin-to-heatsink clearance distance typ. 1.6mm
Datasheet 4 of 17 V 2.9
2017-09-06
Control Integrated POwer System (CIPOS™)
IGCM10F60GA
Pin Configuration
Bottom View
(1) VS(U)
(2) VB(U)
(3) VS(V)
(4) VB(V)
(5) VS(W)
(6) VB(W)
(7) HIN(U)
(8) HIN(V)
(9) HIN(W)
(10) LIN(U)
(11) LIN(V)
(12) LIN(W)
(13) VDD
(14) VFO
(15) ITRIP
(16) VSS
(23) P
(22) U
(21) V
(20) W
(19) NU
(18) NV
(17) NW
(24) NC
Figure 1 Pin configuration
Internal Electrical Schematic
VSS
VDD
LIN3
LIN2
LIN1
VFO
ITRIP LO3
LO2
LO1
HO1
HO2
HO3
VB1
VS1
VB2
VS2
VB3
VS3
HIN3
HIN2
HIN1
NW (17)
NV (18)
W (20)
V (21)
U (22)
P (23)
(2) VB(U)
(15) ITRIP
(14) VFO
(10) LIN(U)
(11) LIN(V)
(12) LIN(W)
(16) VSS
(13) VDD
(4) VB(V)
(6) VB(W)
(7) HIN(U)
(8) HIN(V)
(9) HIN(W)
(1) VS(U)
(3) VS(V)
(5) VS(W)
NU (19)
NC (24)
Thermistor
RBS1
RBS2
RBS3
Figure 2 Internal schematic
Datasheet 5 of 17 V 2.9
2017-09-06
Control Integrated POwer System (CIPOS™)
IGCM10F60GA
Pin Assignment
Pin Number
Pin Name
1
VS(U)
2
VB(U)
3
VS(V)
4
VB(V)
5
VS(W)
6
VB(W)
7
HIN(U)
8
HIN(V)
9
HIN(W)
10
LIN(U)
11
LIN(V)
12
LIN(W)
13
VDD
14
VFO
15
ITRIP
16
VSS
17
NW
18
NV
19
NU
20
W
21
V
22
U
23
P
24
NC
Pin Description
HIN(U, V, W) and LIN(U, V, W) (Low side and high
side control pins, Pin 7 - 12)
These pins are positive logic and they are
responsible for the control of the integrated IGBT.
The Schmitt-trigger input thresholds of them are
such to guarantee LSTTL and CMOS compatibility
down to 3.3V controller outputs. Pull-down resistor
of about 5k is internally provided to pre-bias
inputs during supply start-up and a zener clamp is
provided for pin protection purposes. Input
Schmitt-trigger and noise filter provide beneficial
noise rejection to short input pulses.
The noise filter suppresses control pulses which are
below the filter time tFILIN. The filter acts according
to Figure 4.
CIPOSTM
UZ=10.5V
INPUT NOISE
FILTER
k5
Schmitt-Trigger
SWITCH LEVEL
VIH; VIL
VSS
HINx
LINx
Figure 3 Input pin structure
HIN
LIN
HO
LO
low
high
tFILIN tFILIN
a) b)
HIN
LIN
HO
LO
Figure 4 Input filter timing diagram
Datasheet 6 of 17 V 2.9
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Control Integrated POwer System (CIPOS™)
IGCM10F60GA
It is not recommended for proper work to provide
input pulse-width lower than 1µs.
The integrated gate drive provides additionally a
shoot through prevention capability which avoids
the simultaneous on-state of two gate drivers of the
same leg (i.e. HO1 and LO1, HO2 and LO2, HO3 and
LO3). When two inputs of a same leg are activated,
only former activated one is activated so that the
leg is kept steadily in a safe state.
A minimum deadtime insertion of typically 380ns is
also provided by driver IC, in order to reduce cross-
conduction of the external power switches.
VFO (Fault-output and NTC, Pin 14)
The VFO pin indicates a module failure in case of
under voltage at pin VDD or in case of triggered
over current detection at ITRIP. A pull-up resistor is
externally required.
VFO
VSS
VDD
1
RON,FLT From ITRIP - Latch
From UV detection
CIPOSTM
Thermistor
Figure 5 Internal circuit at pin VFO
The same pin provides direct access to the NTC,
which is referenced to VSS. An external pull-up
resistor connected to +5V ensures that the resulting
voltage can be directly connected to the
microcontroller.
ITRIP (Over current detection function, Pin 15)
CIPOS™ provides an over current detection
function by connecting the ITRIP input with the
IGBT collector current feedback. The ITRIP
comparator threshold (typ. 0.47V) is referenced to
VSS ground. An input noise filter (typ.: tITRIPMIN =
530ns) prevents the driver to detect false over-
current events.
Over current detection generates a shutdown of all
outputs of the gate driver after the shutdown
propagation delay of typically 1000ns.
The fault-clear time is set to minimum 40µs.
VDD, VSS (Low side control supply and reference,
Pin 13, 16)
VDD is the control supply and it provides power
both to input logic and to output power stage.
Input logic is referenced to VSS ground.
The under-voltage circuit enables the device to
operate at power on when a supply voltage of at
least a typical voltage of VDDUV+ = 12.1V is present.
The IC shuts down all the gate drivers power
outputs, when the VDD supply voltage is below
VDDUV- = 10.4V. This prevents the external power
switches from critically low gate voltage levels
during on-state and therefore from excessive power
dissipation.
VB(U, V, W) and VS(U, V, W) (High side supplies, Pin
1 - 6)
VB to VS is the high side supply voltage. The high
side circuit can float with respect to VSS following
the external high side power device emitter voltage.
Due to the low power consumption, the floating
driver stage is supplied by integrated bootstrap
circuit.
The under-voltage detection operates with a rising
supply threshold of typical VBSUV+ = 12.1V and a
falling threshold of VBSUV- = 10.4V.
VS(U, V, W) provide a high robustness against
negative voltage in respect of VSS of -50V
transiently. This ensures very stable designs even
under rough conditions.
NW, NV, NU (Low side emitter, Pin 17 - 19)
The low side emitters are available for current
measurements of each phase leg. It is
recommended to keep the connection to pin VSS as
short as possible in order to avoid unnecessary
inductive voltage drops.
W, V, U (High side emitter and low side collector,
Pin 20 - 22)
These pins are motor U, V, W input pins.
P (Positive bus input voltage, Pin 23)
The high side IGBTs are connected to the bus
voltage. It is noted that the bus voltage does not
exceed 450V.
Datasheet 7 of 17 V 2.9
2017-09-06
Control Integrated POwer System (CIPOS™)
IGCM10F60GA
Absolute Maximum Ratings
(VDD = 15V and TJ = 25°C, if not stated otherwise)
Module Section
Description
Condition
Symbol
Value
Unit
min
max
Storage temperature range
Tstg
-40
125
°C
Isolation test voltage
RMS, f = 60Hz, t = 1min
VISOL
2000
-
V
Operating case temperature range
Refer to Figure 6
TC
-40
125
°C
Inverter Section
Description
Condition
Symbol
Value
Unit
min
max
Max. blocking voltage
IC = 250µA
VCES
600
-
V
DC link supply voltage of P-N
Applied between P-N
VPN
-
450
V
DC link supply voltage (surge) of P-N
Applied between P-N
VPN(surge)
-
500
V
Output current
TC = 25°C , TJ < 150°C
TC = 100°C , TJ < 150°C
IC
-10
-6
10
6
A
Maximum peak output current
less than 1ms
IC(peak)
-20
20
A
Short circuit withstand time1
VDC ≤ 400V, TJ = 150°C
tSC
-
5
µs
Power dissipation per IGBT
Ptot
-
26.1
W
Operating junction temperature range
TJ
-40
150
°C
Single IGBT thermal resistance,
junction-case
RthJC
-
4.79
K/W
Control Section
Description
Condition
Symbol
Value
Unit
min
max
Module supply voltage
VDD
-1
20
V
High side floating supply voltage
(VB vs. VS)
VBS
-1
20
V
Input voltage
LIN, HIN, ITRIP
VIN
VITRIP
-1
-1
10
10
V
Switching frequency
fPWM
-
20
kHz
1
Allowed number of short circuits: <1000; time between short circuits: >1s.
Datasheet 8 of 17 V 2.9
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Control Integrated POwer System (CIPOS™)
IGCM10F60GA
Recommended Operation Conditions
All voltages are absolute voltages referenced to VSS -potential unless otherwise specified.
Description
Symbol
Value
Unit
min
typ
max
DC link supply voltage of P-N
VPN
0
-
400
V
High side floating supply voltage (VB vs. VS)
VBS
13.5
-
18.5
V
Low side supply voltage
VDD
14.0
16
18.5
V
Control supply variation
ΔVBS,
ΔVDD
-1
-1
-
-
1
1
V/µs
Logic input voltages LIN, HIN, ITRIP
VIN
VITRIP
0
0
-
-
5
5
V
Between VSS - N (including surge)
VSS
-5
-
5
V
Figure 6 TC measurement point
1
1
Any measurement except for the specified point in figure 6 is not relevant for the temperature verification and
brings wrong or different information.
Datasheet 9 of 17 V 2.9
2017-09-06
Control Integrated POwer System (CIPOS™)
IGCM10F60GA
Static Parameters
(VDD = 15V and TJ = 25°C, if not stated otherwise)
Description
Condition
Symbol
Value
Unit
min
typ
max
Collector-Emitter saturation voltage
IC = 6A
TJ = 25°C
150°C
VCE(sat)
-
-
1.6
1.8
2.0
-
V
Emitter-Collector forward voltage
IF = 6A
TJ = 25°C
150°C
VF
-
-
1.75
1.8
2.2
-
V
Collector-Emitter leakage current
VCE = 600V
ICES
-
-
1
mA
Logic "1" input voltage (LIN, HIN)
VIH
-
2.1
2.5
V
Logic "0" input voltage (LIN, HIN)
VIL
0.7
0.9
-
V
ITRIP positive going threshold
VIT,TH+
400
470
540
mV
ITRIP input hysteresis
VIT,HYS
40
70
-
mV
VDD and VBS supply under voltage
positive going threshold
VDDUV+
VBSUV+
10.8
12.1
13.0
V
VDD and VBS supply under voltage
negative going threshold
VDDUV-
VBSUV-
9.5
10.4
11.2
V
VDD and VBS supply under voltage
lockout hysteresis
VDDUVH
VBSUVH
1.0
1.7
-
V
Input clamp voltage (HIN, LIN, ITRIP)
Iin=4mA
VINCLAMP
9.0
10.1
12.5
V
Quiescent VBx supply current
(VBx only)
HIN = 0V
IQBS
-
300
500
µA
Quiescent VDD supply current
(VDD only)
LIN = 0V, HINX = 5V
IQDD
-
370
900
µA
Input bias current
VIN = 5V
IIN+
-
1
1.5
mA
Input bias current
VIN = 0V
IIN-
-
2
-
µA
ITRIP input bias current
VITRIP = 5V
IITRIP+
-
65
150
µA
VFO input bias current
VFO = 5V, VITRIP = 0V
IFO
-
60
-
µA
VFO output voltage
IFO = 10mA, VITRIP = 1V
VFO
-
0.5
-
V
Datasheet 10 of 17 V 2.9
2017-09-06
Control Integrated POwer System (CIPOS™)
IGCM10F60GA
Dynamic Parameters
(VDD = 15V and TJ = 25°C, if not stated otherwise)
Description
Condition
Symbol
Value
Unit
min
typ
max
Turn-on propagation delay time
VLIN, HIN = 5V,
IC = 6A,
VDC = 300V
ton
-
670
-
ns
Turn-on rise time
tr
-
20
-
ns
Turn-on switching time
tc(on)
-
80
-
ns
Reverse recovery time
trr
-
110
-
ns
Turn-off propagation delay time
VLIN, HIN = 0V,
IC = 6A,
VDC = 300V
toff
-
820
-
ns
Turn-off fall time
tf
-
170
-
ns
Turn-off switching time
tc(off)
-
180
-
ns
Short circuit propagation delay time
From VIT,TH+ to 10% ISC
tSCP
-
1250
-
ns
Input filter time ITRIP
VITRIP = 1V
tITRIPmin
-
530
-
ns
Input filter time at LIN, HIN for turn
on and off
VLIN, HIN = 0V & 5V
tFILIN
-
290
-
ns
Fault clear time after ITRIP-fault
VITRIP = 1V
tFLTCLR
40
65
200
µs
Deadtime between low side and high
side
DTPWM
1.0
-
-
µs
Deadtime of gate drive circuit
DTIC
-
380
-
ns
IGBT turn-on energy (includes reverse
recovery of diode)
VDC = 300V, IC = 6A
TJ = 25°C
150°C
Eon
-
-
110
155
-
-
µJ
IGBT turn-off energy
VDC = 300V, IC = 6A
TJ = 25°C
150°C
Eoff
-
-
155
220
-
-
µJ
Diode recovery energy
VDC = 300V, IC = 6A
TJ = 25°C
150°C
Erec
-
-
45
75
-
-
µJ
Bootstrap Parameters
(TJ = 25°C, if not stated otherwise)
Description
Condition
Symbol
Value
Unit
min
typ
max
Repetitive peak reverse voltage
VRRM
600
-
-
V
Bootstrap diode resistance of
U-phase1
VS2 or VS3 = 300V, TJ = 25°C
VS2 and VS3 = 0V, TJ = 25°C
VS2 or VS3 = 300V, TJ = 125°C
VS2 and VS3 = 0V, TJ = 125°C
RBS1
-
35
40
50
65
-
Ω
Reverse recovery time
IF = 0.6A, di/dt = 80A/µs
trr_BS
-
50
-
ns
Forward voltage drop
IF = 20mA, VS2 and VS3 = 0V
VF_BS
-
2.6
-
V
1
RBS2 and RBS3 have same values to RBS1.
Datasheet 11 of 17 V 2.9
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Control Integrated POwer System (CIPOS™)
IGCM10F60GA
Thermistor
Description
Condition
Symbol
Value
Unit
min
typ
max
Resistor
TNTC = 25°C
RNTC
-
85
-
k
B-constant of NTC
(Negative Temperature Coefficient)
B(25/100)
-
4092
-
K
-40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 110 120 130
0
500
1000
1500
2000
2500
3000
3500
Thermistor temperature [℃]
Thermistor resistance [kΩ]
Figure 7 Thermistor resistance – temperature curve and table
(For more information, please refer to the application note ‘AN2016-10 CIPOS Mini Technical description’)
Mechanical Characteristics and Ratings
Description
Condition
Value
Unit
min
typ
max
Mounting torque
M3 screw and washer
0.59
0.69
0.78
Nm
Flatness
Refer to Figure 8
-50
-
100
µm
Weight
-
6.15
-
g
+
+
-
-
Figure 8 Flatness measurement position
50 55 60 65 70 75 80 85 90 95 100 105 110 115 120 125 130
0
5
10
15
20
25
30
35
Thermistor temperature [℃]
Thermistor resistance [kΩ]
Min.
Typ.
Max.
Datasheet 12 of 17 V 2.9
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Control Integrated POwer System (CIPOS™)
IGCM10F60GA
Circuit of a Typical Application
VDD line
5 or 3.3V line
U-phase current sensing
NW (17)
NV (18)
W (20)
V (21)
U (22)
P (23)
(2) VB(U)
(15) ITRIP
(14) VFO
(10) LIN(U)
(11) LIN(V)
(12) LIN(W)
(16) VSS
(13) VDD
(4) VB(V)
(6) VB(W)
(7) HIN(U)
(8) HIN(V)
(9) HIN(W)
(1) VS(U)
(3) VS(V)
(5) VS(W)
NU (19)
NC (24)
Thermistor
VSS
VDD
LIN3
LIN2
LIN1
VFO
ITRIP LO3
LO2
LO1
HO1
HO2
HO3
VB1
VS1
VB2
VS2
VB3
VS3
HIN3
HIN2
HIN1
RBS1
RBS2
RBS3
<Signal for protection>
Temperature monitor
Micro
Controller
#1
#2
#3
#4
#5
#6 #7
3-ph AC
Motor
V-phase current sensing
W-phase current sensing
<Signal for protection>
Power
GND line
Control
GND line
Figure 9 Typical application circuit
1. Input circuit
- To reduce input signal noise by high speed switching, the RIN and CIN filter circuit should be mounted. (100Ω, 1nF)
- CIN should be placed as close to VSS pin as possible.
2. Itrip circuit
- To prevent protection function errors, CITRIP should be placed as close to Itrip and VSS pins as possible.
3. VFO circuit
- VFO output is an open drain output. This signal line should be pulled up to the positive side of the 5V/3.3V logic
power supply with a proper resistor RPU.
- It is recommended that RC filter be placed as close to the controller as possible.
4. VB-VS circuit
- Capacitor for high side floating supply voltage should be placed as close to VB and VS pins as possible.
5. Snubber capacitor
- The wiring between CIPOS™ Mini and snubber capacitor including shunt resistor should be as short as possible.
6. Shunt resistor
- The shunt resistor of SMD type should be used for reducing its stray inductance.
7. Ground pattern
- Ground pattern should be separated at only one point of shunt resistor as short as possible.
Datasheet 13 of 17 V 2.9
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Control Integrated POwer System (CIPOS™)
IGCM10F60GA
Switching Times Definition
HINx
LINx
iCx
vCEx
0.9V
2.1V
90%
10%
10% 10%
90%
toff
tf
ton
tr
tc(off) tc(on)
10%
trr
10%
Figure 10 Switching times definition
Datasheet 14 of 17 V 2.9
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Control Integrated POwer System (CIPOS™)
IGCM10F60GA
Electrical characteristic
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0
0
2
4
6
8
10
12
14
16
18
20 TJ=25℃
VDD=13V
VDD=15V
VDD=20V
Ic, Collector - Emitter current [A]
VCE(sat), Collector - Emitter voltage [V]
Typ. Collector – Emitter saturation voltage
0 2 4 6 8 10 12 14 16 18 20
0.0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8 VDC=300V
VDD=15V
High side @TJ=25℃
High side @TJ=150℃
Low side @TJ=25℃
Low side @TJ=150℃
Eon, Turn on switching energy loss [mJ]
Ic, Collector current [A]
Typ. Turn on switching energy loss
0 2 4 6 8 10 12 14 16 18 20
500
600
700
800
900
1000 VDC=300V
VDD=15V
High side @TJ=25℃
High side @TJ=150℃
Low side @TJ=25℃
Low side @TJ=150℃
ton, Turn on propagation delay time [ns]
Ic, Collector current [A]
Typ. Turn on propagation delay time
0 2 4 6 8 10 12 14 16 18 20
0
100
200
300
400
500
600
700
High side @TJ=25℃
High side @TJ=150℃
Low side @TJ=25℃
Low side @TJ=150℃
VDC=300V
VDD=15V
tc(off), Turn off switching time [ns]
Ic, Collector current [A]
Typ. Turn off switching time
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5
0
2
4
6
8
10
12
14
16
18
20 VDD=15V
TJ=25℃
TJ=150℃
Ic, Collector - Emitter current [A]
VCE(sat), Collector - Emitter voltage [V]
Typ. Collector – Emitter saturation voltage
0 2 4 6 8 10 12 14 16 18 20
0.0
0.1
0.2
0.3
0.4
0.5
0.6
High side @TJ=25℃
High side @TJ=150℃
Low side @TJ=25℃
Low side @TJ=150℃
VDC=300V
VDD=15V
Eoff, Turn off switching energy loss [mJ]
Ic, Collector current [A]
Typ. Turn off switching energy loss
0 2 4 6 8 10 12 14 16 18 20
0
50
100
150
200
250
300
350
400 VDC=300V
VDD=15V
High side @TJ=25℃
High side @TJ=150℃
Low side @TJ=25℃
Low side @TJ=150℃
tc(on), Turn on switching time [ns]
Ic, Collector current [A]
Typ. Turn on switching time
0 2 4 6 8 10 12 14 16 18 20
0
50
100
150
200
250
300
350
400
High side @TJ=25℃
High side @TJ=150℃
Low side @TJ=25℃
Low side @TJ=150℃
VDC=300V
VDD=15V
trr, Reverse recovery time [ns]
Ic, Collector current [A]
Typ. Reverse recovery time
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5
0
2
4
6
8
10
12
14
16
18
20
TJ=25℃
TJ=150℃
IF, Emitter - Collector current [A]
VF, Emitter - Collector voltage [V]
Typ. Emitter – Collector forward voltage
0 2 4 6 8 10 12 14 16 18 20
0
30
60
90
120
150
180
210
240
270
300 VDC=300V
VDD=15V
High side @TJ=25℃
High side @TJ=150℃
Low side @TJ=25℃
Low side @TJ=150℃
Erec, Reverse recovery energy loss [uJ]
Ic, Collector current [A]
Typ. Reverse recovery energy loss
0 2 4 6 8 10 12 14 16 18 20
700
800
900
1000
1100
1200
1300
1400
1500
1600
1700 VDC=300V
VDD=15V
High side @TJ=25℃
High side @TJ=150℃
Low side @TJ=25℃
Low side @TJ=150℃
toff, Turn off propagation delay time [ns]
Ic, Collector current [A]
Typ. Turn off propagation delay time
1E-7 1E-6 1E-5 1E-4 1E-3 0.01 0.1 1 10 100
1E-4
1E-3
0.01
0.1
1
10
D : duty ratio
D=50%
D=20%
D=10%
D=5%
D=2%
Single pulse
ZthJC, RC-IGBT transient thermal resistance [K/W]
tP, Pulse width [sec.]
IGBT transient thermal resistance at all six
IGBTs operation
Datasheet 15 of 17 V 2.9
2017-09-06
Control Integrated POwer System (CIPOS™)
IGCM10F60GA
Package Outline
Datasheet 16 of 17 V 2.9
2017-09-06
Control Integrated POwer System (CIPOS™)
IGCM10F60GA
Revision history
Document
version
Date of release
Description of changes
V 2.9
Sep. 2017
Maximum operating case temperature, Tc= 125°C
Package outline update
Published by
Infineon Technologies AG
81726 München, Germany
© 2017 Infineon Technologies AG.
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Edition 2017-09-06
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