20 MHz to 1.0 GHz IF Gain Block
ADL5535
Rev. 0
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FEATURES
Fixed gain of 16 dB
Operation from 20 MHz to 1.0 GHz
Input and output internally matched to 50 Ω
Integrated bias control circuit
OIP3
45.5 dBm at 190 MHz
45.5 dBm at 380 MHz
Noise figure
3.2 dB at 190 MHz
3.3 dB at 380 MHz
P1dB of 18.9 dBm at 190 MHz
Single 5 V power supply
Low quiescent current of 97 mA
MSL-1 rated SOT-89 package
ESD rating of ±2 kV (Class 2)
Pin-compatible with the 20 dB gain ADL5536
FUNCTIONAL BLOCK DIAGRAM
RFIN GND RFOUT
1 2
BIAS
3
GND
ADL5535
(2)
08674-001
Figure 1.
GENERAL DESCRIPTION
The ADL5535 is a 16 dB linear amplifier that operates at
frequencies up to 1 GHz. The device can be used in a wide
variety of cellular, CATV, military, and instrumentation
equipment.
The ADL5535 provides the highest dynamic range available
from an internally matched IF gain block. This is accomplished
by providing extremely low noise figures and very high OIP3
specifications simultaneously across the entire 1 GHz frequency
range. The ADL5535 also provides extremely flat gain and P1dB
over frequency, which are stable over temperature, power supply,
and from device to device.
The device is internally matched to 50 at the input and output,
making the ADL5535 very easy to implement in a wide variety
of applications. Only input/output ac coupling capacitors, power
supply decoupling capacitors, and an external inductor are
required for operation.
The ADL5535 is fabricated on a GaAs HBT process and has an
ESD rating of ±2 kV (Class 2). The device is assembled in an
MSL-1 rated SOT-89 package that uses an exposed paddle for
excellent thermal impedance.
The ADL5535 consumes only 97 mA on a single 5 V supply and
is fully specified for operation from −40°C to +85°C.
The ADL5535 is also pin-compatible with the 20 dB gain
ADL5536. Fully populated evaluation boards are available
for each amplifier.
ADL5535
Rev. 0 | Page 2 of 16
TABLE OF CONTENTS
Features .............................................................................................. 1
Functional Block Diagram .............................................................. 1
General Description ......................................................................... 1
Revision History ............................................................................... 2
Specifications ..................................................................................... 3
Typical Scattering Parameters (S-Parameters) ......................... 5
Absolute Maximum Ratings ............................................................ 6
ESD Caution .................................................................................. 6
Pin Configuration and Function Descriptions ............................. 7
Typical Performance Characteristics ............................................. 8
Basic Connections .......................................................................... 10
Soldering Information and Recommended PCB
Land Pattern ................................................................................ 10
ACPR Performance ........................................................................ 11
Error Vector Magnitude (EVM) Performance ........................... 11
ADC Driving Application ............................................................. 12
Evaluation Board ............................................................................ 13
Outline Dimensions ....................................................................... 14
Ordering Guide .......................................................................... 14
REVISION HISTORY
4/10—Revision 0: Initial Version
ADL5535
Rev. 0 | Page 3 of 16
SPECIFICATIONS
VCC = 5 V and TA = 25°C, unless otherwise noted.
Table 1.
Parameter Test Conditions/Comments Min Typ Max Unit
OVERALL FUNCTION
Frequency Range 20 1000 MHz
FREQUENCY = 20 MHz
Gain 16.7 dB
Output 1 dB Compression Point (P1dB) 17.7 dBm
Output Third-Order Intercept (OIP3) ∆f = 1 MHz, output power (POUT) = 3 dBm per tone 41.5 dBm
Second Harmonic POUT = 0 dBm −59.5 dBc
Third Harmonic POUT = 0 dBm −93 dBc
Noise Figure 3.0 dB
FREQUENCY = 70 MHz
Gain 16.5 dB
vs. Frequency ±50 MHz ±0.33 dB
vs. Temperature −40°C ≤ TA ≤ +85°C ±0.16 dB
vs. Supply Voltage 4.75 V to 5.25 V ±0.04 dB
Output 1 dB Compression Point (P1dB) 18.9 dBm
Output Third-Order Intercept (OIP3) ∆f = 1 MHz, output power (POUT) = 3 dBm per tone 43.5 dBm
Second Harmonic POUT = 0 dBm −64 dBc
Third Harmonic POUT = 0 dBm −93 dBc
Noise Figure 3.0 dB
FREQUENCY = 190 MHz
Gain 15.2 16.1 17.0 dB
vs. Frequency ±50 MHz ±0.06 dB
vs. Temperature −40°C ≤ TA ≤ +85°C ±0.17 dB
vs. Supply Voltage 4.75 V to 5.25 V ±0.04 dB
Output 1 dB Compression Point (P1dB) 17.8 18.9 dBm
Output Third-Order Intercept (OIP3) ∆f = 1 MHz, output power (POUT) = 3 dBm per tone 45.5 dBm
Second Harmonic POUT = 0 dBm −60.2 dBc
Third Harmonic POUT = 0 dBm −84.3 dBc
Noise Figure 3.2 dB
FREQUENCY = 380 MHz
Gain 15.0 15.8 16.5 dB
vs. Frequency ±50 MHz ±0.08 dB
vs. Temperature −40°C ≤ TA ≤ +85°C ±0.17 dB
vs. Supply Voltage 4.75 V to 5.25 V ±0.05 dB
Output 1 dB Compression Point (P1dB) 17.8 18.9 dBm
Output Third-Order Intercept (OIP3) ∆f = 1 MHz, output power (POUT) = 3 dBm per tone 45.5 dBm
Second Harmonic POUT = 0 dBm −61.9 dBc
Third Harmonic POUT = 0 dBm −75 dBc
Noise Figure 3.3 dB
FREQUENCY = 748 MHz
Gain 15.2 dB
vs. Frequency ±50 MHz ±0.10 dB
vs. Temperature −40°C ≤ TA ≤ +85°C ±0.20 dB
vs. Supply Voltage 4.75 V to 5.25 V ±0.06 dB
Output 1 dB Compression Point (P1dB) 18.9 dBm
Output Third-Order Intercept (OIP3) ∆f = 1 MHz, output power (POUT) = 3 dBm per tone 42.0 dBm
Second Harmonic POUT = 0 dBm −52.6 dBc
Third Harmonic POUT = 0 dBm −68 dBc
Noise Figure 3.2 dB
ADL5535
Rev. 0 | Page 4 of 16
Parameter Test Conditions/Comments Min Typ Max Unit
FREQUENCY = 900 MHz
Gain 15.1 dB
vs. Frequency ±50 MHz ±0.11 dB
vs. Temperature −40°C ≤ TA ≤ +85°C ±0.20 dB
vs. Supply Voltage 4.75 V to 5.25 V ±0.06 dB
Output 1 dB Compression Point (P1dB) 19.0 dBm
Output Third-Order Intercept (OIP3) ∆f = 1 MHz, output power (POUT) = 3 dBm per tone 40.0 dBm
Second Harmonic POUT = 0 dBm −59.3 dBc
Third Harmonic POUT = 0 dBm −64.6 dBc
Noise Figure 3.2 dB
FREQUENCY = 1000 MHz
Gain 14.9 dB
vs. Frequency ±50 MHz ±0.11 dB
vs. Temperature −40°C ≤ TA ≤ +85°C ±0.21 dB
vs. Supply Voltage 4.75 V to 5.25 V ±0.07 dB
Output 1 dB Compression Point (P1dB) 18.9 dBm
Output Third-Order Intercept (OIP3) ∆f = 1 MHz, output power (POUT) = 3 dBm per tone 39.5 dBm
Second Harmonic POUT = 0 dBm −51.4 dBc
Third Harmonic POUT = 0 dBm −63.1 dBc
Noise Figure 3.3 dB
POWER INTERFACE
Supply Voltage (VCC) 4.5 5.0 5.5 V
Supply Current 97 115 mA
vs. Temperature −40°C ≤ TA ≤ +85°C ±2.0 mA
Power Dissipation VCC = 5 V 0.5 W
ADL5535
Rev. 0 | Page 5 of 16
TYPICAL SCATTERING PARAMETERS (S-PARAMETERS)
VCC = 5 V, TA = 25°C, and the effects of the test fixture have been de-embedded up to the pins of the device.
Table 2.
Frequency
(MHz)
S11 S21 S12 S22
Magnitude (dB) Angle (°) Magnitude (dB) Angle (°) Magnitude (dB) Angle (°) Magnitude (dB) Angle (°)
20 −13.03 −112.72 17.11 167.18 −19.70 +10.45 −14.78 −125.49
70 −18.32 −152.93 16.33 171.17 −19.67 +0.77 −15.85 −161.12
120 −19.04 −161.05 16.22 169.68 −19.66 −1.99 −15.99 −166.87
190 −19.31 −163.81 16.16 166.09 −19.65 −4.89 −15.97 −168.23
240 −19.35 −163.54 16.10 163.36 −19.65 −6.74 −15.91 −167.75
290 −19.26 −162.62 16.08 160.44 −19.65 −8.54 −15.81 −166.89
340 −19.24 −161.59 16.01 157.37 −19.66 −10.20 −15.70 −166.07
390 −19.12 −158.71 15.94 154.60 −19.65 −11.99 −15.53 −164.46
440 −18.88 −157.70 15.91 151.65 −19.65 −13.65 −15.28 −163.07
490 −18.58 −157.00 15.84 148.72 −19.69 −15.34 −15.02 −162.82
540 −18.35 −156.08 15.80 145.67 −19.71 −16.97 −14.80 −162.40
590 −18.12 −154.28 15.71 142.80 −19.70 −18.60 −14.58 −161.54
640 −17.82 −153.50 15.67 139.94 −19.71 −20.26 −14.31 −161.17
690 −17.57 −152.78 15.59 136.89 −19.73 −21.87 −14.07 −160.95
740 −17.30 −151.90 15.51 134.11 −19.74 −23.49 −13.82 −160.76
790 −17.04 −151.31 15.44 131.17 −19.75 −25.11 −13.58 −160.71
840 −16.76 −150.77 15.35 128.31 −19.77 −26.74 −13.34 −160.76
900 −16.41 −150.20 15.26 125.01 −19.79 −28.65 −13.05 −160.99
950 −16.15 −149.94 15.17 122.08 −19.80 −30.29 −12.82 −161.31
1000 −15.87 −149.69 15.08 119.42 −19.82 −31.88 −12.59 −161.67
1050 −15.60 −149.72 15.00 116.58 −19.84 −33.51 −12.38 −162.13
1100 −15.35 −149.61 14.89 113.89 −19.86 −35.10 −12.17 −162.71
1150 −15.08 −149.74 14.81 111.22 −19.88 −36.69 −11.97 −163.25
1200 −14.86 −149.84 14.70 108.43 −19.90 −38.29 −11.79 −163.86
1250 −14.58 −149.97 14.61 105.97 −19.92 −39.90 −11.59 −164.52
1300 −14.35 −150.33 14.52 103.20 −19.94 −41.52 −11.41 −165.22
1350 −14.11 −150.67 14.41 100.66 −19.96 −43.13 −11.25 −166.05
1400 −13.90 −151.10 14.32 98.10 −19.99 −44.68 −11.08 −166.79
1450 −13.69 −151.43 14.21 95.51 −20.02 −46.23 −10.93 −167.47
1500 −13.46 −151.86 14.11 93.03 −20.04 −47.82 −10.78 −168.33
1550 −13.26 −152.41 14.02 90.50 −20.06 −49.37 −10.63 −169.12
ADL5535
Rev. 0 | Page 6 of 16
ABSOLUTE MAXIMUM RATINGS
Table 3.
Parameter Rating
Supply Voltage, VCC 6.5 V
Input Power (Referred to 50 Ω) 20 dBm
Internal Power Dissipation (Paddle Soldered) 650 mW
θJA (Junction to Air) 30.7°C/W
θJC (Junction to Paddle) 5.0°C/W
Maximum Junction Temperature 150°C
Lead Temperature (Soldering, 60 sec) 240°C
Operating Temperature Range −40°C to +85°C
Storage Temperature Range −65°C to +150°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
ESD CAUTION
ADL5535
Rev. 0 | Page 7 of 16
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
RFIN
GND
RFOUT
1
2
3
GND
ADL5535
TOP VIEW
(No t t o S cale)
(2)
NOTES
1. THE EX P OSE D PADDLE IS
INTERNALLY CONNECTE D TO GND
AND MUST BE SOLDERED TO A LOW
IM P EDANCE GROUND PLANE.
08674-002
Figure 2. Pin Configuration
Table 4. Pin Function Descriptions
Pin No. Mnemonic Description
1 RFIN RF Input. This pin requires a dc blocking capacitor.
2 GND Ground. Connect this pin to a low impedance ground plane.
3 RFOUT RF Output and Supply Voltage. A dc bias is provided to this pin through an inductor that is connected to the
external power supply. The RF path requires a dc blocking capacitor.
(2) Exposed Paddle
Exposed Paddle. The exposed paddle is internally connected to GND and must be soldered to a low impedance
ground plane.
ADL5535
Rev. 0 | Page 8 of 16
TYPICAL PERFORMANCE CHARACTERISTICS
0
5
10
15
20
25
30
35
40
45
50
0 100 200 300 400 500 600 700 800 900 1000
NF, GAIN, P1dB, OIP3 (dB, dBm)
FREQ UE NC Y (MHz )
P1dB
GAIN
OIP3
NF
0
8674-003
Figure 3. Noise Figure, Gain, P1dB, and OIP3 vs. Frequency
0 100 200 300 400 500 600 700 800 900 1000
GAIN (dB)
FRE QUENC Y ( MHz)
+25°C
–40°C
+85°C
08674-004
14.0
14.5
15.0
15.5
16.0
16.5
17.0
Figure 4. Gain vs. Frequency and Temperature
–24
–22
–20
–18
–16
–14
–12
–10
–8
–6
–
4
0 100 200 300 400 500 600 700 800 900 1000
S-PARAMETERS ( d B)
FREQUENC Y ( M Hz )
S11
S22
S12
08674-005
Figure 5. Input Return Loss (S11), Output Return Loss (S22), and
Reverse Isolation (S12) vs. Frequency
32
34
36
38
40
42
44
46
48
50
52
54
17.0
17.2
17.4
17.6
17.8
18.0
18.2
18.4
18.6
18.8
19.0
19.2
0 100 200 300 400 500 600 700 800 900 1000
OIP3 (dBm)
P1dB (dBm)
FREQUENC Y (MHz)
+25°C
+25°C
–40°C
–40°C
+85°C
+85°C
0
8674-006
Figure 6. P1dB and OIP3 vs. Frequency and Temperature
28
30
32
34
36
38
40
42
44
46
48
–8 –6 –4 –2 0 2 4 6 8 10 12 14
OIP3 (dBm)
P
OUT
PER TONE ( dBm)
20MHz
70MHz
190MHz
380MHz
748MHz
900MHz
1000MHz
08674-007
Figure 7. OIP3 vs. Output Power (POUT) and Frequency
2.0
2.2
2.4
2.6
2.8
3.0
3.2
3.4
3.6
3.8
4.0
4.2
4.4
4.6
4.8
0 100 200 300 400 500 600 700 800 900 1000
NOI SE FIGURE ( dB)
FREQUENC Y ( M Hz )
08674-023
+25°C
+85°C
–40°C
Figure 8. Noise Figure vs. Frequency and Temperature
ADL5535
Rev. 0 | Page 9 of 16
–100
–90
–80
–70
–60
–50
–40
–
30
0 100 200 300 400 500 600 700 800 900 1000
SECO ND AND T HIRD HARMO NICS (dBc)
FREQ UE NCY (M Hz)
THI RD HARM O NIC
SECOND HARMONI C
0
8674-009
Figure 9. Single-Tone Harmonics vs. Frequency, POUT = 0 dBm
0
10
20
30
40
50
60
70
80
90
100
15.5 15.7 15.9 16.1 16.3 16.5 16.7
PERCENTAGE (%)
GAIN (dB)
08674-010
Figure 10. Gain Distribution at 190 MHz
0
5
10
15
20
25
30
18.3 18.5 18.7 18.9 19.1 19.3 19.5
PERCENTAGE (%)
P1dB (dBm)
0
8674-011
Figure 11. P1dB Distribution at 190 MHz
0
5
10
15
20
25
30
35
40
40 41 42 43 44 45 46 47 48 49 50 51 52
PERCENTAGE (%)
OIP3 (dBm)
08674-012
Figure 12. OIP3 Distribution at 190 MHz, POUT = 3 dBm
0
10
20
30
40
50
60
70
2.5 2.7 2.9 3.1 3.3 3.5 3.7 3.9
PERCENTAGE (%)
NOI SE FIGURE ( dB)
08674-013
Figure 13. Noise Figure Distribution at 190 MHz
70
75
80
85
90
95
100
105
110
115
–40 –30 –20 –10 0 10 20 30 40 50 60 70 80 90
SUPP LY CURRENT (mA)
TEMPERATURE (°C)
5.25V
4.75V
5.00V
08674-014
Figure 14. Supply Current vs. Temperature
ADL5535
Rev. 0 | Page 10 of 16
BASIC CONNECTIONS
The basic connections for operating the ADL5535 are shown in
Figure 15. Recommended components are listed in Table 5. The
input and output should be ac-coupled with appropriately sized
capacitors (device characterization was performed with 0.1 F
capacitors). A 5 V dc bias is supplied to the amplifier through
the bias inductor connected to RFOUT (Pin 3). The bias voltage
should be decoupled using a 1 µF capacitor, a 1.2 nF capacitor,
and a 68 pF capacitor.
RFIN
GND
GND
RFOUT
123
C6
1µF
L1
470nH
GND
RFOUT
C5
C4
C2C1
V
C
C
RFIN
ADL5535
(2)
0.1µF
1.2nF
68pF
0.1µF
08674-015
Figure 15. Basic Connections
SOLDERING INFORMATION AND RECOMMENDED
PCB LAND PATTERN
Figure 16 shows the recommended land pattern for the ADL5535.
To minimize thermal impedance, the exposed paddle on the
package underside, along with Pin 2, should be soldered to a
ground plane. If multiple ground layers exist, they should be
stitched together using vias. For more information about land
pattern design and layout, refer to the AN-772 Application
Note, A Design and Manufacturing Guide for the Lead Frame
Chip Scale Package (LFCSP).
1.80mm
3.48mm
5.56mm 0.20mm
0.62mm
0.86mm
3.00mm
1.50mm
1.27mm
08674-016
Figure 16. Recommended Land Pattern
Table 5. Recommended Components for Basic Connections
Frequency C1 C2 L1 C4 C5 C6
20 MHz to 1000 MHz 0.1 µF 0.1 µF 470 nH (Coilcraft 0603LS-NX or equivalent) 68 pF 1.2 nF 1 µF
ADL5535
Rev. 0 | Page 11 of 16
ACPR PERFORMANCE
Figure 17 shows a plot of the adjacent channel power ratio
(ACPR) vs. POUT for the ADL5535. The signal type used is a
single wideband code division multiple access (W-CDMA)
carrier (Test Model 1-64). This signal is generated by a very
low ACPR source. ACPR is measured at the output by a high
dynamic range spectrum analyzer that incorporates an instru-
ment noise-correction function. At an output power level of
+8 dBm, ACPR is still very low at −65 dBc, making the device
suitable for use in driver applications.
08674-024
–85
–80
–75
–70
–65
–60
–55
–50
–45
–40
–
35
–5–3–1135791113
ACPR (d Bc)
P
OUT
(dBm)
380MHz
190MHz
190MHz SOURCE POWER
OUTPUT REFERRED
380MHz SO URCE P O W E R OUT P UT REF E RRED
Figure 17. ACPR vs. POUT, Single W-CDMA Carrier (Test Model 1-64)
at 190 MHz and 380 MHz
ERROR VECTOR MAGNITUDE (EVM) PERFORMANCE
Error vector magnitude (EVM) is a measure used to quantify the
performance of a digital radio transmitter or receiver. A signal
received by a receiver has all constellation points at their ideal
locations; however, various imperfections in the implementation
(such as magnitude imbalance, noise floor, and phase imbalance)
cause the actual constellation points to deviate from their ideal
locations. The ADL5535 shows excellent performance when used
with higher-order modulation schemes, such as a 16 QAM.
Figure 18 illustrates the EVM performance of the ADL5535 when
driven with a 16 QAM 10 Msym/s signal. Degradation of the EVM
performance starts to occur at an output power of +12 dBm.
08674-025
–45
–40
–35
–30
–25
–
20
4 6 8 10 12 14 16 18
EVM (dB)
P
OUT
(dBm)
380MHz SO URCE P O W E R OUT P UT REF E RRED
380MHz
190MHz
190MHz S OURCE POW E R
OUT PUT REF E RRED
Figure 18. EVM Performance vs. POUT with a 16 QAM, 10 Msym/s Signal
ADL5535
Rev. 0 | Page 12 of 16
ADC DRIVING APPLICATION
The ADL5535 is a high linearity, fixed gain IF amplifier suitable
for use as an ADC driver. Figure 22 shows the schematic of the
ADL5535 driving the AD9268 16-bit analog-to-digital converter
(ADC). The ADL5535 has a single-ended input and output imped-
ance of 50 Ω. A 1:1 impedance transformer, along with termination
resistors and series ferrite beads, are used to present a 50 Ω load
for the antialiasing filter interface. The filter interface between the
ADL5535 and the AD9268 is a sixth-order Butterworth low-pass
filter. The interface provides a 50 MHz, 1 dB bandwidth centered
around 175 MHz. Following the sixth-order filter, a shunt LC tank
circuit was inserted to further reduce the low frequency response
of the filter, giving more of a band-pass response to the filter.
The normalized wideband response is shown in Figure 19.
08674-021
–45
–40
–35
–30
–25
–20
–15
–10
–5
0
5
050 100 150 200 250 300 350 400
NORMALIZED RES PONSE ( d BFS)
FREQ UE NC Y (MHz )
Figure 19. Normalized Response of the ADC Interface Shown
in Figure 22
08674-019
AMPL ITUDE ( dBFS )
FREQUENCY (MHz )
60544842363024181206
0
–15
–30
–45
–75
–90
–60
–105
–120
–135
SAMPLE FREQUENCY = 122.88M Hz
SNRFS = 75.877dB
INPUT FREQUENCY = 1 70 M Hz
FUNDAMENTAL POWER = –1.044dBFS
SECO ND HARMO NIC POW ER = –75.499dBc
THIRD HARMONIC POWER = –80.003dBc
NOISE FLOOR = –153. 762dBFS/√Hz
5
32
64
+
Figure 20. Measured Single-Tone Performance of the Circuit Shown
in Figure 22
08674-020
AMPL ITUDE ( dBF S)
FREQUENC Y (M Hz )
60544842363024181206
0
–15
–30
–45
–75
–90
–60
–105
–120
–135
FUNDAMENTAL1 = –7.161dBFS
FUNDAMENTAL2 = –7.116dBFS
IMD (2f 1 – f 2) = –66.07dBc
IMD (2f 2 – f 1) = –67.588dBc
NOISE FLOOR = –150. 84dBFS/√Hz
f2 – f1
f1 + f2
2f1 – f 2 2f2 – f1
Figure 21. Measured Two-Tone Performance of the Circuit Shown
in Figure 22
1
33Ω
33Ω
66Ω
66Ω
22pF
22nH 56nH
8pF
27pF
100pF
470nH
5
V
50Ω
VCM
VCM
ADL5535
68nH
8.2pF
72nH
MABA-007159-000000 FERRI TE BEAD
10Ω AT 100MHz
0.1µF
0.1µF FERRITE BE AD
10Ω AT 100MHz
AD9268
VIN+A
VIN–A
08674-022
Figure 22. Schematic of the ADL5535 Driving the AD9268 16-Bit ADC
ADL5535
Rev. 0 | Page 13 of 16
EVALUATION BOARD
Figure 23 shows the evaluation board layout, and Figure 24
shows the schematic for the ADL5535 evaluation board. The
board is powered by a single 5 V supply.
The components used on the board are listed in Tabl e 6.
Power can be applied to the board through clip-on leads
(VCC and GND).
0
8674-018
Figure 23. Evaluation Board Layout (Top)
RFIN
GND
GND
RFOUT
123
C6
1µF
L1
470nH
GND
RFOUT
C5
C4
C2
C1
V
C
C
RFIN
ADL5535
(2)
0.1µF
1.2nF
68pF
0.1µF
08674-015
Figure 24. Evaluation Board Schematic
Table 6. Evaluation Board Components
Component Description Default Value
C1, C2 AC coupling capacitors 0.1 F, 0402
L1 DC bias inductor 470 nH, 0603 (Coilcraft 0603LS-NX or equivalent)
VCC, GND Clip-on terminals for power supply
C4 Power supply decoupling capacitor 68 pF, 0603
C5 Power supply decoupling capacitor 1.2 nF, 0603
C6 Power supply decoupling capacitor 1 F, 1206
ADL5535
Rev. 0 | Page 14 of 16
OUTLINE DIMENSIONS
*COMPLIANT TO JEDEC STANDARDS TO-243 WITH THE
EXCEPTION OF DIMENSIONS INDICATED BY AN ASTERISK.
4.25
3.94
4.60
4.40
*1.75
1.55
1.50 TYP
3.00 TYP
END VIEW
2.60
2.30
1.20
0.75
12
(2)
3
2.29
2.14
*0.56
0.36 *0.52
0.32
1.60
1.40
0.44
0.35
12-18-2008-B
Figure 25. 3-Lead Small Outline Transistor Package [SOT-89]
(RK-3)
Dimensions shown in millimeters
ORDERING GUIDE
Model1Temperature Range Package Description Package Option
ADL5535ARKZ-R7 −40°C to +85°C 3-Lead SOT-89, 7” Tape and Reel RK-3
ADL5535-EVALZ Evaluation Board
1 Z = RoHS Compliant Part.
ADL5535
Rev. 0 | Page 15 of 16
NOTES
ADL5535
Rev. 0 | Page 16 of 16
NOTES
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