S3O0E D MM ?oe%e3? 0030134 e myo - ~({ Gr SGS-THOMSON S-THottson SF. WNCROELECTRONICS IRF620 CHIP N - CHANNEL ENHANCEMENT MODE POWER MOS TRANSISTOR IN DIE FORM e DIE SIZE: 110x110 mils METALLIZATION: SCHEMATIC DIAGRAM 2 Top Al Back Au/Cr/Ni/Au BACKSIDE THICKNESS: 6100 A s DIE THICKNESS: 16 + 2 mils PASSIVATION: P-Vapox 8 BONDING PAD SIZE: : Source 19x27 mils Vv R in* Gate 30x20 mils bss DS (on) Dd e RECOMMENDED WIRE BONDING: 200 V 0.8 0 5A Source Al - max 7 mils Gate Al - max 7 mils N-channel enhancement mode POWER MOS field effect transistor. Easy drive and very fast switching times make this POWER MOS ideal for high speed switching applications. Die geometry MC-0078 E} SOURCE HE care Drain on backside * With Rin.e max. 3.12CW - June 1988 1/2 655 30E D M@ 7929237 0030135 4 a IRF620 CHIP SG S-THOMSON GUARANTEED PROBED ELECTRICAL CHARACTERISTICS (T|= 25C, Note 1) Parameters Test Conditions Min. | Typ. | Max. | Unit Var) pss Drain-source Ip = 250 BA Ves = 0 200 Vv breakdown voltage _ ~ ; T-39-11 lbss Zero gate voltage Vos = Max Rating 250 | pA drain current Vps= Max Rating x 0.8 T= 125C 1000} pA lass Gate-body leakage Veg= 20 V 100 | nA current Vas (th) Gate threshold Vos = Vas lb = 250 pA 2 4 Vv voltage Ros (on) Static drain-source Veg= 10V Ip=1A 08 | 2 on resistance NOTES: 1 - Due to probe testing limitations de parameters only are tested. They are measured using pulse techni- ques: pulse width <300 ps, duty cycle <2% 2 -For detailed device characteristics please refer to the discrete device datasheet 2/2 656 KI. SGS-THOMSON nm MICRCELEGLE CEES