NC7SZ57, NC7SZ58 TinyLogic UHS Universal Configurable Two-Input Logic Gates Description www.onsemi.com The NC7SZ57 and NC7SZ58 are universal configurable two-input logic gates. Each device is capable of being configured for 1 of 5 unique two-input logic functions. Any possible two-input combinatorial logic function can be implemented, as shown in the Function Selection Table. Device functionality is selected by how the device is wired at the board level. Figures 4 through 13 illustrate how to connect the NC7SZ57 and NC7SZ58, respectively, for the desired logic function. All inputs have been implemented with hysteresis. The device is fabricated with advanced CMOS technology to achieve ultra high speed with high output drive while maintaining low static power dissipation over a broad VCC operating range. The device is specified to operate over the 1.65 V to 5.5 V VCC operating range. The input and output are high impedance when VCC is 0 V. Inputs tolerate voltages up to 5.5 V independent of VCC operating range. MARKING DIAGRAMS SIP6 1.45x1.0 CASE 127EB Pin 1 UDFN6 1.0X1.0, 0.35P CASE 517DP Ultra High-Speed Capable of Implementing any Two-Input Logic Functions Typical Usage Replaces Two (2) TinyLogic Gate Devices Reduces Part Counts in Inventory Broad VCC Operating Range: 1.65 V to 5.5 V Power Down High Impednce Input / Output Over-Voltage Tolerant Inputs Facilitate 5 V to 3 V Translation Proprietary Noise / EMI Reduction Circuitry Implemented These Devices are Pb-Free, Halogen Free/BFR Free and are RoHS Compliant XXKK XYZ Pin 1 Features * * * * * * * * * XXKK XYZ SC-88 (SC-70 6 Lead) 1.25x2 CASE 419AD-01 XX, XXX KK XY Z T XXXT = Specific Device Code = 2-Digit Lot Run Traceability Code = 2-Digit Date Code Format = Assembly Plant Code = Year Coding Scheme = Plant Code Identifier = Die Run Code = Eight-Week Datacoding Scheme ORDERING INFORMATION See detailed ordering, marking and shipping information in the package dimensions section on page 9 of this data sheet. (c) Semiconductor Components Industries, LLC, 2000 July, 2019 - Rev. 2 1 Publication Order Number: NC7SZ58/D NC7SZ57, NC7SZ58 Pin Configurations I1 1 6 I2 GND 2 5 VCC I0 3 4 Y I1 1 GND 2 5 VCC I0 3 Figure 1. SC70 (Top View) (Top View) 6 I2 4 Y Figure 3. MicroPakt (Top Through View) AAA Pin One NOTES: 1. AAA represents product code top mark (see Ordering Information). 2. Orientation of top mark determines pin one location. 3. Reading the top mark left to right, pin one is the lower left pin. Figure 2. Pin 1 Orientation PIN DEFINITIONS FUNCTION TABLE Pin # SC70 Pin # MicroPak Name 1 1 I1 2 2 GND 3 3 I0 4 4 Y 5 5 VCC 6 6 I2 Description Inputs NC7SZ57 NC7SZ58 Data Input I2 I1 Ground L L L H L Data Input L L H L H Output L H L H L Supply Voltage L H H L H Data Input H L L L H H L H L H H H L H L H H H H L I0 Y = (I0) * (I2) + (I1) * (I2) Y = (I0) * (I2) + (I1) * (I2) H = HIGH Logic Level L = LOW Logic Level www.onsemi.com 2 NC7SZ57, NC7SZ58 FUNCTION SELECTION TABLE 2-Input Logic Function Device Selection Connection Configuration 2-Input AND NC7SZ57 Figure 4 2-Input AND with Inverted Input NC7SZ58 Figure 10, Figure 11 2-Input AND with Both Inputs Inverted NC7SZ57 Figure 7 2-Input NAND NC7SZ58 Figure 9 2-Input NAND with Inverted Input NC7SZ57 Figure 5, Figure 6 2-Input NAND with Both Inputs Inverted NC7SZ58 Figure 12 2-Input OR NC7SZ58 Figure 12 2-Input OR with Inverted Input NC7SZ57 Figure 5, Figure 6 2-Input OR with Both Inputs Inverted NC7SZ58 Figure 9 2-Input NOR NC7SZ57 Figure 7 2-Input NOR with Inverted Input NC7SZ58 Figure 9, Figure 10 2-Input NOR with Both Inputs Inverted NC7SZ57 Figure 4 2-Input XOR NC7SZ58 Figure 13 2-Input XNOR NC7SZ57 Figure 8 www.onsemi.com 3 NC7SZ57, NC7SZ58 NC7SZ57 Logic Configurations Figure 4 through Figure 8 show the logical functions that can be implemented using the NC7SZ57. The diagrams show the DeMorgan's equivalent logic duals for a given two-input function. The logical implementation is next to the board-level physical implementation of how the pins of the function should be connected. Figure 4. 2-Input AND Gate Figure 5. 2-Input NAND with Inverted A Input Figure 6. 2-Input NAND with Inverted B Input Figure 7. 2-Input NOR Gate Figure 8. 2-Input XNOR Gate www.onsemi.com 4 NC7SZ57, NC7SZ58 NC7SZ58 Logic Configurations Figure 9 through Figure 13 show the logical functions that can be implemented using the NC7SZ58. The diagrams show the DeMorgan's equivalent logic duals for a given two-input function. The logical implementation is next to the board-level physical implementation of how the pins of the function should be connected. Figure 9. 2-Input NAND Gate Figure 10. 2-Input AND with Inverted A Input Figure 11. 2-Input AND with Inverted B Input Figure 12. 2-Input OR Gate Figure 13. 2-Input XOR Gate www.onsemi.com 5 NC7SZ57, NC7SZ58 ABSOLUTE MAXIMUM RATINGS Symbol Min Max Unit VCC Supply Voltage -0.5 6.5 V VIN DC Input Voltage -0.5 6.5 V DC Output Voltage -0.5 6.5 V VOUT Parameter IIK DC Input Diode Current VIN < 0.5 V - -50 mA IOK DC Output Diode Current VOUT < -0.5 V - -50 mA IOUT DC Output Source / Sink Current - 50 mA DC VCC or Ground Current - 50 mA -65 +150 C ICC or IGND TSTG Storage Temperature Range TJ Maximum Junction Temperature under Bias - +150 C TL Lead Temperature, Soldering, 10 Seconds - +260 C PD Power Dissipation at +85C SC70-6 - 190 mW MicroPak-6 - 327 MicroPak2t-6 - 327 Human Body Model, JEDEC: JESD22-A114 - 4000 Charge Device Model, JEDEC: JESD22-C101 - 2000 ESD V Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. RECOMMENDED OPERATING CONDITIONS Symbol VCC VIN VOUT Parameter Conditions Min Max Unit Supply Voltage Operating 1.65 5.5 V Supply Voltage Data Retention 1.5 5.5 0 5.5 Input Voltage Output Voltage TA Operating Temperature qJA Thermal Resistance V 0 VCC V -40 +85 C SC70-6 - 659 C/W MicroPak-6 - 382 MicroPak2-6 - 382 C/W Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond the Recommended Operating Ranges limits may affect device reliability. www.onsemi.com 6 NC7SZ57, NC7SZ58 DC ELECTICAL CHARACTERISTICS TA = +25C Symbol VP VN VH VOH Parameter Positive Threshold Voltage Negative Threshold Voltage Hysteresis Voltage HIGH Level Output Voltage Typ Max Min Max Unit 1.65 - 0.99 1.40 - 1.40 V 2.30 - 1.39 1.80 - 1.80 3.00 - 1.77 2.20 - 2.20 4.50 - 2.49 3.10 - 3.10 5.50 - 2.95 3.60 - 3.60 1.65 0.20 0.50 - 0.20 - 2.30 0.40 0.75 - 0.40 - 3.00 0.60 0.99 - 0.60 - 4.50 1.00 1.43 - 1.00 - 5.50 1.20 1.70 - 1.20 - 1.65 0.15 0.48 0.90 0.15 0.90 2.30 0.25 0.64 1.10 0.25 1.10 3.00 0.40 0.78 1.20 0.40 1.20 4.50 0.60 1.06 1.50 0.60 1.50 5.50 0.70 1.25 1.70 0.70 1.70 1.55 1.65 - 1.55 - VCC (V) 1.65 2.30 Conditions VIN = VIH or VIL IOH = -100 mA 2.20 2.30 - 2.20 - 3.00 2.90 3.00 - 2.90 - 4.50 4.40 4.50 - 4.40 - IOH = -4 mA 1.29 1.52 - 1.29 - IOH = -8 mA 1.90 2.15 - 1.90 - 3.00 IOH = -16 mA 2.40 2.80 - 2.40 - 3.00 IOH = -24 mA 2.30 2.68 - 2.30 - IOH = -32 mA 3.80 4.20 - 3.80 - - - 0.10 - 0.10 - - 0.10 - 0.10 3.00 - - 0.10 - 0.10 4.50 - - 0.10 - 0.10 IOL = 4 mA - 0.08 0.24 - 0.24 1.65 2.30 VIN = VIH or VIL 4.50 VOL LOW Level Output Voltage 1.65 2.30 1.65 2.30 IIN Input Leakage Current IOFF Power Off Leakage Current ICC Quiescent Supply Current TA = -40 to +85C Min VIN = VIH or VIL IOL = 100 mA VIN = VIH or VIL V V V V IOL = 8 mA - 0.10 0.30 - 0.30 3.00 IOL = 16 mA - 0.15 0.40 - 0.40 3.00 IOL = 24 mA - 0.22 0.55 - 0.55 4.50 IOL = 32 mA - 0.22 0.55 - 0.55 VIN = 5.5 V, GND - - 0.1 - 1.0 mA VIN or VOUT = 5.5 V - - 1 - 10 mA VIN = 5.5 V, GND - - 1 - 10 mA 1.65 to 5.50 0 1.65 to 5.5 www.onsemi.com 7 NC7SZ57, NC7SZ58 AC ELECTRICAL CHARACTERISTICS TA = +25C Symbol tPLH, tPHL Parameter Propagation Delay In to Y (Figure 14, 16) Typ Max Min Max Unit - 8.0 14.0 - 14.5 ns - 4.9 8.0 - 8.5 3.3 0.3 - 3.7 5.3 - 5.7 5.0 0.5 - 2.8 4.3 - 4.6 - 4.2 6.0 - 6.5 - 3.4 4.9 - 5.3 - 2 - - - pF - 14 - - - pF - 17 - - - Conditions CL = 15 pF, RL = 1 MW 1.8 0.15 2.5 0.2 CL = 50 pF, RL = 500 W 3.3 0.3 5.0 0.5 CIN Input Capacitance CPD Power Dissipation Capacitance (Figure 15) TA = -40 to +85C Min VCC (V) 0 (Note 4) 3.3 5.0 ns 4. CPD is defined as the value of the internal equivalent capacitance which is derived from dynamic operating current consumption (ICCD) at no output loading and operating at 50% duty cycle. (See Figure 12) CPD is related to ICCD dynamic operating current by the expression: ICCD = (CPD) (VCC) (fIN) + (ICCstatic). AC Loading and Waveforms VCC VCC A INPUT DUT OUTPUT CL INPUT RL NOTE: 5. CL includes load and stray capacitance. 6. Input PRR = 1.0 MHz, tW = 500 ns. DUT NOTE: 7. Input = AC Waveforms. 8. PRR = Variable; Duty Cycle = 50%. Figure 14. AC Test Circuit Figure 15. ICCD Test Circuit tr = 3 ns tf = 3 ns 90% 90% 50% INPUT 10% 10% tW GND tPLH VOH 50% 50% Out of Phase OUTPUT VCC 50% tPHL VOL tPLH In Phase OUTPUT INPUT tPHL VOH 50% 50% VOL Figure 16. AC Waveforms www.onsemi.com 8 NC7SZ57, NC7SZ58 ORDERING INFORMATION Top Mark Package Shipping NC7SZ57P6X Z57 6-Lead SC70, EIAJ SC-88a, 1.25 mm Wide 3000 / Tape & Reel NC7SZ57L6X KK 6-Lead Micropak, 1.0 mm Wide 5000 / Tape & Reel NC7SZ57FHX KK 6-Lead, MicroPak2, 1x1 mm Body, .35 mm Pitch 5000 / Tape & Reel NC7SZ58P6X Z58 6-Lead SC70, EIAJ SC-88a, 1.25 mm Wide 3000 / Tape & Reel NC7SZ58L6X LL 6-Lead Micropak, 1.0 mm Wide 5000 / Tape & Reel NC7SZ58FHX LL 6-Lead, MicroPak2 , 1x1 mm Body, .35 mm Pitch 5000 / Tape & Reel Device For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. MicroPak and MicroPak2 are trademarks of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries. www.onsemi.com 9 MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS SIP6 1.45X1.0 CASE 127EB ISSUE O DOCUMENT NUMBER: DESCRIPTION: 98AON13590G SIP6 1.45X1.0 DATE 31 AUG 2016 Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped "CONTROLLED COPY" in red. PAGE 1 OF 1 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the rights of others. (c) Semiconductor Components Industries, LLC, 2019 www.onsemi.com MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS SC-88 (SC-70 6 Lead), 1.25x2 CASE 419AD-01 ISSUE A SYMBOL D e e E1 E DATE 07 JUL 2010 MIN MAX A 0.80 1.10 A1 0.00 0.10 A2 0.80 1.00 b 0.15 0.30 c 0.10 0.18 D 1.80 2.00 2.20 E 1.80 2.10 2.40 E1 1.15 1.25 1.35 0.65 BSC e L TOP VIEW NOM 0.26 0.36 L1 0.42 REF L2 0.15 BSC 0.46 0 8 1 4 10 q1 A2 A q b q1 L L1 A1 SIDE VIEW c L2 END VIEW Notes: (1) All dimensions are in millimeters. Angles in degrees. (2) Complies with JEDEC MO-203. DOCUMENT NUMBER: DESCRIPTION: 98AON34266E Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped "CONTROLLED COPY" in red. SC-88 (SC-70 6 LEAD), 1.25X2 PAGE 1 OF 1 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the rights of others. (c) Semiconductor Components Industries, LLC, 2019 www.onsemi.com MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS UDFN6 1.0X1.0, 0.35P CASE 517DP ISSUE O DOCUMENT NUMBER: DESCRIPTION: 98AON13593G UDFN6 1.0X1.0, 0.35P DATE 31 AUG 2016 Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped "CONTROLLED COPY" in red. PAGE 1 OF 1 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. 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