THIS DRAWING IS UNPUBLISHED. | RELEASED FOR PUBLICATION NOV ,2004. Loc DIST REVISIONS COPYRIGHT 2004 BY TYCO ELECTRONICS CORPORATION. ALL RIGHTS RESERVED. J P CTR DESCRIPTION DATE DWN APVD 66.8 saa F | REVISED (ECR-08029149) 18NOV2008/B.W|S.Y 0.05 | EXTRACTION D < MATING YG) D tt <4} | CUT OUT OF HOUSING TAIL > =f i (21827236* ONLY) 3|= ret | A ae . SEE DETAIL H MODULE HEIGHT Z Ld 4 HOW TO MATE AND UNMATE -_ DETAIL L DETAIL M MATE: OQ RECOMMENDED MATING P.C.B aN (SCALE 5:1) (SCALE 5:1) UNMATE: (5) 7) eR EJECT 71.9 (APPLIED TO SHEET 1-2) 67.9 (SLOT WIDTH) \ SEE DETAIL J 4. MATERIAL ; HOUSING: HIGH TEMPERATURE THERMO PLASTIC UL94VO X CONTACT: COPPER ARROY ioe} x19= iG.8] x79 4 TYP 3.94783 LOCK LEVER: STAINLESS STEEL LL 4 47.4 4 Ay FINISH ; CONTACT AREA: GOLD FLASH ON 0.0013MIN ALL OVER NICKEL. ( SOLDERING AREA: GOLD FLASH PLATING. N A LOCK LEVER: TIN PLATING. 4 v 2x MECHANICAL KEY POSITION OF CONNECTOR SEE TABLE. C wt, mr AX TOLERANCES NONCUMULATIVE. C ~ MODULE EDGE - aA Ax, NOT TO SCALE. 3 [Ul IE A, COINSIDE MUST BE RESIST COAT EXCEPT SOLDER PATTERN. re @|0.2|2/0.15 tye V > To 9 ZX COPLANARITY : 0.1 MAX. w| 200PIN y +) 2) Ax THE FLOATING VALUE BY SOLDERING IS NOT INCLUDED. N| Ol al wn od Co EN = Ax NOT MATING CONDITION. ~ l k 10 IF THE MODULE DOESNT INSERT AND LOCK IN THE LATCH SMOOTHLY, a = Le te fee |. OPEN WIDE BOTH LATCHES BY MANUAL. AND THE MODULE MUST BE - AANIT- ~ k bh INSERTED AND LOCKED IN THE LATCH. - ee 1 r ft oy W\ FINISH ; CONTACT AREA: GOLD 0.00076MIN PLATING ON 0.0013MIN ALL x19 NY 199PIN - OVER NICKEL. 11.4 rs 00} SOLDERING AREA: GOLD FLASH PLATING. D3 SEE DI POWER SUPPLY Ol + LOCK LEVER: TIN PLATING K-- MECHANICAL KEY CENTER LINE DETAIL M [0.6] x79= (BOTH SIDE) 0.7 TYP 4T.4 SEE 4 DETAIL L B 71.1 MAX. (BOTH SIDE) B aN AVAILABLE POROSITY SEALING 1.8V (DDR2) 17.55) 2.4 | 2.7 200 1827236-6 A AVAILABLE Sob SEALING 1.8V (DDR2) 17.55} 2.4 | 2.7 | 200 318272364 1 gs. 00 LA AVAILABLE CUT OU OF 1.8V (DDR2) 17.55) 2.4 | 2.7 | 200 21827236-4 o SOLDER PEG 3 LD AVAILABLE BOSSLESS 1.8V (DDR2) 17.55) 2.4 | 2.7 200 1-182/72364 (4) 0.42 7 A AVAILABLE . 1.8V (DDR2) 17.55) 2.4 | 2.7 200 182/72564 ha 1.65 H NOT AVAILABLE }. 2.5V (DDR1) 18.45) 1.5 | 1.8 200 - x 1 + aq) ~} LFINISH|TOOLING STATUS REMARK POWER SUPPLY D5 D4 D3 POS PART NO. ! V5) = THIS DRAWING IS A CONTROLLED DOCUMENT. [7 Cini uup, SONCVOS FE ryco Tyco Electronics AMP K.k. CHK SONOVO4 : . = \ cA \ DIMENSIONS: TOLERANCES UNLESS L.KUSURARA Electronics Reweselty vepen N , a APVD S3ONOVO4 | NAME ~ DETAIL J MM ue | EL MURAMATSU DDR1 & DDR2 SODIMM SOCKET 0.6mm PITCH ~ (SCALE. 5:1) = ipod =e 200POS LOW PROFILE STANDARD TYPE A DETAIL H ere 1085701 A ~ TP (SCALE 5:1) GENERAL TOLERANCE cs APPLICATION SPEC (LATCH DIRECT SOLDERING TYPE) 0.35 Clo , 102: 40.2 4p + SIZE | CAGE CODE | DRAWING NO RESTRICTED oO 502 > 10: +0.25 MATERIAL ANISH * WEIGHT KK 1002 > 30: 0.3 3.2 g A 3)00779\G=1827236 (SCALE. 5:1) ANGLES: +5 CUSTOMER DRAWING SCALE 5.4 [SHEET 4 OF y REV AMP 1470-19 REV 31MAR2000THIS DRAWING IS UNPUBLISHED. | RELEASED FOR PUBLICATION NOV ,2004. LOC DIST REVISIONS COPYRIGHT 2004 BY TYCO ELECTRONICS CORPORATION. ALL RIGHTS RESERVED. J P LTR DESCRIPTION DATE DWN APVD SEE SHEET 1 - _ _ REFERENCE P.C. BOARD PATTERN LAYOUT e D (CONNECTOR MOUNTING SIDE) je 4 D OQ H st ne) sae i] ) 4H i] # \ | 10 ><} "| JN eT MECHANICAL KEY S oO oa cy fi [-----7 CENTER LINE = SF | [ - 3 wm i = | a 1PIN = | == + 39PIN\ = / = | = Le + Le ~ es | - == rf 2 5 = 8} /aie sg |_| 3) - apn = = 42PIN 4 3 C < a |= < C = es | = x? n 3k] =a = Q7 2) 9 = S = |= g] | a #3 _ = = - a Ho = | S = == <3 -| =a | == o Oo eo ~ v =" == 4 | O ~ =s == 3 | Oo = O a == Nn Lu m = ll Lu x 5 = | = o |g == a) 3 = | = a i oO Ss ~ & S's 3 REAL SIZE (SCALE 1:1) = = g a =s == D > = - 200PIN 5 199PIN , AP [at = ea 26h oy 4.60.1. (2PLC) 1.8V 17.55} 2.4 | 2.7 940.05 940.05 2.9V 18.45] 1.5 | 1.8 2.8+0.05 2.80.05 POWER SUPPLY | DS | D4 | D3 12+0.05 DWN THIS DRAWING IS A CONTROLLED DOCUMENT. FE ryco Tyco Electronics AMP K.K. CHK Electronics Kawasaki, Japan MENON TE a | wn MM ST PEO DDDR1 & DDR2 SODIMM SOCKET 0.6mm PITCH 0 PLC + A 1 PLC ZOOPOS LOW PROFILE STANDARD TYPE A Oc} pic 7 APPLIGATION SPE (LATCH DIRECT SOLDERING TYPE) 4 Be + 1 a SIZE CAGE CODE | DRAWING NO RESTRICTED MATERIAL FINISH WEIG Ad 00779 C=1 B2/27456 SCALE SHEET REV CUSTOMER DRAWING 24 2% 4 F AMP 1470-19 REV 31MAR2000THIS DRAWING IS UNPUBLISHED. RELEASED FOR PUBLICATION NOV ,2004. Loc DIST REVISIONS COPYRIGHT 2004 BY TYCO ELECTRONICS CORPORATION. ALL RIGHTS RESERVED. J P CIR DESCRIPTION DATE DWN APVD | SEE SHEET 1 - | D (APPLIED TO SHEET 3) D DETAIL F 1. TOLERANCES ON ALL DIMENSIONS +0.15 SEE DETAIL E we SCALE 8:1 UNLESS OTHERWISE SPECIFIED. 3 MIN 5.8 MAX 2. P.C.BOARD THICKNESS APPLIES ACROSS TABS Ps ty AND INCLDES PLATING AND/OR METALIZATION. | Shi b 3. FINISH OF PAD : GOLD PLATING 0.00076 MIN. 7 SEE DETAIL D 5 OVER Ni PLATING 0.002MIN. < YY L/L i A, NO BURR __| a CGMPONENT ARE 2 = x | Ay CHAMFER 0.25 MAX x 45 IF EXIST. | (FRONT SIDE) Ue g t = ; | w | MLLLL 2 L / N | EE | oT coc AoC B- \ Z o | 1PIN 27 ILL JLIL 2.15 rt | PEE dT Pd Tq | [0.6] x19=[1 1.4] | L , 1 +0.1 4 rT 199PIN TYP | Loy |0.15@ [0.6] YP 0.45+0.03 x79= \ C |0.1|c|B]A| 47.4 C SEE DETAIL F [-$|0.05O0[C| C 67.6+0.15 4 -}[0.1@]|c|BIAl 7 MECHANICAL KEY CENTER LINE se = Dal | . L |- FULL R p 2 63.6 | | [E19 wax ane | ! 1.9 MAX. | | | SEE DETAIL G X79 | | | 3 | 5 : || A . | || | | x19=11 1.4) ! | 2.45] _| | | | L200PIN | | | | | B 1+0.05|-A B oPIN (1) A COMPONENT AREA DETAIL D (BACK SIDE) G SCALE 8:1 DETAIL G (Back SIDE) Ly 5\ SCALE 8:1 | | 240.1 DETAIL E (eeont sie) 31.75 1.8V 17.55| 2.4 | 2.7 | 67.6 SCALE 8:1 25.4 2.0V 18.45} 1.5 | 1.8 f H POWER SUPPLY |} D5 D4 D3 THIS DRAWING IS A CONTROLLED DOCUMENT. OWN EF ryco Tyco Electronics AMP K.K. ; cHk Electronics Kawasaki, Japan RECOMMENDED MATING P.C.B CONFIGRATION DIMENSIONS: OTHERWISE SPECIFIER~ [APVD NAME MM <___ DDDR1 & DDR2 SODIMM SOCKET 0.6mm PITCH Q PLC + A 1 PLC 200POS LOW PROFILE STANDARD TYPE A Oc} pict SSN SRE (LATCH DIRECT SOLDERING TYPE) 4 Be + 1 oe SIZE CAGE CODE | DRAWING NO RESTRICTED MATERIAL FINISH WEIG AS 00779 C=1 B2/27456 CUSTOMER DRAWING SAE 9 [RET zy RY AMP 1470-19 REV 31MAR2000THIS DRAWING IS UNPUBLISHED. RELEASED FOR PUBLICATION NOV ,2004. Loc DIST REVISIONS ALL RIGHTS RESERVED. COPYRIGHT 2004 BY TYCO ELECTRONICS CORPORATION. J P CIR DESCRIPTION DATE DWN APVD 49 79X3=237 | SEE SHEET | 7 LT D o D Ns) Z) | 359 59X4=156 oe aaa) a Be WE re U _ 1sisiL ap oH a yy ey ee) F | aoe A A 1. THE DIRECTION OF EACH CONNECTOR ON A TRAY |S REFERRED TO THIS DRAWING. 2. GENERAL TOLERANCE : +0.5 535 B o B w AVAILABLE 2OEA/TRAY 182723566 | AVAILABLE 2O0EA/TRAY 3-18272364 oe, AVAILABLE | 20EA/TRAY | 218272364 cI Cy] Lf | | Cy] Cy | \ AVAILABLE MG 118272364 | AVAILABLE 2O0EA/TRAY 18272364 NOT AVAILABLE | 20EA/TRAY _ TOOLING STATUS QTY P/N THIS DRAWING IS A CONTROLLED DOCUMENT. |2N EF ryco Tyco Electronics AMP K.K. DIMENSIONS: TOLERANCES UNLESS Electronics wee seen uM OTHERWISE SPECIFIEBY | APVD NAME SEMI-HARD TRAY ASSY 0 PLC + PRODUCT SPEC A & 1 Plc 7 DDR1 & DDR2 SODIMM SOCKET 200P LOW PROFILE A 4P PLC 7; APPLICATION SPEC STANDARD TYPE (LATCH DIRECT SOLDERING TYPE) 4 Be + SIZE | CAGE CODE | DRAWING NO RESTRICTED MATERIAL FINISH WEIGHT Ad 00779 C= 1 BPIPS 6 CUSTOMER DRAWING SAE 420 [RET Fy RY AMP 1470-19 REV 31MAR2000