ADNS-3000 Low Power Optical Mouse Sensor Data Sheet Description Features The Avago Technologies ADNS-3000 is a low power, small form factor optical mouse sensor. It has a new low-power architecture and automatic power management modes, making it ideal for battery, power-sensitive applications - such as cordless input devices. Low Power Architecture The ADNS-3000 is capable of high-speed motion detection - up to 30 ips and 20 g. In addition, it has an on-chip oscillator and requires an external resistor to set the LED current. High Speed Motion Detection up to 30 ips and 20 g The ADNS-3000 along with the ADNS-5110-001 lens, and HSDL-4261 IR LED or HLMP-EG3E-xxxxx Red LED form a complete and compact mouse tracking system. There are no moving parts and this translates to high reliability and less maintenance for the end user. In addition, precision optical alignment is not required, facilitating high volume assembly. Selectable Resolution of up to 2000 cpi The sensor is programmed via registers through a fourwire serial port. It is housed in an 8-pin staggered dual in-line package (DIP). Small Form Factor Programmable Periods / Response Times and Downshift Times from one mode to another for the Power-saving Modes External Interrupt Output for Motion Detection Internal Oscillator - no clock input needed Operating Voltage: as low as 1.7 V Four-wire Serial Port Interface Applications Optical mice and optical trackballs Integrated input devices Battery-powered input devices Theory of Operation The ADNS-3000 is based on Optical Navigation Technology, which measures changes in position by optically acquiring sequential surface images (frames) and mathematically determining the direction and magnitude of movement. The ADNS-3000 contains an Image Acquisition System (IAS), a Digital Signal Processor (DSP), and a four wire serial port. The IAS acquires microscopic surface images via the lens and illumination system. These images are processed by the DSP to determine the direction and distance of motion. The DSP calculates the Dx and Dy relative displacement values An external microcontroller reads and translates the Dx and Dy information from the sensor serial port into PS2, USB, or RF signals before sending them to the host PC. Pinout of ADNS-3000 Optical Mouse Sensor Pin Name Input/ Output 1 MISO O Serial Data Output (Master In/Slave Out) 2 LED I LED Illumination 3 MOTION O Motion Interrupt Output (Default active low, edge triggered) 4 NCS I Chip Select (Active low input) 5 SCLK I Serial Clock 6 GND I Ground 7 VDD I Supply Voltage 8 MOSI I Serial Data Input (Master Out/Slave In) Description Date Code 4 5 3 6 2 7 1 8 Lot Code Product Number Item Marking Product Number A3000 Remarks Date Code XYYWWZ X = Subcon Code YYWW = Date Code Z = Sensor Die Source Lot Code VVV Numeric Figure 1. Package Outline Drawing (Top View) 2 Product Number Date Code Features for Illustration only Pin 1 9.10 0.358 9.90 0.390 A (At shoulder) 3.72 0.146 3.50 0.138 5.15 0.203 12.85 0.506 Lot Code 90 3q 0.50 0.020 2.00 0.079 4.12 0.162 12.85 0.50 (At lead tip) 0.506 0.020 ( 2.74 ) 0.108 Lead Pitch A 1.00 Lead Offset 0.039 ( 0.04 ) 0.002 Lead Width Pin 1 4.55 0.179 Protective Kapton Tape Section A-A 0.70 0.028 Clear Optical Path 3.92 0.154 Notes: 1. Dimensions in millimeter / inches. 2. Dimensional tolerance: 0.1mm. 3. Coplanarity of leads: 0.1mm. 4. Lead pitch tolerance: 0.15mm. 5. Non-cumulative pitch tolerance: 0.15mm. 6. Angular tolerance: 3q 7. Maximum flash: 0.2mm. 8. Brackets () indicate reference dimension. 9. Document Number: LED_SPC_8C_PKG_002 Figure 2. Package Outline Drawing CAUTION: It is advised that normal static precautions be taken in handling and assembling of this component to prevent damage and/or degradation which may be induced by ESD. 3 Overview of Optical Mouse Sensor Assembly Avago Technologies provides an IGES file drawing describing the base plate molding features for lens and PCB alignment. The ADNS-3000 sensor is designed for mounting on a through-hole PCB, looking down. There is an aperture stop and features on the package that align to the lens. The ADNS-5110-001 lens provides optics for the imaging of the surface as well as the illumination of the surface at the optimum angle. Features on the lens align it to the sensor, base plate, and clip with the LED. The LED clip holds the LED in relation to the lens. The LED must be inserted into the clip and the LED's leads formed prior to loading on the PCB. The LEDs recommended for illumination include HSDL-4261 IR LED, HLMP-EG3E-xxxxx Red LED. 26 1.024 25.00 2X 0.984 2.00 3X 0.079 0.383999 0.015118 1.00 0.039 12.9 0.508 12.60 0.496 11.22 0.442 Optional hole for alignment post if used 3.00 o 0.118 Notes: Clear zone 1. Dimensions in millimeter/inches 10X o 0.80 0.031 Figure 3. Recommended PCB Mechanical Cutouts and Spacing 4 6.290362 0.247652 7.56 0.298 0.3 0.012 Optical center 10.35 0.407 0 5.02 0.198 0 1.37 0.054 Pin 1 2.25 0.089 24.15 2X 0.951 14.94 0.588 14.5 0.571 13.06 0.514 2. View from component side of PCB (or top view of mouse) 33.45 1.317 A A Sensor Lens Section A - A Figure 4. 2D Assembly drawing of ADNS-3000 (Top and Side View) Sensor 2.40 A 0.094 Lens 6.87 0.271 B LED Clip Alignment Post (Optional) Important Note: Pin 1 of sensor should be located nearest to the LED Surface Lens Reference Plane Note: A - Distance from object surface to lens reference plane B - Distance from object surface to sensor reference plane Figure 5. Distance from lens reference plane to tracking surface (Z) 5 LED PCB 2.40 0.094 7.45 0.293 10.60 0.417 Gap between 0.05 sensor package 0.002 and top of PCB 13.10 0.516 Pin 1 Base Plate LED LED Clip ADNS-3000 (Sensor) Customer supplied PCB ADNS-5110-001 Customer supplied base plate with recommended alignment features per IGES drawing Important Note: IR LED is recommended for lower power consumption. Figure 6. Exploded View of Assembly PCB Assembly Considerations 4. This sensor package is only qualified for wave-solder process. 5. Wave solder the entire assembly in a no-wash solder process utilizing solder fixture. The solder fixture is needed to protect the sensor during the solder process. It also sets the correct sensor-to-PCB distance as the lead shoulders do not normally rest on the PCB surface. The fixture should be designed to expose the sensor leads to solder while shielding the optical aperture from direct solder contact. 6. Place the lens onto the base plate. 7. Remove the protective Kapton tape from optical aperture of the sensor. Care must be taken to keep contaminants from entering the aperture. Recommend not to place the PCB facing up during the entire mouse assembly process. Recommend to hold the PCB first vertically for the Kapton removal process. 8. Insert PCB assembly over the lens onto the base plate aligning post to retain PCB assembly. The sensor aperture ring should self-align to the lens. 6 10. Install mouse top case. There MUST be a feature in the top case to press down onto the PCB assembly to ensure all components are interlocked to the correct vertical height. ADNS-3000 VDD GND IMAGE ARRAY DSP LED SERIAL PORT AND REGISTERS 3. Insert the LED clip assembly into PCB. POWER AND CONTROL 2. Insert the LED into the assembly clip and bend the leads 90 degrees. 9. The optical position reference for the PCB is set by the base plate and lens. Note that the PCB motion due to button presses must be minimized to maintain optical alignment. LED DRIVE 1. Insert the sensor and all other electrical components into PCB. OSCILLATOR Figure 7. Block diagram of ADNS-3000 optical mouse NCS SCLK MOSI MISO MOTION SW1 SLIDE SW SPDT ZB R0 3 352* 3 3 P20 14 5)02'8/( 2AA BATTERY BT1 2)) [$$%DWWHU\ PROG ZA 1 % % 5)0RGXOH3&% 3 3 5(6(7 *1' *1' *1' *1' *1' *1' *1' *1' *1' 9''B5) RESET MSCK S4 P6 P24 9%$7 9%$7 7 P25 2 )% 9287 TPS61220 *1' (1 9,1 / U2 )% 9287 TPS61220 *1' (1 9,1 / CON1 R14 1M 13 =(QFRGHU ZA ZB COM R13 1M 9''B5) PCB_SKT_SMD_1.27/2X5 9&&B'& PROG R2 S1 Z-ENCODER_3P $ % &20 Q1 S2 RESET R1 995HJXODWRU%ORFN U1 12 -7$*&211(&725 C4 10uF/50V L2 4.7uH 10uF/50V C5 9&&B'& 9%$7 Figure 8a. Schematic diagram of the mouse (cordless application) 21 R3 300k R4 1M1 R2 453k R1 1M3 C7 100nF C6 100nF C3 100nF C1 100nF P16 C13 4.7nF P7 9&&B'& C10 4.7nF P21 LED R LED D5 9''B/(' , /(' P22 C11 MOSI 9'' 9'',2 6',2 6&/. 027,21 11 6 1 %O 2SW ADNS-3000 ;<B/(' U5 P26 C9 2.2uF/16V 2SW R6 1M R9 , 6(1625 0R 100nF 9''B6(1625 0R R17 9''B6(1625 Option 2: R1 = 1M6 , R2 = 470k R3 = 300k , R4 = 1M1 VCC_DC1 = 2.2V VCC_DC2 = 2.3V Note: Option 1: R1 = 1M3 , R2 = 453k R3 = 300k , R4 = 1M1 VCC_DC1 = 1.9V VCC_DC2 = 2.3V C12 4.7nF C8 4.7nF 9&&B'& 4.7uF/10V 6',2 N 3ODFHFORVHWRVHQVRUSLQ MOTION MSCK VDDIO C2 1RWH8VH&HUDPLF&DSV 2SWP27 2SW 10 S4 S3 S1 R1 SW4 SW3 SW2 R12 1M NC COMNO NC COMNO 2SW MISO 2SW P28 R7 9''B6(1625 1M 9''B6(1625 CS NC COMNO TACT_SW &3, SW5 9''B6(1625 5 4 0LGGOH%XWWRQ 5LJKW%XWWRQ /HIW%XWWRQ R11 1M R10 1M 9''B6(1625 3 S3 R0 P3 P4 P5 9&&B'& 9''B6(1625 P17 P18 P19 9&&B'& VDD_LED 9 P11 P10 P9 P2 GND 9&&B'& VCC_DC1 P13 9ROWDJH0HDVXUHPHQW 9%$7 P12 P14 5)9ROWDJH6HOHFWLRQ VBAT 8 9''B5) 7 6HQVRU9ROWDJH6HOHFWLRQ 9&&B'& 9''B/(' 9''B/(' /('9ROWDJH6HOHFWLRQ 9&&B'& 6 9&&B'& P1 CS 3 MISO 3 MOSI 3 9%$7 3 COM 3 R1 9'' 3 MOTION 3 R2 3 S1 3 S2 3 S3 9''$ *1' L1 4.7uH 9%$7 9&&B'& VCC_DC2 P15 9&&B'& + C1 100nF C3 100nF C4 33nF C13 5pF P7 P6 P5 P1 9''B5) R0 100nF C5 PROG ZB ZA 9''B5) 8 Figure 8b. Schematic diagram of the RF module on the mainboard GND9 GND8 GND7 GND6 GND5 GND4 GND3 966 3 352* 3 '(& '(& 9'' 3 U1 C14 5pF NRF24LE1 P10 P11 P12 P13 P14 P15 P16 3 3 5(6(7 9''B3$ $17 $17 966 9'' 22K R1 C7 22pF C15 5pF COM GND2 P29 P28 R1 GND1 P32 MOTION C6 22pF R2 VDD X1 16MHz S1 9''B5) CS 3 9'' ;& 3 MISO 3 MOSI *1' 3 ;& 3 S2 3 3 9'' 3 966 3 ,5() 3 S3 ANT2 ANT1 VDD_PA RESET MSCK S4 5pF C16 P17 P18 P19 C2 100nF 9''B5) 6.8nH L3 C9 2.2nF L2 6.8nH 4.7nH L1 1.5pF C8 1 C11 1pF C12 1.8pF AT1 ANTENNA 2KP7UDFH3RLQW *1' ' ' 9%86 R6 R3 R4 10R 22R 22R 9 Figure 8C. Schematic diagram of the dongle USB Type A J1 J2 Header 5 10uF C12 PROG SCK MOSI MISO CSN R7 10k C8 10nF R5 10k 9'' 22pF C2 22pF C1 9'' C7 10nF 9'' 9%86 9'' ' ' 966 352* 5(6(7 X1 16MHz 33nF 22k C10 R2 nRF24LU1+ U1 33nF C9 9'' 966 $17 $17 9''B3$ 9'' 966 966 ;& ;& 966 '(& '(& 9'' 966 ,5() 9'' 3 3 966 3 3 3 3 C11 100nF 9'' 6.8nH L2 L1 5.6nH 6.8nH L3 C3 2.2nF 1.0pF C5 C4 4.7pF C6 1.0pF 2.2pF C13 L4 3.9nH 0402 Antenna Design Considerations for Improved ESD Performance Regulatory Requirements For improved electrostatic discharge performance, typical creepage and clearance distance are shown in the table below. Assumption: base plate construction is as per the Avago Technologies supplied IGES file and ADNS-5110001 lens. Note that the lens material is polycarbonate or polystyrene HH30. Therefore, cyanoacrylate based adhesives or other adhesives that may damage the lens should NOT be used. Passes FCC B and worldwide analogous emission limits when assembled into a mouse with shielded cable and following Avago Technologies recommendations. Typical Distance (mm) Creepage 16.0 Clearance 2.0 UL flammability level UL94 V-0. Table 1. Absolute Maximum Ratings Parameter Symbol Minimum Maximum Units Storage Temperature TS -40 85 C Operating Temperature TA -15 55 C Lead Solder Temperature VO 260 C Supply Voltage VDD -0.5 2.2 V 2 kV All pins, human body model JESD22-A114 VIN -0.5 2.1 V All I/O pins Typ. Max Units 40 C ESD Input Voltage Notes For 10 seconds, 1.6 mm below seating plane. Table 2. Recommended Operating Condition Parameter Symbol Min Operating Temperature TA 0 Power Supply Voltage VDD 1.7 Power Supply Rise Time TRT 0.15 Supply Noise (Sinusoidal) VNA Serial Port Clock Frequency fSCLK Distance from Lens Reference Plane to Tracking Surface (Z) Z 2.3 Speed 1 S 0 Acceleration a Load Capacitance Cout 1.8 2.4 Notes 2.1 V 20 ms 0 to VDD min 100 mVp-p 10 kHz -50 MHz 1 MHz 50% duty cycle 2.5 mm 30 ips At default frame rate 20 g At run mode 100 pF MISO and MOTION Note: 1. For higher than 500 dpi setting, use 12-bit motion reporting to achieve the maximum speed Table 3. AC Electrical Specifications Electrical characteristics over recommended operating conditions. Typical values at 25 C, VDD = 1.9 V, VDDLED = 1.9 V, IRLED HSDL-4261, RLED = 36 . Parameter Symbol Motion Delay after Reset Max. Units Notes tMOT-RST 50 ms From RESET register write to valid motion Forced Rest Enable tREST-EN 1 s From Rest Mode (RM) bits set to target rest mode Wake from Forced Rest tREST-DIS 1 s From Rest Mode (RM) bits cleared to valid motion Power Down tPD 50 ms From PD active (when bit 1 of register 0 x 0d is set) to low current Wake from Power Down tWAKEUP 55 ms Through RESET register 0 x 3a. From PD inactive to valid motion MISO Rise Time tr-MISO 60 200 ns CL = 100 pF MISO Fall Time tf-MISO 40 200 ns CL = 100 pF MISO Delay after SCLK tDLY-MISO 120 ns From SCLK falling edge to MISO data valid, no load conditions MISO Hold Time thold-MISO 250 1/fSCLK ns Data held until next falling SCLK edge MOSI Hold Time thold-MOSI 200 ns Amount of time data is valid after SCLK rising edge MOSI Setup Time tsetup-MOSI 120 ns From data valid to SCLK rising edge SPI Time between Write Commands tSWW 30 s From rising SCLK for last bit of the first data byte, Commands to rising SCLK for last bit of the second data byte SPI Time between Write and Read Commands tSWR 20 s From rising SCLK f or last bit of the first data byte, to rising SCLK for last bit of the second address byte SPI Time between Read and Subsequent Commands tSRW tSRR 250 ns From rising SCLK for last bit of the first data byte, to falling SCLK for the first bit of the next address SPI Read Address-Data Delay tSRAD 4 s From rising SCLK for last bit of the address byte, to falling SCLK for first bit of data being read NCS Inactive after Motion Burst tBEXIT 250 ns Minimum NCS inactive time after motion burst before next SPI usage NCS to SCLK Active tNCS-SCLK 120 ns From NCS falling edge to first SCLK falling edge SCLK to NCS Inactive (For Write Operation) tSCLK-NCS 120 ns From last SCLK rising edge to NCS rising edge, for valid MISO data transfer SCLK to NCS Inactive (For Read Operation) tSCLK-NCS 20 s From last SCLK rising edge to NCS rising edge, for valid MISO data transfer NCS to MISO high-Z tNCS-MISO 250 ns From NCS rising edge to MISO high-Z state Transient Supply Current IDDT 60 mA Max supply current during a VDD ramp from 0 to VDD with min 150 s and max 20 ms rise time. (Does not include charging currents for bypass capacitors.) 11 Min. Typ. Table 4. DC Electrical Specifications Electrical characteristics over recommended operating conditions. Typical values at 25 C, VDD = 1.9 V, VDDLED = 1.9 V, IRLED HSDL-4261, ILED DC = 5mA Parameter Symbol DC Supply Current in Various Mode IDD_AVG Min Units Notes 1.44 mA IDD_REST1 108 A Average sensor current at max frame rate. No load on MISO IDD_REST2 28 A IDD_REST3 12 A IDDLED_AVG 0.3 mA IDDLED_REST1 62 A IDDLED_REST2 15 A IDDLED_REST3 4 A Power Down Current Typ. 0.3* VDD VIL Input High Voltage VIH Input Hysteresis VI_HYS 200 Input Leakage Current Ileak +/-1 Output Low Voltage VOL Output High Voltage VOH Input Capacitance Cin V SCLK, MOSI, NCS V SCLK, MOSI, NCS mV SCLK, MOSI, NCS +/-10 A Vin = VDD or 0 V 0.45 V Iout = 1 mA, MISO, MOTION V Iout = -1 mA, MISO, MOTION pF MOSI, NCS, SCLK 0.7* VDD VDD -0.45 50 Average LED current at max frame rate. No load on MISO A 10 Input Low Voltage 12 Max Synchronous Serial Port The synchronous serial port is used to set and read parameters in the ADNS-3000, and to read out the motion information. The port is a four wire serial port. The host micro-controller always initiates communication; the ADNS-3000 never initiates data transfers. SCLK, MOSI, and NCS may be driven directly by a micro-controller. The port pins may be shared with other SPI slave devices. When the NCS pin is high, the inputs are ignored and the output is at tri-state. Mode Response Time (Typical) Downshift Time (Typical) Rest 1 20 ms <1 s Rest 2 100 ms 10 s Rest 3 500 ms 600 s Note: These default timings are subject to changes after characterization. NCS: Chip select input (active low). NCS needs to be low to activate the serial port; otherwise, MISO will be high Z, and MOSI & SCLK will be ignored. NCS can also be used to reset the serial port in case of an error. Another feature in ADNS-3000 that can be used to optimize the power consumption of the optical mouse system is the Motion Interrupt Output or MOTION pin (pin 3). It allows the host controller to be in sleep mode (or lowest operating current mode) when there is no motion detected after some time instead of consistently be in active mode and polling motion data from the sensor. When motion is detected, the sensor will send the motion interrupt signal through pin 3 to the controller to wake it up from sleep mode to resume its motion detection routine for navigation position and direction update. Chip Select Operation MOTION Detection Routine The serial port is activated after NCS goes low. If NCS is raised during a transaction, the entire transaction is aborted and the serial port will be reset. This is true for all transactions. After a transaction is aborted, the normal address-to-data or transaction-to-transaction delay is still required before beginning the next transaction. To improve communication reliability, all serial transactions should be framed by NCS. In other words, the port should not remain enabled during periods of non-use because ESD and EFT/B events could be interpreted as serial communication and put the chip into an unknown state. In addition, NCS must be raised after each burst-mode transaction is complete to terminate burst-mode. The port is not available for further use until burst-mode is terminated. Typically in the motion detection routine, MCU will poll the sensor for valid motion data by checking on the MOTION_ST bit in MOTION_ST register. If MOTION_ST bit is set, motion data in DELTA registers is valid and ready to be read by the MCU. For 8-bit motion reporting the DELTA registers are DELTA_X and DELTA_Y and for 12-bit motion reporting the DELTA registers are DELTA_X, DELTA_Y and DELTA_XY_HIGH. The lines that comprise the SPI port: SCLK: Clock input. It is always generated by the master (the micro-controller). MOSI: Input data. (Master Out/Slave In) MISO: Output data. (Master In/Slave Out) Power Management Modes The ADNS-3000 has three power-saving modes. Each mode has a different motion detection period with its respective response time to mouse motion. Response Time is the time taken for the sensor to `wake up' from rest mode when motion is detected. When left idle, the sensor automatically changes or downshift from Run mode to Rest1, to Rest2 and finally to Rest3 which consumes the least current. Do note that current consumption is the lowest at Rest3 and highest at Rest1, however time required for sensor to respond to motion from Rest1 is the shortest and longest from Rest3. Downshift Time is the elapsed time (under no motion condition) from current mode to the next mode for example, it takes 10s for the sensor that is in Rest1 to change to Rest2. The typical response time and downshift time for each mode is shown in the following table. However, user can change the default time setting for each mode via register 0x0e through 0x13. 13 MOTION Function MOTION output signal (pin 3) can be used as interrupt input to the microcontroller of the mouse to trigger the controller to read the motion data from the sensor whenever there is motion detected by the sensor. The MOTION signal can be configured to be level or edge triggered, active high or low by setting the bits in MOTION_CTRL register. For active high level-triggered configuration, the MOTION pin level will be driven high as long the MOTION bit in register 0x02 is set and there is motion data in DELTA registers ready to be read by the microcontroller. Once all the motion data has been read, DELTA registers value become zero, MOTION bit is reset and the MOTION pin level is driven low. For active high edge-triggered configuration, a pulse of 380ns (typical) will be sent through the MOTION pin when there is motion detected by the sensor during rest modes. The pulse can be used as interrupt input to activate the microcontroller from its sleep mode to enter into run mode to start polling the sensor for motion data by monitoring MOTION_ST bit (set whenever there is valid motion data) in MOTION register (0x02) and reading DELTA registers until MOTION_ST bit is reset. Write Operation Write operation, defined as data going from the micro-controller to the ADNS-3000, is always initiated by the microcontroller and consists of two bytes. The first byte contains the address (seven bits) and has a "1" as its MSB to indicate write sequence. The second byte contains the data. The ADNS-3000 reads MOSI on rising edges of SCLK. NCS 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 1 2 1 A6 A5 A4 A3 A2 A1 A0 D7 D6 D5 D4 D3 D2 D1 D0 1 A6 SCLK MOSI MISO MOSI DRIVEN BY MICRO-CONTROLLER SCLK MOSI thold-MOSI tsetup-MOSI MOSI setup and hold time during write operation Read Operation A read operation, defined as data going from the ADNS-3000 to the micro-controller, is always initiated by the microcontroller and consists of two bytes. The first byte contains the address, is sent by the micro-controller over MOSI, and has a "0" as its MSB to indicate data direction. The second byte contains the data and is driven by the ADNS-3000 over MISO. The sensor outputs MISO bits on falling edges of SCLK and samples MOSI bits on every rising edge of SCLK. NCS SCLK Cycle # 1 2 3 4 5 6 7 0 A6 A5 A4 A3 A2 A1 8 9 10 11 12 13 14 15 16 D7 D6 D5 D4 D3 D2 D1 D0 SCLK MOSI MISO A0 tSRAD DELAY SCLK tHOLD-MISO tDLY-MISO MISO D0 MOSI delay and hold time during read operation 14 Note: The 500 ns minimum high state of SCLK is also the minimum MISO data hold time of the ADNS-3000. Since the falling edge of SCLK is actually the start of the next read or write command, the ADNS-3000 will hold the state of data on MISO until the falling edge of SCLK. Required Timing between Read and Write Commands There are minimum timing requirements between read and write commands on the serial port. tSWW SCLK ADDRESS DATA ADDRESS WRITE OPERATION DATA WRITE OPERATION Timing between Two Write Commands If the rising edge of the SCLK for the last data bit of the second write command occurs before the required delay (tSWW ), then the first write command may not complete correctly. tSWR ttt SCLK ADDRESS DATA ADDRESS ttt WRITE OPERATION NEXT READ OPERATION Timing between Write and Read Commands If the rising edge of SCLK for the last address bit of the read command occurs before the required delay (tSWR), the write command may not complete correctly. tSRW & tSRR tSRAD ttt SCLK ADDRESS ADDRESS DATA ttt READ OPERATION NEXT READ or WRITE OPERATION Timing between Read and Subsequent Write or Read Commands During a read operation SCLK should be delayed at least tSRAD after the last address data bit to ensure that the ADNS-3000 has time to prepare the requested data. The falling edge of SCLK for the first address bit of either the read or write command must be at least tSRR or tSRW after the last SCLK rising edge of the last data bit of the previous read operation. Motion Burst Timing tSRAD ttt SCLK MOTION_BURST REGISTER ADDRESS READ FIRST BYTE ttt FIRST READ OPERATION 15 READ SECOND BYTE READ THIRD BYTE Burst Mode Operation Reset Burst mode is a special serial port operation mode that may be used to reduce the serial transaction time for a motion read. The speed improvement is achieved by continuous data clocking to or from multiple registers without the need to specify the register address, and by not requiring the normal delay period between data bytes. During power-up, the ADNS-3000 does not need a power on reset as there is an internal circuitry that performs power on reset in the sensor. However it can be reset by writing 0x5a to register 0x3a. A full reset will thus be executed and any register settings must be reloaded. Burst mode is initiated by reading the MOTION_BURST register (0x63). The ADNS-3000 will respond with the contents of the DELTA_X, DELTA_Y, SQUAL, SHUT_HI, SHUT_LO, and PIX_MAX and PIX_ACCUM registers in that order. The burst transaction can be terminated anywhere in the sequence after the DELTA_Y value by bringing the NCS pin high. The default value in BURST_READ_FIRST register (0x42) is the address of the DELTA_X register. The address that is specified in the BURST_READ_FIRST register can be changed to address 0x00 - 0x02 (PROD_ID - MOTION_ST) or 0x05 - 0x08 (SQUAL - PIX_MAX). Power Down The ADNS-3000 can be set to Power Down mode by writing 0x02 to register 0x0d to disable the sensor. In addition, the SPI port should not be accessed during power down. Other ICs on the same SPI bus can be accessed, as long as the sensor's NCS pin is not asserted. The table below shows the state of various pins during power down. To exit Power Down, write 0x5a to register 0x3a to reset the sensor in order to wake it up. A full reset will thus be executed. Wait tWAKEUP before accessing the SPI port. Any register settings must then be reloaded. In 12-bit motion reporting there will be an extra content in DELTA_XY_HIGH (register 0x0c), to be read out in the order of DELTA_X, DELTA_Y, DELTA_XY_HIGH, SQUAL, SHUT_HI, SHUT_LO, PIX_MAX and PIX_ACCUM. The rest of the burst mode operation is the same as 8-bit motion reporting. Pin During Power Down MOTION Undefined NCS Functional1 MISO Undefined SCLK Functional2 After reading the MOTION_BURST address (0x63), the microcontroller must wait tSRAD before starting to read the continuous data bytes. All data bits can be read with no delay between bytes by driving SCLK at the normal rate. The data are latched into the output buffer after the last address bit is received. After the burst transmission is complete, the micro-controller must raise the NCS line for at least tBEXIT to terminate burst mode. The serial port is not available for use until it is reset with NCS, even for a second burst transmission. MOSI Functional2 XY_LED Low current 16 Notes: 1. NCS pin must be held to 1 (HIGH) if SPI bus is shared with other devices. It can be in either state if the sensor is the only device in connected to the host micro-controller. 2. Reading of registers should only be performed after exiting from the power down mode. Any read operation during power down will not reflect the actual data of the registers. Registers The ADNS-3000 registers are accessible via the serial port. The registers are used to read motion data and status as well as to set the device configuration. Address Register Name Register Description Read/Write Default Value 0x00 PROD_ID Product ID R 0x2A 0x01 REV_ID Revision ID R 0x00 0x02 MOTION_ST Motion Status R 0x00 0x03 DELTA_X Lower byte of Delta_X R 0x00 0x04 DELTA_Y Lower byte of Delta_Y R 0x00 0x05 SQUAL Squal Quality R 0x00 0x06 SHUT_HI Shutter Open Time (Upper 8-bit) R 0x00 0x07 SHUT_LO Shutter Open Time (Lower 8-bit) R 0x64 0x08 PIX_MAX Maximum Pixel Value R 0xD0 0x09 PIX_ACCUM Average Pixel Value R 0x80 0x0a PIX_MIN Minimum Pixel Value R 0x00 0x0b PIX_GRAB Pixel Grabber R/W 0x00 0x0c DELTA_XY_HIGH Upper 4 bits of Delta X and Y displacement R 0x00 0x0d MOUSE_CTRL Mouse Control R/W 0x01 0x0e RUN_DOWNSHIFT Run to Rest1 Time R/W 0x08 0x0f REST1_PERIOD Rest1 Period R/W 0x01 0x10 REST1_DOWNSHIFT Rest1 to Rest2 Time R/W 0x1f 0x11 REST2_PERIOD Rest2 Period R/W 0x09 0x12 REST2_DOWNSHIFT Rest2 to Rest3 Time R/W 0x2f 0x13 REST3_PERIOD Rest3 Period R/W 0x31 0x22 PERFORMANCE Performance R/W 0x00 0x3a RESET Reset W 0x00 0x3f NOT_REV_ID Inverted Revision ID R 0xff 0x40 LED_CTRL LED Control R/W 0x00 0x41 MOTION_CTRL Motion Control R/W 0x40 0x42 BURST_READ_FIRST Burst Read Starting Register R/W 0x03 0x45 REST_MODE_CONFIG Rest Mode Configuration R/W 0x00 0x63 MOTION_BURST Burst Read R 0x00 17 PROD_ID Address: 0x00 Product ID Register Access: Read Reset Value: 0x2A Bit 7 Field PID7 6 5 4 3 2 1 0 PID6 PID5 PID4 PID3 PID2 PID1 PID0 Data Type: 8-Bit unsigned integer USAGE: This register contains a unique identification assigned to the ADNS-3000. The value in this register does not change; it can be used to verify that the serial communications link is functional. REV_ID Address: 0x01 Product ID Register Access: Read Reset Value: 0x00 Bit 7 Field RID7 6 5 4 3 2 1 0 RID6 RID5 RID4 RID3 RID2 RID1 RID0 Data Type: 8-Bit unsigned integer USAGE: This register contains the IC revision. It is subject to change when new IC versions are released. MOTION_ST Address: 0x02 Motion Status Register Access: Read/Write Reset Value: 0x00 Bit 7 6 Field MOTION_ST RSVD 5 4 3 2 1 0 RSVD RSVD RSVD RSVD RSVD RSVD Data Type: Bit field. USAGE: Register 0x02 allows the user to determine if motion has occurred since the last time it was read. If the MOTION_ ST bit is set, then the user should read registers 0x03 (DELTA_X) and 0x04 (DELTA_Y) to get the accumulated motion data. Read this register before reading the DELTA_X and DELTA_Y registers. Writing any data into this register clears MOTION_ST bit, DELTA_X and DELTA_Y registers. However the written data byte will not be saved. Bit Field Name 7 MOTION_ST Description Motion detected since last report 0 = No motion (default) 1 = Motion occurred, data in DELTA_X and DELTA_Y registers ready to be read 6-0 18 RSVD Reserved DELTA_X Address: 0x03 X Displacement Register Access: Read Reset Value: 0x00 Bit 7 6 5 4 3 2 1 0 Field X7 X6 X5 X4 X3 X2 X1 X0 Data Type: Eight bit 2's complement number. USAGE: X-axis movement in counts since last report. Absolute value is determined by resolution. Reading this register clears the content of this register. Motion -128 -127 -2 -1 0 +1 +2 +126 +127 Delta_X 80 81 FE FF 00 01 02 7E 7F NOTE: Avago RECOMMENDS that registers 0x03, 0x04 and 0x0c be read consecutively in 12-bit motion reporting. DELTA_Y Address: 0x04 Y Displacement Register Access: Read Reset Value: 0x00 Bit 7 6 5 4 3 2 1 0 Field Y7 Y6 Y5 Y4 Y3 Y2 Y1 Y0 Data Type: Eight bit 2's complement number. USAGE: Y-axis movement in counts since last report. Absolute value is determined by resolution. Reading this register clears the content of this register. Motion -128 -127 -2 -1 0 +1 +2 +126 +127 Delta_Y 80 81 FE FF 00 01 02 7E 7F NOTE: Avago RECOMMENDS that registers 0x03, 0x04 and 0x0c be read consecutively in 12-bit motion reporting. 19 SQUAL Address: 0x05 Squal Quality Register Access: Read Reset Value: 0x00 Bit 7 Field SQ7 6 5 4 3 2 1 0 SQ6 SQ5 SQ4 SQ3 SQ2 SQ1 SQ0 Data Type: Upper 8 bits of a 9-bit unsigned integer. USAGE: SQUAL (Surface Quality) is a measure of the number of valid features visible by the sensor in the current frame. The maximum SQUAL register value is 180. Since small changes in the current frame can result in changes in SQUAL, variations in SQUAL when looking at a surface are expected. The graph below shows 250 sequentially acquired SQUAL values, while a sensor was moved slowly over white paper. SQUAL is nearly equal to zero, if there is no surface below the sensor. SQUAL is typically maximized when the navigation surface is at the optimum distance from the imaging lens (the nominal Z-height). Squal value Squal 60 50 40 30 20 10 0 1 55 109 163 217 271 325 379 433 487 541 595 649 703 757 811 865 Count Figure 9. Squal values (white paper) Mean SQUAL vs Z 60 Avg-3sigma Avg Avg+3sigma Squal count 50 40 30 20 10 0 -10 -0.8 -0.6 -0.4 -0.2 0 0.2 Delta from Nominal Focus (mm) Figure 10. Mean squal vs. Z (White Paper) 20 0.4 0.6 0.8 1 SHUT_HI Address: 0x06 Shutter Open Time (Upper 8-bits) Register Access: Read Reset Value: 0x00 Bit 7 Field S15 SHUT_LO 6 5 4 3 2 1 0 S14 S13 S12 S11 S10 S9 S8 Address: 0x07 Shutter Open Time (Lower 8-bits) Register Access: Read Reset Value: 0x64 Bit 7 6 5 4 3 2 1 0 Field S7 S6 S5 S4 S3 S2 S1 S0 Data Type: Sixteen bit unsigned integer. USAGE: Units are in clock cycles. Read SHUT_HI first, then SHUT_LO. They should be read consecutively. The shutter is adjusted to keep the average and maximum pixel values within normal operating ranges. The shutter value is automatically adjusted. PIX_MAX Address: 0x08 Maximum Pixel Value Register Access: Read Reset Value: 0xD0 Bit 7 Field MP7 6 5 4 3 2 1 0 MP6 MP5 MP4 MP3 MP2 MP1 MP0 Data Type: Eight-bit number. USAGE: Store the highest pixel value in current frame. Minimum value = 0, maximum value = 254. The highest pixel value may vary with different frame. PIX_ACCUM Address: 0x09 Average Pixel Value Register Access: Read Reset Value: 0x80 Bit 7 Field AP7 6 5 4 3 2 1 0 AP6 AP5 AP4 AP3 AP2 AP1 AP0 Data Type: High 8-bits of an unsigned 17-bit integer. USAGE: This register stores the accumulated pixel value of the last image taken. This register can be used to find the average pixel value, where Average Pixel = (register value AP[7:0])* 1.058 The maximum accumulated value is 122936 but only bits [16:9] are reported, therefore the maximum register value is 240. The minimum is 0. The PIX_ACCUM value may vary with different frame. 21 PIX_MIN Address: 0x0a Minimum Pixel Value Register Access: Read Reset Value: 0x00 Bit 7 Field MP7 6 5 4 3 2 1 0 MP6 MP5 MP4 MP3 MP2 MP1 MP0 Data Type: Eight-bit number. USAGE: Store the lowest pixel value in current frame. Minimum value = 0, maximum value = 254. The minimum pixel value may vary with different frame. PIX_GRAB Address: 0x0b Pixel Grabber Register Access: Read/Write Reset Value: 0x00 Bit 7 Field PG_VALID 6 5 4 3 2 1 0 PG6 PG5 PG4 PG3 PG2 PG1 PG0 Data Type: Eight bit word. USAGE: The pixel grabber captures 1 pixel per frame. Bit-7 (MSB) of this register will be set to indicate that the 7-bit pixel data (PG[6:0]) is valid for grabbing. In a 22x22 pixel array, it will take 484 read operations to grab all the pixels to form the complete image. NOTE: Bit(s) Field Name Description 7 PG_VALID Pixel Grabber Valid 6:0 PG[6:0] Pixel Data Any write operation into this register will reset the grabber to origin (pixel 0 position). The sensor should not be moved before the 484 read operations are completed to ensure original data is grabbed to produce good (uncorrupted) image. 22X22 Pixel Array Address Map - (View from top of sensor) 462 463 464 465 466 467 468 469 470 471 472 473 474 475 476 477 478 479 480 481 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 482 460 438 416 394 372 350 328 306 284 262 240 218 196 174 152 130 108 Last 483 461 439 417 395 373 351 329 307 285 263 241 219 197 175 153 131 109 86 87 64 65 42 43 20 21 22 440 441 442 443 444 445 446 447 448 449 450 451 452 453 454 455 456 457 458 459 418 419 420 421 422 423 424 425 426 427 428 429 430 431 432 433 434 435 436 437 396 397 398 399 400 401 402 403 404 405 406 407 408 409 410 411 412 413 414 415 374 375 376 377 378 379 380 381 382 383 384 385 386 387 388 389 390 391 392 393 352 353 354 355 356 357 358 359 360 361 362 363 364 365 366 367 368 369 370 371 330 331 332 333 334 335 336 337 338 339 340 341 342 343 344 345 346 347 348 349 308 309 310 311 312 313 314 315 316 317 318 319 320 321 322 323 324 325 326 327 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 First Top X-ray View of Mouse Button Left Button Right 4 5 3 6 2 7 1 8 Pin 1 LED Positive X Positive Y DELTA_XY_HIGH Address: 0x0c Upper 4 bits Delta-X/Y Displacement Register Access: Read Reset Value: 0x00 Bit 7 Field DELTA_X_ HI3 6 5 4 3 2 1 0 DELTA_X_ HI2 DELTA_X_ HI1 DELTA_X_ HI0 DELTA_Y_ HI3 DELTA_Y_ HI2 DELTA_Y_ HI1 DELTA_Y_ HI0 Data Type: Eight bit 2's complement number. USAGE: Concatenate the values to have a 12-bit reporting for the motion. X motion = {DELTA_XY_HIGH[7:4], DELTA_X} , Y motion = DELTA_XY_HIGH[3:0], DELTA_Y} Bit(s) Field Name Description 7:4 DELTA_X_HI Upper 4 bits of DELTA_X displacement for 12-bit reporting 3:0 DELTA_Y_HI Upper 4 bits of DELTA_Y displacement for 12-bit reporting NOTE: Avago RECOMMENDS that registers 0x03, 0x04 and 0x0c be read consecutively in 12-bit motion reporting. MOUSE_CTRL Address: 0x0d Mouse Control Register Access: Read/Write Reset Value: 0x01 Bit 7 Field BIT_ REPORTING 6 5 4 3 2 1 0 RSVD RES_EN RES2 RES1 RES0 PD RES_D Data Type: Bit field. USAGE: Resolution and chip reset information can be accessed or to be edited by this register. Bit(s) Field Name Description 7 BIT_REPORTING 0x0: 8-bit motion reporting 0x1: 12-bit motion reporting. Read register 0x03, 0x04 and 0x0c. 6 RSVD Reserved 5 RES_EN Enable resolution settings set on MOUSE_CTRL [4:2] 4:2 RES [2:0] Resolution 0x0: 1000 dpi 0x1: 250 dpi 0x2: 500 dpi 0x3: 1250 dpi 0x4: 1500 dpi 0x5: 1750 dpi 0x6: 2000 dpi 1 PD Power Down 0 RES_D 0x0: 500 dpi 0x1: 1250 dpi (default) NOTE: Setting MOUSE_CTRL [5] bit to `1' will supersede and ignore MOUSE_CTRL [0] setting. 23 RUN_DOWNSHIFT Address: 0x0e Run to Rest1 Time Register Access: Read/Write Reset Value: 0x08 Bit 7 Field RUD7 6 5 4 3 2 1 0 RUD6 RUD5 RUD4 RUD3 RUD2 RUD1 RUD0 Data Type: Eight bit number. USAGE: This register sets the Run to Rest1 mode downshift time. The time is the value of this register multiply by 8 times of position mode period. Default downshift time = 8 * 8 * 4 = 256 ms NOTE: Writing into this register when the sensor itself is operating in this rest mode may result in unexpected behavior of the sensor. To avoid this from happening, below commands should be incorporated prior and after the write command into this register. w 22 40 -> write 0x40H into register 0x22H prior to writing into this register w 0e XX -> writing into this register w 22 00 -> write 0x00H into register 0x22H after writing into this register REST1_PERIOD Address: 0x0f Rest1 Period Register Access: Read/Write Reset Value: 0x01 Bit 7 Field RIP7 6 5 4 3 2 1 0 RIP6 RIP5 RIP4 RIP3 RIP2 RIP1 RIP0 Data Type: Eight bit number. USAGE: This register sets the Rest1 period. Period = (register value R1P [7:0] +1) x 10 ms (typical slow clock period). Min value for this register is 0x01. Max value is 0xFD. NOTE: Writing into this register when the sensor itself is operating in this rest mode may result in unexpected behavior of the sensor. To avoid this from happening, below commands should be incorporated prior and after the write command into this register. w 22 40 -> write 0x40H into register 0x22H prior to writing into this register w 0f XX -> writing into this register w 22 00 -> write 0x00H into register 0x22H after writing into this register 24 REST1_DOWNSHIFT Address: 0x10 Rest1 to Rest2 Downshift Time Register Access: Read/Write Reset Value: 0x1f Bit 7 Field R1D7 6 5 4 3 2 1 0 R1D6 R1D5 R1D4 R1D3 R1D2 R1D1 R1D0 Data Type: Eight bit number. USAGE: This register sets the Rest1 to Rest2 mode downshift time. Time = (register value R1D [7:0]) x (Rest1 period) x 16. Min value for this register is 0x01. NOTE: Writing into this register when the sensor itself is operating in this rest mode may result in unexpected behavior of the sensor. To avoid this from happening, below commands should be incorporated prior and after the write command into this register. w 22 40 -> write 0x40H into register 0x22H prior to writing into this register w 10 XX -> writing into this register w 22 00 -> write 0x00H into register 0x22H after writing into this register REST2_PERIOD Address: 0x11 Rest2 Period Register Access: Read/Write Reset Value: 0x09 Bit 7 Field R2P7 6 5 4 3 2 1 0 R2P6 R2P5 R2P4 R2P3 R2P2 R2P1 R2P0 Data Type: Eight bit number. USAGE: This register sets the Rest2 period. Period = (register value R2P [7:0] +1) x 10 ms (typical slow clock period). Min value for this register is 0x01. Max value is 0xFD. NOTE: Writing into this register when the sensor itself is operating in this rest mode may result in unexpected behavior of the sensor. To avoid this from happening, below commands should be incorporated prior and after the write command into this register. w 22 40 -> write 0x40H into register 0x22H prior to writing into this register w 11 XX -> writing into this register w 22 00 -> write 0x00H into register 0x22H after writing into this register 25 REST2_DOWNSHIFT Address: 0x12 Rest2 to Rest3 Downshift Time Register Access: Read/Write Reset Value: 0x2f Bit 7 Field R2D7 6 5 4 3 2 1 0 R2D6 R2D5 R2D4 R2D3 R2D2 R2D1 R2D0 Data Type: Eight bit number. USAGE: This register sets the Rest1 to Rest2 mode downshift time. Time = (register value R2D [7:0] ) x (Rest2 period) x 128. Min value for this register is 0x01. NOTE: Writing into this register when the sensor itself is operating in this rest mode may result in unexpected behavior of the sensor. To avoid this from happening, below commands should be incorporated prior and after the write command into this register. w 22 40 -> write 0x40H into register 0x22H prior to writing into this register w 12 XX -> writing into this register w 22 00 -> write 0x00H into register 0x22H after writing into this register REST3_PERIOD Address: 0x13 Rest3 Period Register Access: Read/Write Reset Value: 0x31 Bit 7 Field R3P7 6 5 4 3 2 1 0 R3P6 R3P5 R3P4 R3P3 R3P2 R3P1 R3P0 Data Type: Eight bit number. USAGE: This register sets the Rest3 period. Period = (register value R3P [7:0] +1) x 10 ms (typical slow clock period). Min value for this register is 0x01. Max value is 0xFD. NOTE: Writing into this register when the sensor itself is operating in this rest mode may result in unexpected behavior of the sensor. To avoid this from happening, below commands should be incorporated prior and after the write command into this register. w 22 40 -> write 0x40H into register 0x22H prior to writing into this register w 13 XX -> writing into this register w 22 00 -> write 0x00H into register 0x22H after writing into this register 26 PERFORMANCE Address: 0x22 Performance Register Access: Read/Write Reset Value: 0x00 Bit 7 Field RSVD 6 5 4 3 2 1 0 FORCE3 FORCE1 FORCE0 RSVD RSVD RSVD RSVD Bit(s) Field Name Description 7 RSVD Reserved 6:4 FORCE[2:0] force modes 0x0: Normal operation. 0x1: force mode rest 1. 0x2: force mode rest 2. 0x3: force mode rest 3. 0x4: force mode run 1. 0x5: force mode run 2. 0x6: force mode idle. 3:0 RSVD RESET Reserved Address: 0x3a Reset Register Access: Write Reset Value: 0x00 Bit 7 Field RST7 6 5 4 3 2 1 0 RST6 RST5 RST4 RST3 RST2 RST1 RST0 Data Type: Eight bit unsigned integer. USAGE: This register is used as chip reset by writing 0x5a into this register. NOT_REV_ID Address: 0x3f Inverted Revision ID Register Access: Read Reset Value: 0xff Bit 7 Field RRID7 6 5 4 3 2 1 0 RRID6 RRID5 RRID4 RRID3 RRID2 RRID1 RRID0 Data Type: Eight bit unsigned integer. USAGE: This register contains the inverse of the revision ID which is located at register 0x01. 27 LED_CTRL Address: 0x40 LED Control Register Access: Read/Write Reset Value: 0x00 Bit 7 Field RSVD 6 5 4 3 2 1 0 RSVD RSVD RSVD LCOF RSVD RSVD RSVD Data Type: Eight bit unsigned integer. USAGE: This register is used to control the LED operating mode. Bit(s) Field Name Description 7:4 RSVD Reserved 3 LCOF 0 : Normal operation (default) 1 : LED Continuous Off 2:0 RSVD MOTION_CTRL Reserved Address: 0x41 Motion Control Register Access: Read/Write Reset Value: 0x40 Bit 7 Field MOT_A 6 5 4 3 2 1 0 MOT_S RSVD RSVD RSVD RSVD RSVD RSVD Data Type: Eight bit unsigned integer. USAGE: This register is used to set the feature of MOTION interrupt output. If MOT_S bit is clear, the MOTION pin is levelsensitive. With active low (MOT_A bit is clear) level-sensitive configuration, the MOTION pin will be driven low when there is motion detected indicating there is motion data in DELTA_X and DELTA_Y registers. The mouse microcontroller can read MOTION_ST register, DELTA_X register, and then DELTA_Y register sequentially. After all the motion data has been read, DELTA_X and DELTA_Y registers will be zero, the MOTION pin will be driven high by the sensor. If MOT_S is set, the MOTION pin is edge sensitive. If MOT_A is also set, it means active high or rising edge triggered. Whenever there is motion detected by the sensor, a pulse (~380ns) will be sent out through this pin. This pulse can be used to trigger or wake the controller up from its sleep mode to read motion data from the sensor. The controller can then read MOTION_ST register, DELTA_X register, and then DELTA_Y register sequentially. (Refer to Motion Function for more information). Bit(s) Field Name Description 7 MOT_A MOTION Active 0 : LOW (default) 1 : HIGH 6 MOT_S MOTION Sensitivity 0 : Level sensitive 1 : Edge sensitive (default) 5:0 28 RSVD Reserved BURST_READ_FIRST Address: 0x42 Burst Read Starting Address Register Access: Read/Write Reset Value: 0x03 Bit 7 Field BM7 6 5 4 3 2 1 0 BM6 BM5 BM4 BM3 BM2 BM1 BM0 Data Type: Eight bit unsigned integer. USAGE: This register provides the starting register address the sensor will read during Burst Mode. For more information, refer to Burst Mode Operation. REST_MODE_CONFIG Address: 0x45 Rest Mode Configuration Register Access: Read/Write Reset Value: 0x00 Bit 7 Field RM1 6 5 4 3 2 1 0 RM0 RSVD RSVD RSVD RSVD RSVD RSVD Data Type: Eight bit unsigned integer. USAGE: This register is used to set the operating mode of the ADNS-3000. Bit(s) Field Name Description 7:6 RM[1:0] Sensor Operating Mode 0x00: Normal (default) 0x01: Rest 1 0x02: Rest 2 0x03: Rest 3 5:0 RSVD Reserved Read operation to REST_MODE_CONFIG indicates which mode the sensor is in. Write operation into this register will force the sensor into rest modes (Rest 1, 2 or 3). Write the value 0x40 into 0x45 register to force sensor into Rest 1, 0x80 to Rest 2 or 0xC0 to Rest 3. To get out of any forced rest mode, write 0x00 into this register to set back to normal mode. 29 MOTION_BURST Address: 0x63 Burst Read Register Access: Read Reset Value: 0x00 Bit 7 Field MB7 6 5 4 3 2 1 0 MB6 MB5 MB4 MB3 MB2 MB1 MB0 Data Type: Various. USAGE: This register is used to enable burst mode. Burst is initiated by a read of this register, which will then return continuous data starting from the address stored in BURST_READ FIRST register through BURST_READ_LAST register. Burst read must read the exact number of addresses set in order to complete the burst operation. For more information refer to Burst Mode Operation section. For product information and a complete list of distributors, please go to our web site: www.avagotech.com Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies in the United States and other countries. Data subject to change. Copyright (c) 2005-2012 Avago Technologies. All rights reserved. AV02-2727EN - April 16, 2012