All specifications aretypical at nominal input, full load at 25 °C unless otherwise stated
Cin =1000 µF, Cout =660 µF
DC-DC CONVERTERS POLA Non-isolated 1
NEW Product
File Name: pth04040.pdf Rev: 27 Jun 2006
The PTH04040 is a next generation series of non-isolated dc-dc converters offering
some of the most advanced POL features available in the industry. The primary new
feature provides for sequencing between multiple modules, a function, which is
becoming a necessity for powering advanced silicon including DSP’s, FPGAs and
ASIC’s requiring controlled power-up and power-down Other industry leading
features include margin up/down controls and efficiencies up to 96%. The
PTH04040 has an input voltage of 2.95 Vdc to 5.5 Vdc and offers a wide 0.8 Vdc to
2.5 Vdc output voltage range with up to 60 A output current, which allows for
maximum design flexibility and a pathway for future upgrades.
60 A output current(7)
3.3/5 V input voltage (2.95 Vdc to 5.5 Vdc)
Wide-output voltage adjust (0.8 Vdc to 2.5 Vdc)
Auto-track™ sequencing*
Margin up/down controls
Efficiencies up 93%
Output ON/OFF inhibit
Differential remote sense
Programmable input Under-Voltage Lockout (UVLO)
Point-of-Load-Alliance (POLA) compatible
Available RoHS compliant
*Auto-track™ is a trade mark of
Texas Instruments
2YEAR WARRANTY
PTH04040
3.3/5 Vin single output
SPECIFICATIONS
International Safety Standard Approvals
UL/cUL CAN/CSA-C22.2 No. 60950
File No. E174104
TÜV Product Service (EN60950) Certificate No. B 04 06 38572 044
CB Report and Certificate to IEC60950, Certificate No. US/8292/UL
EMC CHARACTERISTICS
Electrostatic discharge EN61000-4-2, IEC801-2
Conducted immunity EN61000-4-6
Radiated immunity EN61000-4-3
GENERAL SPECIFICATIONS
Efficiency See Table on page 2 93% max.
Insulation voltage Non-isolated
Switching frequency 825 MHz
Approvals and EN60950
standards UL/cUL60950
Material flammability UL94V-0
Dimensions (L x W x H) 51.94 x 26.54 x 9.07 mm
2.045 x 1.045 x 0.357 in
Weight 22.5 g (79 oz)
MTBF Telcordia SR-332 2,100,000 hours
ENVIRONMENTAL SPECIFICATIONS
Thermal performance Operating ambient, -40 ºC to +85 ºC
temperature
Non-operating -40 ºC to +125 ºC
MSL (‘Z’ suffix only) JEDEC J-STD-020C Level 3
PROTECTION
Overcurrent Auto reset 90 A
Thermal Auto recovery
OUTPUT SPECIFICATIONS
Voltage adjustability 2.95 < Vi<4.5 V 0.8-1.65 Vdc
4.50 < Vi<5.5 V 0.8-2.5 Vdc
Setpoint accuracy (See Note 1) ±2.0% Vo
Line regulation ±5 mV typ.
Load regulation ±5 mV typ.
Total regulation (See Note 1) ±3.0% Vo
Minimum load 0 A
Ripple and noise 20 MHz bandwidth 15 mV typ.
Transient response 100 µs recovery time
(See Note 4) Overshoot/undershoot 200 mV
Margin adjustment (See Note 8) ±5.0% Vo
INPUT SPECIFICATIONS
Input voltage range (See Notes 3, 5) 2.95-5.5 Vdc
Input standby current 60 mA typ.
Remote ON/OFF (See Note 5) Negative logic
Undervoltage lockout (See Note 6) 6.6-7.5 Vdc typ.
(Pin 8 open) On threshold 2.60 V
Hysteresis 0.6 V
Track input current Pin 18 (See Note 2) -0.11 mA
File Name: pth04040.pdf Rev: 27 Jun 2006
For the most current data and application support visit www.artesyn.com/powergroup/products.htm
DC-DC CONVERTERS POLA Non-isolated 2
NEW Product
NNootteess
1The set-point voltage tolerance is affected by the tolerance and stability
of RSET. The stated limit is unconditionally met if RSET has a tolerance of
1% with 100 ppm/ºC or better temperature stability.
2This control pin has an internal pull-up to Vin nominal. If it is left open-
circuit the module will operate when input power is applied. A small low-
leakage (<100 nA) MOSFET is recommend for control. For further
information, consult Application Note 192.
3A 1000 µF input capacitor is required for proper operation. The capacitor
must be rated for a minimum of 400 mA rms of ripple current.
4This is with a 1 A/µs loadstep, 50 to 100% Iomax. Co= 660 µF.
5The minimum input voltage is 2.95 V or 1.34 x Vo, whichever is greater.
6These are default voltages. They may be adjusted using the ‘UVLO Prog.’
control input. Consult Application Note 192 for further details.
7See Figures 1 and 2 for safe operating curves. All power pins must be
used.
8A small low-leakage (<100 nA) MOSFET is recommended to control this
pin. The opencircuit voltage is less than 1 Vdc.
9To order Pb-free (RoHS compatible) surface-mount parts replace the
mounting option ‘S’ with ‘Z’, e.g. PTH04040WAZ. To order Pb-free
(RoHS compatible) through-hole parts replace the mounting option ‘H’
with ‘D’, e.g. PTH04040WAD.
10 NOTICE: Some models do not support all options. Please contact your
local Artesyn representative or use the on-line model number search tool at
http://www.artesyn.com/powergroup/products.htm to find a suitable
alternative.
OUTPUT INPUT OUTPUT OUTPUT OUTPUT EFFICIENCY REGULATION MODEL
POWER VOLTAGE VOLTAGE CURRENT CURRENT (MAX.) LINE LOAD NUMBER (9,10)
(MAX.) (MIN.) (MAX.) (7)
150 W 2.95-5.5 Vdc 0.8-2.5 Vdc 0 A 60 A 93% ±5 mV ±5 mV PTH04040W
PTH04040
3.3/5 Vin single output
PTH04040WAS
Part Number System with Options
Product Family
Point of Load Alliance
Compatible
Output Current
04 = 60 A
Input Voltage
04 = 2.95 Vdc to 5.5 Vdc
Mechanical Package
Always 0 Output Voltage Code
W = Wide
Pin Option
A = Through-Hole Std. Pin Length (0.140”)
A = Surface-Mount Tin/Lead Solder Ball
Mounting Option (9)
D = Horizontal Through-Hole (Matte Sn)
H = Horizontal Through-Hole (Sn/Pb)
S = Surface-Mount (63/37 Sn/Pb
pin solder material)
Z = Surface-Mount (96.5/3.0/0.5 Sn/Ag/Cu
pin solder material)
The ultra-wide output voltage trim range offers major advantages to users who
select the PTH04040W. It is no longer necessary to purchase a variety of
modules in order to cover different output voltages. The output voltage can be
trimmed in a range of 0.8 Vdc to 2.5 Vdc. When the PTH04040W converter
leaves the factory the output has been adjusted to the default voltage of 0.8 V.
OOuuttppuutt VVoollttaaggee AAddjjuussttmmeenntt ooff tthhee PPTTHH0044004400WW SSeerriieess
EFFICIENCY TABLE (Io= 45A) Vin = 5 V
OUTPUT VOLTAGE EFFICIENCY
Vo = 2.5 V 93%
Vo = 1.8 V 90%
Vo = 1.5 V 88%
Vo = 1.2 V 86%
File Name: pth04040.pdf Rev: 27 Jun 2006
For the most current data and application support visit www.artesyn.com/powergroup/products.htm
DC-DC CONVERTERS POLA Non-isolated 3
NEW Product
PTH04040
3.3/5 Vin single output
20
30
40
50
60
80
Nat conv
200 LFM
400 LFM
90
70
TEMPERATURE (ºC)
OUTPUT CURRENT (A)
010 20 30 40 50 60
20
30
40
50
60
80
Nat conv
200 LFM
400 LFM
90
70
TEMPERATURE (ºC)
OUTPUT CURRENT (A)
010 20 30 40 50 60
Figure 1 - Safe Operating Area
Vin = 3.3 V (See Note A) Figure 2 - Safe Operating Area
Vin = 5 V (See Note A)
NNootteess
ASOA curves represent the conditions at which internal components are
within the Artesyn derating guidelines.
BCharacteristic data has been developed from actual products tested at
25 °C. This data is considered typical data for the converter.
60
70
80
90
100
EFFICIENCY (%)
OUTPUT CURRENT (A)
500 10 20 30 40 50
2.5V
1.8V
Vout
60
1.5V
1.2V
Figure 3 - Efficiency vs Load Current
Vin = 5 V (See Note B)
60
70
80
90
100
EFFICIENCY (%)
OUTPUT CURRENT (A)
500 10 20 30 40 50
1.5V
1.0V
Vout
60
Figure 4 - Efficiency vs Load Current
Vin = 3.3 V (See Note B)
19 20 18 11
9
12
15
14
17
16
13105317
8
6
4
2
GND GND
Inhibit Vo Adj
-Sense
+Sense
Vo
Vin
UVLO
Margin
Down
Margin
up Track
Ci
1,000µF
(Required)
C
o1
330µF
Co2
330µF
Vin Vo
Rset
1%
0.05W
Figure 5 - Standard Application
File Name: pth04040.pdf Rev: 27 Jun 2006
Please consult our website for the following items: 4 Application Note www.artesyn.com
Datasheet © Artesyn Technologies
®
2006
The information and specifications contained in this datasheet are believed to be correct at time of publication. However, Artesyn Technologies accepts no responsibility for consequences arising
from printing errors or inaccuracies. The information and specifications contained or described herein are subject to change in any manner at any time without notice. No rights under any patent
accompany the sale of any such product(s) or information contained herein.
For the most current data and application support visit www.artesyn.com/powergroup/products.htm
DC-DC CONVERTERS POLA Non-isolated 4
NEW Product
PTH04040
3.3/5 Vin single output
Dimensions in Inches (mm)
Tolerances (unless otherwise specified)
2 Places ±0.030 (±0.76)
3 Places ±0.010 (±0.25)
0.250
2 Places
(6.35)
1
0.375
(9.52)
2
0.060 (1.52)
0.125 (3.17)
(1.52)
6 Places
3 Places
0.125
(3.17)
0.925
(23.49)
0.060
20
18
19
17 16 1415
0.375
SIDE VIEW
TOP VIEW
(9.52)
0.375
34
(9.52)
0.375
567
1113 12 10 9
(9.52)
0.375
2.045 (51.94)
1.875 (47.62)
(9.52)
0.375
8
MAX.
(9.52)
0.357 (9.07)
0.125 (3.17)
1.045
(26.54)
0.140
(3.55)
Bottom side
Clearance
Host Board
20 Places
Lowest
Component
(0.25)
0.010 MIN.
ø0.040 (1.02)
Dimensions in Inches (mm)
Tolerances (unless otherwise specified)
2 Places ±0.030 (±0.76)
3 Places ±0.010 (±0.25)
2 Places TOP VIEW
(6.35)
0.250
(23.49)
21
(9.52)
0.375
6 Places
0.060
(1.52)
0.060 (1.52)
0.125 (3.17)
0.925 3 Places
0.125
(3.17)
17
20
18
19
16 15
0.375
(9.52)
0.375
(9.52)
43
(9.52)
0.375
57
6
0.125 (3.17)
(9.52)
1213141011
1.875 (47.62)
2.045 (51.94)
0.375 (9.52)
0.375
8
9
SIDE VIEW
MAX.
ø
0.040 (1.02)
Solder Ball
on customer board
20 Places
0.370 (9.40) After solder reflow
1.045
(26.54)
Figure 6 - Plated Through-Hole Mechanical Drawing
Figure 7 - Surface-Mount Mechanical Drawing
*Denotes negative logic:
Open = Normal operation
Ground = Function active
PIN CONNECTIONS
PIN NO. FUNCTION
1 Ground
2Vin
3 Ground
4Vin
5 Ground
6 Vin
7 Inhibit*
8 UVLO Programming
9 Vout
10 Ground
11 Vs+
12 Vout
13 Ground
14 Vs-
15 Vout
16 Ground
17 Adjust
18 Track
19 Margin Up*
20 Margin Down*