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FEATURES
APPLICATIONS
DESCRIPTION
APPLICATION CIRCUIT
_
+
IN–
IN+
PWM H–
Bridge
VO+
VO–
Internal
Oscillator CS
To Battery
VDD
GND
Bias
Circuitry
RI
RI
+
–
Differential
Input
TPA2005D1
SHUTDOWN
Actual Solution Size
2.5 mm
CS
RI
RI
6 mm
(MicroStar Junior BGA)
TPA2005D1-Q1
SLOS474 – AUGUST 2005
1.4-W MONO FILTER-FREE CLASS-D AUDIO POWER AMPLIFIER
•Space Saving Package•Qualification in Accordance With AEC-Q100
(1)
– 3 mm x 3 mm QFN package (DRB)•Qualified for Automotive Applications – 2,5 mm x 2,5 mm MicroStar Junior™BGA Package (ZQY)•Customer-Specific Configuration Control CanBe Supported Along With Major-Change – 3 mm x 5 mm MSOP PowerPAD™ PackageApproval (DGN)•1.4 W Into 8 ΩFrom a 5-V Supply at – TPA2010D1 Available in 1,45 mm x 1,45 mmTHD = 10% (Typ) WCSP (YZF)•Maximum Battery Life and Minimum Heat– Efficiency With an 8- ΩSpeaker:
•Ideal for Wireless or Cellular Handsets and•84% at 400 mW
PDAs•79% at 100 mW– 2.8-mA Quiescent Current– 0.5- µA Shutdown Current
The TPA2005D1 is a 1.4-W high-efficiency filter-freeclass-D audio power amplifier in a MicroStar Junior™•Only Three External Components
BGA, QFN, or MSOP package that requires only– Optimized PWM Output Stage Eliminates LC
three external components.Output Filter
Features like 84% efficiency, -71-dB PSRR at– Internally Generated 250-kHz Switching
217 Hz, improved RF-rectification immunity, andFrequency Eliminates Capacitor and
15-mm
2
total PCB area make the TPA2005D1 idealResistor
for cellular handsets. A fast start-up time of 9 ms with– Improved PSRR (-71 dB at 217 Hz) and
minimal pop makes the TPA2005D1 ideal for PDAWide Supply Voltage (2.5 V to 5.5 V)
applications.Eliminates Need for a Voltage Regulator
In cellular handsets, the earpiece, speaker phone,– Fully Differential Design Reduces RF
and melody ringer can each be driven by theRectification and Eliminates Bypass
TPA2005D1. The device allows independent gainCapacitor
control by summing the signals from each function,while minimizing noise to only 48 µV
RMS
.– Improved CMRR Eliminates Two InputCoupling Capacitors(1) Contact factory for details. Q100 qualification data availableon request.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of TexasInstruments semiconductor products and disclaimers thereto appears at the end of this data sheet.MicroStar Junior, PowerPAD are trademarks of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Copyright © 2005, Texas Instruments IncorporatedProducts conform to specifications per the terms of the TexasInstruments standard warranty. Production processing does notnecessarily include testing of all parameters.
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ABSOLUTE MAXIMUM RATINGS
RECOMMENDED OPERATING CONDITIONS
DISSIPATION RATINGS
TPA2005D1-Q1
SLOS474 – AUGUST 2005
These devices have limited built-in ESD protection. The leads should be shorted together or the deviceplaced in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.
ORDERING INFORMATION
T
A
PACKAGE PART NUMBER SYMBOL
MicroStar Junior™ (GQY) TPA2005D1GQYR
(1)
PREVIEWMicroStar Junior™ (ZQY)
(2)
TPA2005D1ZQYR
(1)
PREVIEW-40 °C to 85 °C
8-pin QFN (DRB) TPA2005D1DRBR
(1)
BIQ8-pin MSOP (DGN) TPA2005D1DGN(R) PREVIEW
(1) The GQY, ZQY, and DRB packages are only available taped and reeled. An R at the end of the part number indicates the devices aretaped and reeled.(2) The GQY is the standard MicroStar Junior™ package. The ZQY is lead-free option, and is qualified for 260 °lead-free assembly.
over operating free-air temperature range unless otherwise noted
(1)
UNIT
In active mode -0.3 V to 6 VV
DD
Supply voltage
(2)
In SHUTDOWN mode -0.3 V to 7 VV
I
Input voltage -0.3 V to V
DD
+ 0.3 VContinuous total power dissipation See Dissipation Rating TableT
A
Operating free-air temperature -40 °C to 85 °CT
J
Operating junction temperature -40 °C to 150 °CT
stg
Storage temperature -65 °C to 85 °CLead temperature 1,6 mm (1/16 inch) from case for 10 seconds 260 °C
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratingsonly, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operatingconditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.(2) For the MSOP (DGN) package option, the maximum V
DD
should be limited to 5 V if short-circuit protection is desired.
MIN NOM MAX UNIT
V
DD
Supply voltage 2.5 5.5 VV
IH
High-level input voltage SHUTDOWN 2 V
DD
VV
IL
Low-level input voltage SHUTDOWN 0 0.7 VR
I
Input resistor Gain ≤20 V/V (26 dB) 15 k ΩV
IC
Common-mode input voltage range V
DD
= 2.5 V, 5.5 V, CMRR ≤-49 dB 0.5 V
DD
-0.8 VT
A
Operating free-air temperature -40 85 °C
DERATING T
A
≤25 °C T
A
= 70 °C T
A
= 85 °CPACKAGE
FACTOR POWER RATING POWER RATING POWER RATING
GQY, ZQY 16 mW/ °C 2 W 1.28 W 1.04 WDRB 21.8 mW/ °C 2.7 W 1.7 W 1.4 WDGN 17.1 mW/ °C 2.13 W 1.36 W 1.11 W
2
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ELECTRICAL CHARACTERISTICS
V
V
2142 k
RI
2158 k
RI
2150 k
RI
OPERATING CHARACTERISTICS
TPA2005D1-Q1
SLOS474 – AUGUST 2005
T
A
= -40 °C to 85 °C (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Output offset voltage|V
OS
| V
I
= 0 V, A
V
= 2 V/V, V
DD
= 2.5 V to 5.5 V 25 mV(measured differentially)PSRR Power-supply rejection ratio V
DD
= 2.5 V to 5.5 V -75 -55 dBV
DD
= 2.5 V to 5.5 V, T
A
= 25 °C -68 -49CMRR Common-mode rejection ratio V
IC
= V
DD
/2 to 0.5 V, dBT
A
= -40 °C to 85 °C -35V
IC
= V
DD
/2 to V
DD
- 0.8 V|I
IH
| High-level input current V
DD
= 5.5 V, V
I
= 5.8 V 50 µA|I
IL
| Low-level input current V
DD
= 5.5 V, V
I
= 0.3 V 4 µAV
DD
= 5.5 V, no load 3.4 4.5I
(Q)
Quiescent current V
DD
= 3.6 V, no load 2.8 mAV
DD
= 2.5 V, no load 2.2 3.2I
(SD)
Shutdown current V
(SHUTDOWN)
= 0.8 V, V
DD
= 2.5 V to 5.5 V 0.5 2 µAV
DD
= 2.5 V 770Static drain-sourcer
DS(on)
V
DD
= 3.6 V 590 m Ωon-state resistance
V
DD
= 5.5 V 500Output impedance in
V
(SHUTDOWN)
= 0.8 V >1 k ΩSHUTDOWN
f
(sw)
Switching frequency V
DD
= 2.5 V to 5.5 V 200 250 300 kHz
Gain
T
A
= 25 °C, Gain = 2 V/V, R
L
= 8 Ω(unless otherwise noted)
PARAMETER TEST CONDITIOINS MIN TYP MAX UNIT
V
DD
= 5 V 1.18THD + N= 1%, f = 1 kHz,
V
DD
= 3.6 V 0.58 WR
L
= 8 Ω
V
DD
= 2.5 V 0.26P
O
Output power
V
DD
= 5 V 1.45THD + N= 10%, f = 1 kHz,
V
DD
= 3.6 V 0.75 WR
L
= 8 Ω
V
DD
= 2.5 V 0.35P
O
= 1 W, f = 1 kHz, R
L
= 8 ΩV
DD
= 5 V 0.18%Total harmonic distortion plusTHD+N P
O
= 0.5 W, f = 1 kHz, R
L
= 8 ΩV
DD
= 3.6 V 0.19%noise
P
O
= 200 mW, f = 1 kHz, R
L
= 8 ΩV
DD
= 2.5 V 0.20%f = 217 Hz, V
(RIPPLE)
= 200 mV
pp
,k
SVR
Supply ripple rejection ratio V
DD
= 3.6 V -71 dBInputs ac-grounded with C
i
= 2 µFSNR Signal-to-noise ratio P
O
= 1 W, R
L
= 8 ΩV
DD
= 5 V 97 dBNo weighting 48V
DD
= 3.6 V, f = 20 Hz to 20 kHz,V
n
Output voltage noise µV
RMSInputs ac-grounded with C
i
= 2 µF
A weighting 36CMRR Common-mode rejection ratio V
IC
= 1 V
pp
, f = 217 Hz V
DD
= 3.6 V -63 dBZ
I
Input impedance 142 150 158 k ΩStart-up time from shutdown V
DD
= 3.6 V 9 ms
3
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PIN ASSIGNMENTS
(A1)
(B1) (A4)
(C4)
(D4)
(SIDE VIEW)
MicroStar Junior (GQY) PACKAGE
(TOP VIEW)
NC VDD
SHUTDOWN
IN+
IN−
VO−
VDD
VO+
(C1)
(D1)
(B4)
GND
8
SHUTDOWN
NC
IN+
IN−
VO−
GND
VDD
VO+
8-PIN QFN (DRB) PACKAGE
(TOP VIEW)
7
6
5
1
2
3
4
NC − No internal connection
VO−
GND
VDD
VO+
8
7
6
5
1
2
3
4
SHUTDOWN
NC
IN+
IN−
8-PIN MSOP (DGN) PACKAGE
(TOP VIEW)
_
+_
+_
+_
+
150 kΩ
150 kΩ
_
+
_
+
Deglitch
Logic
Deglitch
Logic
Gate
Drive
Gate
Drive
VDD
Short
Circuit
Detect
Startup
& Thermal
Protection
Logic
Ramp
Generator
Biases
and
References
TTL
Input
Buffer
SD
Gain = 2 V/V B4, C4
VDD
A4VO−
D4VO+
†GND
D1
IN−
C1
IN+
A1
SHUTDOWN
†A2, A3, B3, C2, C3, D2, D3
(terminal labels for MicroStar Junior package)
TPA2005D1-Q1
SLOS474 – AUGUST 2005
A. The shaded terminals are used for electrical and thermal connections to the ground plane. All of the shaded terminalsmust be electrically connected to ground. No connect (NC) terminals still need a pad and trace.B. The thermal pad of the DRB and DGN packages must be electrically and thermally connected to a ground plane.
Terminal Functions
TERMINAL
I/O DESCRIPTIONNAME ZQY, GQY DRB, DGN
IN- D1 4 I Negative differential inputIN+ C1 3 I Positive differential inputV
DD
B4, C4 6 I Power supplyV
O+
D4 5 O Positive BTL outputA2, A3, B3,GND C2, C3, D2, 7 I High-current groundD3V
O-
A4 8 O Negative BTL outputSHUTDOWN A1 1 I Shutdown terminal (active low logic)NC B1 2 No internal connectionThermal Pad Must be soldered to a grounded pad on the PCB.
FUNCTIONAL BLOCK DIAGRAM
4
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TYPICAL CHARACTERISTICS
Table of Graphs
TEST SET-UP FOR GRAPHS
TPA2005D1
IN+
IN−
OUT+
OUT−
VDD GND
CI
CI
RI
RI
Measurement
Output
+
−
1 µF
+
−
VDD
Load 30 kHz
Low Pass
Filter
Measurement
Input
+
−
TPA2005D1-Q1
SLOS474 – AUGUST 2005
FIGURE
Efficiency vs Output power 1, 2P
D
Power dissipation vs Output power 3Supply current vs Output power 4, 5I
(Q)
Quiescent current vs Supply voltage 6I
(SD)
Shutdown current vs Shutdown voltage 7vs Supply voltage 8P
O
Output power
vs Load resistance 9, 10vs Output power 11, 12THD+N Total harmonic distortion plus noise vs Frequency 13, 14, 15, 16vs Common-mode input voltage 17vs Frequency 18, 19, 20k
SVR
Supply-voltage rejection ratio
vs Common-mode input voltage 21vs Time 22GSM power-supply rejection
vs Frequency 23vs Frequency 24CMRR Common-mode rejection ratio
vs Common-mode input voltage 25
A. C
I
was shorted for any common-mode input voltage measurement.B. A 33- µH inductor was placed in series with the load resistor to emulate a small speaker for efficiency measurements.C. The 30-kHz low-pass filter is required, even if the analyzer has a low-pass filter. An RC filter (100 Ω, 47 nF) is usedon each output for the data sheet graphs.
5
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0
10
20
30
40
50
60
70
80
90
0 0.2 0.4 0.6 0.8 1 1.2
VDD = 2.5 V,
RL= 8 Ω, 33 µH
VDD = 5 V,
RL = 8 Ω, 33 µH
Class-AB,
VDD = 5 V,
RL = 8 Ω
PO - Output Power - W
Efficiency - %
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0 0.2 0.4 0.6 0.8 1 1.2
- Power Dissipation - WPD
PO - Output Power - W
Class-AB, VDD = 5 V, RL = 8 Ω
Class-AB,
VDD = 3.6 V,
RL = 8 Ω
VDD = 3.6 V,
RL = 8 Ω, 33 µH
VDD = 5 V,
RL = 8 Ω, 33 µH
0
10
20
30
40
50
60
70
80
90
100
0 0.1 0.2 0.3 0.4 0.5 0.6
PO - Output Power - W
Efficiency - %
VDD = 3.6
RL = 32 Ω, 33 µH
RL = 16 Ω, 33 µH
RL = 8 Ω, 33 µH
Class-AB,
RL = 8 Ω
0
50
100
150
200
250
300
0 0.2 0.4 0.6 0.8 1 1.2
PO - Output Power - W
VDD = 2.5 V,
RL = 8 Ω, 33 µH
VDD = 3.6 V,
RL = 8 Ω, 33 µH
VDD = 5 V,
RL = 8 Ω, 33 µH
Supply Current - mA
0
50
100
150
200
250
0 0.1 0.2 0.3 0.4 0.5 0.6
RL = 8 Ω, 33 µH
VDD = 3.6 V
RL = 32 Ω, 33 µH
Supply Current - mA
PO - Output Power - W
2
2.2
2.4
2.6
2.8
3
3.2
3.4
3.6
3.8
2.5 3 3.5 4 4.5 5 5.5
I(Q) − Quiescent Current − mA
VDD − Supply Voltage − V
No Load
RL = 8 Ω, 33 µH
2.5 3 3.5 4 4.5 5
VDD - Supply Voltage - V
- Output Power - WPO
RL = 8 Ω
f = 1 kHz
Gain = 2 V/V
THD+N = 1%
THD+N = 10%
0
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8
VDD = 2.5 V
VDD = 3.6 V
VDD = 5 V
Shutdown Voltage - V
- Shutdown Current -
I(SD) Aµ
0
0.2
0.4
0.6
0.8
1
1.2
1.4
8 12 16 20 28
RL - Load Resistance - Ω
- Output Power - WPO
3224
f = 1 kHz
THD+N = 1%
Gain = 2 V/V
VDD = 2.5 V
VDD = 3.6 V
VDD = 5 V
TPA2005D1-Q1
SLOS474 – AUGUST 2005
EFFICIENCY EFFICIENCY POWER DISSIPATIONvs vs vsOUTPUT POWER OUTPUT POWER OUTPUT POWER
Figure 1. Figure 2. Figure 3.
SUPPLY CURRENT SUPPLY CURRENT QUIESCENT CURRENTvs vs vsOUTPUT POWER OUTPUT POWER SUPPLY VOLTAGE
Figure 4. Figure 5. Figure 6.
SHUTDOWN CURRENT OUTPUT POWER OUTPUT POWERvs vs vsSHUTDOWN VOLTAGE SUPPLY VOLTAGE LOAD RESISTANCE
Figure 7. Figure 8. Figure 9.
6
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0
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
8 12 16 20 24 28 32
VDD = 5 V
VDD = 3.6 V
VDD = 2.5 V
RL - Load Resistance - Ω
- Output Power - WPO
f = 1 kHz
THD+N = 10%
Gain = 2 V/V
0.1
30
0.2
0.5
1
2
5
10
20
0.01 20.1 1
PO − Output Power − W
THD+N − Total Harmonic Distortion + Noise − %
5 V
3.6 V
2.5 V
RL = 8 Ω,
f = 1 kHz,
Gain = 2 V/V
0.1
30
0.2
0.5
1
2
5
10
20
0.01 20.1 1
PO − Output Power − W
THD+N − Total Harmonic Distortion + Noise − %
5 V
3.6 V
2.5 V
RL = 16 Ω,
f = 1 kHz,
Gain = 2 V/V
0.008
10
0.02
0.05
0.1
0.2
0.5
1
2
5
20 100 1 k 20 k
f − Frequency − Hz
THD+N − Total Harmonic Distortion + Noise − %
50 mW
250 mW
1 W
VDD = 5 V
CI = 2 µF
RL = 8 Ω
Gain = 2 V/V
1
2
5
10
0.5
0.2
0.1
0.05
0.02
0.0120 100 1 k 20 k
f − Frequency − Hz
THD+N − Total Harmonic Distortion + Noise − %
VDD = 3.6 V
CI = 2 µF
RL = 8 Ω
Gain = 2 V/V
500 mW 25 mW
125 mW
10
5
2
1
0.5
0.2
0.1
0.05
0.02
0.0120 100 1 k 20 k
f − Frequency − Hz
THD+N − Total Harmonic Distortion + Noise − %
15 mW
VDD = 2.5 V
CI = 2 µF
RL = 8 Ω
Gain = 2 V/V
75 mW
200 mW
0.1
1
10
0 0.5 1 1.5 2 2.5 3 3.5
VDD = 2.5 V
VDD = 3.6 V
f = 1 kHz
PO = 200 mW
VIC - Common Mode Input Voltage - V
THD+N - Total Harmonic Distortion + Noise - %
−80
−70
−60
−50
−40
−30
−20
−10
0
20 100 1 k 20 k
f − Frequency − Hz
− Supply Voltage Rejection Ratio − dBkSVR
CI = 2 µF
RL = 8 Ω
Vp-p = 200 mV
Inputs ac-Grounded
Gain = 2 V/V
VDD = 5 V
VDD = 3.6 V
VDD =2. 5 V
VDD = 3.6 V
CI = 2 µF
RL = 16 Ω
Gain = 2 V/V
f − Frequency − Hz
THD+N − Total Harmonic Distortion + Noise − %
1
2
5
10
0.5
0.2
0.1
0.05
0.02
0.0120 100 1 k 20 k
15 mW
75 mW
200 mW
TPA2005D1-Q1
SLOS474 – AUGUST 2005
OUTPUT POWER TOTAL HARMONIC DISTORTION + TOTAL HARMONIC DISTORTION +vs NOISE NOISELOAD RESISTANCE vs vsOUTPUT POWER OUTPUT POWER
Figure 10. Figure 11. Figure 12.
TOTAL HARMONIC DISTORTION + TOTAL HARMONIC DISTORTION + TOTAL HARMONIC DISTORTION +NOISE NOISE NOISEvs vs vsFREQUENCY FREQUENCY FREQUENCY
Figure 13. Figure 14. Figure 15.
TOTAL HARMONIC DISTORTION + TOTAL HARMONIC DISTORTION + SUPPLY-VOLTAGE REJECTIONNOISE NOISE RATIOvs vs vsFREQUENCY COMMON MODE INPUT VOLTAGE FREQUENCY
Figure 16. Figure 17. Figure 18.
7
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−80
−70
−60
−50
−40
−30
−20
−10
0
f − Frequency − Hz
− Supply Voltage Rejection Ratio − dBkSVR
20 100 1 k 20 k
Gain = 5 V/V
CI = 2 µF
RL = 8 Ω
Vp-p = 200 mV
Inputs ac-Grounded
VDD = 5 V
VDD = 2. 5 V
VDD = 3.6 V
−100
−90
−80
−70
−60
−50
−40
−30
−20
−10
0
f − Frequency − Hz
− Supply Voltage Rejection Ratio − dBkSVR
VDD = 3.6 V
CI = 2 µF
RL = 8 Ω
Inputs Floating
Gain = 2 V/V
20 100 1 k 20 k
-90
-80
-70
-60
-50
-40
-30
-20
-10
0
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5
VIC - Common Mode Input Voltage - V
f = 217 Hz
RL = 8 Ω
Gain = 2 V/V
VDD = 2.5 V
- Supply Voltage Rejection Ratio - dBkSVR
VDD = 3.6 V
VDD = 5 V
C1 - Duty
12.6%
C1 -
Frequency
216.7448 Hz
C1 - Amplitude
512 mV
C1 - High
3.544 V
Voltage - V
t - Time - ms
VDD
VOUT
-150
-100
-50
0 400 800 1200 1600 2000
-150
-100
-50
0
0
f - Frequency - Hz
- Output Voltage - dBVVO
- Supply Voltage - dBVVDD
VDD Shown in Figure 22
CI = 2 µF,
Inputs ac-grounded
Gain = 2V/V
−70
−60
−50
−40
−30
−20
−10
0
f − Frequency − Hz
CMRR − Common Mode Rejection Ratio − dB
20 100 1 k 20 k
VDD = 2.5 V to 5 V
VIC = 1 Vp−p
RL = 8 Ω
Gain = 2 V/V
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
0
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5
RL = 8 Ω
Gain = 2 V/V
VIC - Common Mode Input Voltage - V
CMRR - Common Mode Rejection Ratio - dB
VDD = 5 V
VDD = 2.5 V VDD = 3.6 V
TPA2005D1-Q1
SLOS474 – AUGUST 2005
SUPPLY-VOLTAGE REJECTION SUPPLY-VOLTAGE REJECTION SUPPLY-VOLTAGE REJECTIONRATIO RATIO RATIOvs vs vsFREQUENCY FREQUENCY COMMON-MODE INPUT VOLTAGE
Figure 19. Figure 20. Figure 21.
GSM POWER-SUPPLY REJECTION GSM POWER-SUPPLY REJECTIONvs vsTIME FREQUENCY
Figure 22. Figure 23.
COMMON-MODE REJECTION RATIO COMMON-MODE REJECTION RATIOvs vsFREQUENCY COMMON-MODE INPUT VOLTAGE
Figure 24. Figure 25.
8
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APPLICATION INFORMATION
FULLY DIFFERENTIAL AMPLIFIER
Advantages of Fully Differential Amplifiers
COMPONENT SELECTION
_
+
IN–
IN+
PWM H–
Bridge
VO+
VO–
Internal
Oscillator CS
To Battery
VDD
GND
Bias
Circuitry
RI
RI
+
–
Differential
Input
TPA2005D1
Filter-Free Class D
SHUTDOWN
TPA2005D1-Q1
SLOS474 – AUGUST 2005
The TPA2005D1 is a fully differential amplifier with differential inputs and outputs. The fully differential amplifierconsists of a differential amplifier and a common-mode amplifier. The differential amplifier ensures that theamplifier outputs a differential voltage on the output that is equal to the differential input times the gain. Thecommon-mode feedback ensures that the common-mode voltage at the output is biased around V
DD
/2,regardless of the common-mode voltage at the input. The fully differential TPA2005D1 can still be used with asingle-ended input; however, the TPA2005D1 should be used with differential inputs when in a noisyenvironment, like a wireless handset, to ensure maximum noise rejection.
•Input-coupling capacitors not required:– The fully differential amplifier allows the inputs to be biased at a voltage other than midsupply. Forexample, if a codec has a midsupply lower than the midsupply of the TPA2005D1, the common-modefeedback circuit adjusts, and the TPA2005D1 outputs still is biased at midsupply of the TPA2005D1. Theinputs of the TPA2005D1 can be biased from 0.5 V to V
DD
- 0.8 V. If the inputs are biased outside of thatrange, input-coupling capacitors are required.•Midsupply bypass capacitor, C
(BYPASS)
, not required:– The fully differential amplifier does not require a bypass capacitor. This is because any shift in themidsupply affects both positive and negative channels equally and cancels at the differential output.•Better RF-immunity:
– GSM handsets save power by turning on and shutting off the RF transmitter at a rate of 217 Hz. Thetransmitted signal is picked-up on input and output traces. The fully differential amplifier cancels the signalmuch better than the typical audio amplifier.
Figure 26 shows the TPA2005D1 typical schematic with differential inputs, and Figure 27 shows the TPA2005D1with differential inputs and input capacitors, and Figure 28 shows the TPA2005D1 with single-ended inputs.Differential inputs should be used whenever possible, because the single-ended inputs are much moresusceptible to noise.
Table 1. Typical Component Values
REF DES VALUE EIA SIZE MANUFACTURER PART NUMBER
R
I
150 k Ω(±0.5%) 0402 Panasonic ERJ2RHD154VC
S
1µF (+22%, -80%) 0402 Murata GRP155F50J105ZC
I
(1)
3.3 nF ( ±10%) 0201 Murata GRP033B10J332K
(1) C
I
is needed only for single-ended input or if V
ICM
is not between 0.5 V and V
DD
- 0.8 V. C
I
= 3.3 nF (with R
I
= 150 k Ω) gives ahigh-pass corner frequency of 321 Hz.
Figure 26. Typical TPA2005D1 Application Schematic With Differential Input for a Wireless Phone
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_
+
IN–
IN+
PWM H–
Bridge
VO+
VO–
Internal
Oscillator CS
To Battery
VDD
GND
Bias
Circuitry
RI
RI
Differential
Input
TPA2005D1
Filter-Free Class D
SHUTDOWN
CI
CI
_
+
IN–
IN+
PWM H–
Bridge
VO+
VO–
Internal
Oscillator CS
To Battery
VDD
GND
Bias
Circuitry
RI
RI
Single-ended
Input
TPA2005D1
Filter-Free Class D
SHUTDOWN
CI
CI
TPA2005D1-Q1
SLOS474 – AUGUST 2005
Figure 27. TPA2005D1 Application Schematic With Differential Input and Input Capacitors
Figure 28. TPA2005D1 Application Schematic With Single-Ended Input
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Input Resistors (R
I
)
Gain 2150 k
RIV
V
(1)
Decoupling Capacitor (C
S
)
Input Capacitors (C
I
)
fc1
2RICI
(2)
CI1
2RIfc
(3)
SUMMING INPUT SIGNALS WITH THE TPA2005D1
TPA2005D1-Q1
SLOS474 – AUGUST 2005
The input resistors (R
I
) set the gain of the amplifier according to equation Equation 1 .
Resistor matching is very important in fully differential amplifiers. The balance of the output on thereference voltage depends on matched ratios of the resistors. CMRR, PSRR, and cancellation of the secondharmonic distortion diminish if resistor mismatch occurs. Therefore, it is recommended to use 1% toleranceresistors, or better, to keep the performance optimized. Matching is more important than overall tolerance.Resistor arrays with 1% matching can be used with a tolerance greater than 1%.
Place the input resistors very close to the TPA2005D1 to limit noise injection on the high-impedance nodes.
For optimal performance, the gain should be set to 2 V/V or lower. Lower gain allows the TPA2005D1 to operateat its best and keeps a high voltage at the input, making the inputs less susceptible to noise.
The TPA2005D1 is a high-performance class-D audio amplifier that requires adequate power-supply decouplingto ensure the efficiency is high and total harmonic distortion (THD) is low. For higher frequency transients,spikes, or digital hash on the line, a good low equivalent-series-resistance (ESR) ceramic capacitor, typically1µF, placed as close as possible to the device V
DD
lead, works best. Placing this decoupling capacitor close tothe TPA2005D1 is very important for the efficiency of the class-D amplifier, because any resistance orinductance in the trace between the device and the capacitor can cause a loss in efficiency. For filteringlower-frequency noise signals, a 10- µF, or greater, capacitor placed near the audio power amplifier also helps,but it is not required in most applications because of the high PSRR of this device.
The TPA2005D1 does not require input coupling capacitors if the design uses a differential source that is biasedfrom 0.5 V to V
DD
- 0.8 V (shown in Figure 26 ). If the input signal is not biased within the recommendedcommon-mode input range, if needing to use the input as a high pass filter (shown in Figure 27 ), or if using asingle-ended source (shown in Figure 28 ), input coupling capacitors are required.
The input capacitors and input resistors form a high-pass filter with the corner frequency, f
c
, determined inEquation 2 .
The value of the input capacitor is important to consider, as it directly affects the bass (low frequency)performance of the circuit. Speakers in wireless phones usually cannot respond well to low frequencies, so thecorner frequency can be set to block low frequencies in this application.
Equation 3 is reconfigured to solve for the input coupling capacitance.
If the corner frequency is within the audio band, the capacitors should have a tolerance of ±10% or better,because any mismatch in capacitance causes an impedance mismatch at the corner frequency and below.
For a flat low-frequency response, use large input coupling capacitors (1 µF). However, in a GSM phone theground signal is fluctuating at 217 Hz, but the signal from the codec does not have the same 217-Hz fluctuation.The difference between the two signals is amplified, sent to the speaker, and heard as a 217-Hz hum.
Most wireless phones or PDAs need to sum signals at the audio power amplifier or just have two signal sourcesthat need separate gain. The TPA2005D1 makes it easy to sum signals or use separate signal sources withdifferent gains. Many phones now use the same speaker for the earpiece and ringer, where the wireless phonewould require a much lower gain for the phone earpiece than for the ringer. PDAs and phones that have stereoheadphones require summing of the right and left channels to output the stereo signal to the mono speaker.
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Summing Two Differential Input Signals
Gain 1 VO
VI1 2150 k
RI1 V
V
(4)
Gain 2 VO
VI2 2150 k
RI2 V
V
(5)
_
+
IN–
IN+
PWM H–
Bridge
VO+
VO–
Internal
Oscillator CS
To Battery
VDD
GND
Bias
Circuitry
RI2
RI2
+
–
Differential
Input 1
SHUTDOWN
RI1
RI1
+
–
Differential
Input 2
Filter-Free Class D
Summing a Differential Input Signal and a Single-Ended Input Signal
Gain 1 VO
VI1 2150 k
RI1 V
V
(6)
Gain 2 VO
VI2 2150 k
RI2 V
V
(7)
CI2 1
2RI2 fc2
(8)
TPA2005D1-Q1
SLOS474 – AUGUST 2005
Two extra resistors are needed for summing differential signals (a total of 5 components). The gain for each inputsource can be set independently (see Equation 4 and Equation 5 and Figure 29 ).
If summing left and right inputs with a gain of 1 V/V, use R
I1
= R
I2
= 300 k Ω.
If summing a ring tone and a phone signal, set the ring-tone gain to gain 2 = 2 V/V, and the phone gain togain 1 = 0.1 V/V. The resistor values are:•R
I1
= 3 M Ωand R
I2
= 150 k Ω.
Figure 29. Application Schematic With TPA2005D1 Summing Two Differential Inputs
Figure 30 shows how to sum a differential input signal and a single-ended input signal. Ground noise can couplein through IN+ with this method. It is better to use differential inputs. The corner frequency of the single-endedinput is set by C
I2
, shown in Equation 8 . To ensure that each input is balanced, the single-ended input must bedriven by a low-impedance source even if the input is not in use.
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CI2 1
2150k20Hz
(9)
CI2 53pF
(10)
_
+
IN–
IN+
PWM H–
Bridge
VO+
VO–
Internal
Oscillator CS
To Battery
VDD
GND
Bias
Circuitry
RI2
RI2
Differential
Input 1
Filter-Free Class D
SHUTDOWN
RI1
RI1
Single-Ended
Input 2
CI2
CI2
Summing Two Single-Ended Input Signals
TPA2005D1-Q1
SLOS474 – AUGUST 2005
If summing a ring tone and a phone signal, the phone signal should use a differential input signal while the ringtone might be limited to a single-ended signal. If phone gain is set at gain 1 = 0.1 V/V, and the ring-tone gain isset to gain 2 = 2 V/V, the resistor values are:•R
I1
= 3 M Ωand R
I2
= 150 k Ω.
The high-pass corner frequency of the single-ended input is set by C
I2
. If the desired corner frequency is lessthan 20 Hz, then:
Figure 30. Application Schematic With TPA2005D1 Summing Differential Input andSingle-Ended Input Signals
Four resistors and three capacitors are needed for summing single-ended input signals. The gain and cornerfrequencies (f
c1
and f
c2
) for each input source can be set independently (see Equation 11 through Equation 14and Figure 31 ). Resistor, R
P
, and capacitor, C
P
, are needed on the IN+ terminal to match the impedance on theIN- terminal. The single-ended inputs must be driven by low-impedance sources, even if one of the inputs is notoutputting an ac signal.
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Gain 1 VO
VI1 2150 k
RI1 V
V
(11)
Gain 2 VO
VI2 2150 k
RI2 V
V
(12)
CI1 1
2RI1 fc1
(13)
CI2 1
2RI2 fc2
(14)
CPCI1 CI2
(15)
RPRI1 RI2
RI1 RI2
(16)
_
+
IN–
IN+
PWM H–
Bridge
VO+
VO–
Internal
Oscillator CS
To Battery
VDD
GND
Bias
Circuitry
RI2
RP
Filter-Free Class D
SHUTDOWN
RI1
Single-Ended
Input 2
CI2
CP
Single-Ended
Input 1
CI1
EFFICIENCY AND THERMAL INFORMATION
JA 1
Derating Factor 1
0.016 62.5°CW
(17)
TAMax TJMax JAPDmax 150 62.5 (0.2) 137.5°C
(18)
TPA2005D1-Q1
SLOS474 – AUGUST 2005
Figure 31. Application Schematic With TPA2005D1 Summing Two Single-Ended Inputs
The maximum ambient temperature depends on the heat-sinking ability of the PCB system. The derating factorfor the 2,5-mm x 2,5-mm MicroStar Junior package is shown in the dissipation rating table. Converting this to θ
JA
:
Given θ
JA
of 62.5 °C/W, the maximum allowable junction temperature of 150 °C, and the maximum internaldissipation of 0.2 W (worst case 5-V supply), the maximum ambient temperature can be calculated with equationEquation 18 .
Equation 18 shows that the calculated maximum ambient temperature is 137.5 °C at maximum power dissipationwith a 5-V supply; however, the maximum ambient temperature of the package is limited to 85 °C. Because of theefficiency of the TPA2005D1, it can be operated under all conditions to an ambient temperature of 85 °C. TheTPA2005D1 is designed with thermal protection that turns the device off when the junction temperaturesurpasses 150 °C to prevent damage to the IC. Also, using speakers more resistive than 8 Ωdramaticallyincreases the thermal performance by reducing the output current and increasing the efficiency of the amplifier.
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BOARD LAYOUT
Component Location
Trace Width
MicroStar Junior™ BGA Layout
0,28
mm
0,38
mm
0,25
mm
SD
NC
IN+
IN−
GND GND
GND
GND GND
GND GND
VDD
VDD
Vo+
Vo−
Solder Mask
Paste Mask
Copper Trace
8-Pin QFN (DRB) Layout
TPA2005D1-Q1
SLOS474 – AUGUST 2005
Place all the external components very close to the TPA2005D1. The input resistors need to be very close to theTPA2005D1 input pins so noise does not couple on the high-impedance nodes between the input resistors andthe input amplifier of the TPA2005D1. Placing the decoupling capacitor, C
S
, close to the TPA2005D1 is importantfor the efficiency of the class-D amplifier. Any resistance or inductance in the trace between the device and thecapacitor can cause a loss in efficiency.
Make the high current traces going to pins VDD, GND, V
O+
and V
O-
of the TPA2005D1 have a minimum width of0,7 mm. If these traces are too thin, the TPA2005D1 performance and output power will decrease. The inputtraces do not need to be wide, but do need to run side-by-side to enable common-mode noise cancellation.
Use the following MicroStar Junior BGA ball diameters:•0,25 mm diameter solder mask•0,28 mm diameter solder paste mask/stencil•0,38 mm diameter copper trace
Figure 32 shows how to lay out a board for the TPA2005D1 MicroStar Junior BGA.
Figure 32. TPA2005D1 MicroStar Junior BGA Board Layout (Top View)
Use the following land pattern for board layout with the 8-pin QFN (DRB) package. Note that the solder pasteshould use a hatch pattern to fill solder paste at 50% to ensure that there is not too much solder paste under thepackage.
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0,65 mm
0,38 mm
Solder Mask: 1,4 mm x 1,85 mm centered in package
0,7 mm
1,4 mm
Make solder paste a hatch pattern to fill 50%
3,3 mm
1,95 mm
0,33 mm plugged vias (5 places)
ELIMINATING THE OUTPUT FILTER WITH THE TPA2005D1
Effect on Audio
Traditional Class-D Modulation Scheme
TPA2005D1-Q1
SLOS474 – AUGUST 2005
Figure 33. TPA2005D1 8-Pin QFN (DRB) Board Layout (Top View)
This section focuses on why the user can eliminate the output filter with the TPA2005D1.
The class-D amplifier outputs a pulse-width modulated (PWM) square wave, which is the sum of the switchingwaveform and the amplified input audio signal. The human ear acts as a band-pass filter such that only thefrequencies between approximately 20 Hz and 20 kHz are passed. The switching frequency components aremuch greater than 20 kHz, so the only signal heard is the amplified input audio signal.
The traditional class-D modulation scheme, which is used in the TPA005Dxx family, has a differential output inwhich each output is 180 degrees out of phase and changes from ground to the supply voltage, V
DD
. Therefore,the differential pre-filtered output varies between positive and negative V
DD
, where filtered 50% duty cycle yields0 V across the load. The traditional class-D modulation scheme with voltage and current waveforms is shown inFigure 34 . Note that, even at an average of 0 V across the load (50% duty cycle), the current to the load is high,causing a high loss and thus causing a high supply current.
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0 V
–5 V
+5 V
Current
OUT+
Differential Voltage
Across Load
OUT–
TPA2005D1 Modulation Scheme
0 V
–5 V
+5 V
Current
OUT+
OUT–
Differential
Voltage
Across
Load
0 V
–5 V
+5 V
Current
OUT+
OUT–
Differential
Voltage
Across
Load
Output = 0 V
Output > 0 V
TPA2005D1-Q1
SLOS474 – AUGUST 2005
Figure 34. Traditional Class-D Modulation Scheme Output Voltage and Current Waveforms Into anInductive Load With No Input
The TPA2005D1 uses a modulation scheme that still has each output switching from 0 to the supply voltage.However, OUT+ and OUT- are now in phase with each other, with no input. The duty cycle of OUT+ is greaterthan 50% and OUT- is less than 50% for positive voltages. The duty cycle of OUT+ is less than 50% and OUT- isgreater than 50% for negative voltages. The voltage across the load remains at 0 V throughout most of theswitching period, greatly reducing the switching current, which reduces any I
2
R losses in the load.
Figure 35. The TPA2005D1 Output Voltage and Current Waveforms Into an Inductive Load
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Efficiency: Why You Must Use a Filter With the Traditional Class-D Modulation Scheme
Effects of Applying a Square Wave Into a Speaker
PSPKR PSUP–PSUP THEORETICAL (at max output power)
(19)
PSPKR
PSUP
POUT–PSUP THEORETICAL
POUT (at max output power)
(20)
PSPKR POUT 1
MEASURED 1
THEORETICAL(at max output power)
(21)
THEORETICAL RL
RL2rDS(on) (at max output power)
(22)
When to Use an Output Filter
TPA2005D1-Q1
SLOS474 – AUGUST 2005
The main reason that the traditional class-D amplifier needs an output filter is that the switching waveform resultsin maximum current flow. This causes more loss in the load, which causes lower efficiency. The ripple current islarge for the traditional modulation scheme because the ripple current is proportional to voltage multiplied by thetime at that voltage. The differential voltage swing is 2 ×V
DD
, and the time at each voltage is one-half the periodfor the traditional modulation scheme. An ideal LC filter is needed to store the ripple current from each half-cyclefor the next half-cycle, while any resistance causes power dissipation. The speaker is both resistive and reactive,whereas an LC filter is almost purely reactive.
The TPA2005D1 modulation scheme has very little loss in the load without a filter because the pulses are veryshort and the change in voltage is V
DD
instead of 2 ×V
DD
. As the output power increases, the pulses widen,making the ripple current larger. Ripple current could be filtered with an LC filter for increased efficiency, but formost applications the filter is not needed.
An LC filter with a cutoff frequency less than the class-D switching frequency allows the switching current to flowthrough the filter instead of the load. The filter has less resistance than the speaker, resulting in less powerdissipation, which increases efficiency.
If the amplitude of a square wave is high enough and the frequency of the square wave is within the bandwidthof the speaker, a square wave could cause the voice coil to jump out of the air gap and/or scar the voice coil. A250-kHz switching frequency, however, is not significant because the speaker cone movement is proportional to1/f
2
for frequencies beyond the audio band. Therefore, the amount of cone movement at the switching frequencyis very small. However, damage could occur to the speaker if the voice coil is not designed to handle theadditional power. To size the speaker for added power, the ripple current dissipated in the load must becalculated by subtracting the theoretical supplied power, P
SUP THEORETICAL
, from the actual supply power, P
SUP
, atmaximum output power, P
OUT
. The switching power dissipated in the speaker is the inverse of the measuredefficiency, η
MEASURED
, minus the theoretical efficiency, η
THEORETICAL
.
The maximum efficiency of the TPA2005D1 with a 3.6-V supply and an 8- Ωload is 86% from Equation 22 . UsingEquation 21 with the efficiency at maximum power (84%), we see that there is an additional 17 mW dissipated inthe speaker. The added power dissipated in the speaker is not an issue as long as it is taken into account whenchoosing the speaker.
Design the TPA2005D1 without an output filter if the traces from amplifier to speaker are short. The TPA2005D1passed FCC and CE radiated emissions with no shielding and with speaker trace wires 100 mm long or less.Wireless handsets and PDAs are great applications for class-D without a filter.
A ferrite bead filter often can be used if the design is failing radiated emissions without an LC filter, and thefrequency-sensitive circuit is greater than 1 MHz. This is good for circuits that just have to pass FCC and CEbecause FCC and CE only test radiated emissions greater than 30 MHz. If choosing a ferrite bead, choose onewith high impedance at high frequencies, but very low impedance at low frequencies.
Use an LC output filter if there are low-frequency (< 1 MHz) EMI-sensitive circuits and/or there are long leadsfrom amplifier to speaker.
Figure 36 and Figure 37 show typical ferrite bead and LC output filters.
18
www.ti.com
1 nF
Ferrite
Chip Bead
OUTP
OUTN
Ferrite
Chip Bead
1 nF
1 µF
1 µF
33 µH
33 µH
OUTP
OUTN
TPA2005D1-Q1
SLOS474 – AUGUST 2005
Figure 36. Typical Ferrite Chip Bead Filter (Chip bead example: NEC/Tokin: N2012ZPS121)
Figure 37. Typical LC Output Filter, Cut-Off Frequency of 27 kHz
19
PACKAGING INFORMATION
Orderable Device Status (1) Package
Type Package
Drawing Pins Package
Qty Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
TPA2005D1DRBQ1 ACTIVE SON DRB 8 3000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
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provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
PACKAGE OPTION ADDENDUM
www.ti.com 26-Oct-2005
Addendum-Page 1
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