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DEMO MANUAL DC1748A
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
VCC Input Supply Range LTM2883-5 4.5 5 5.5 V
LTM2883-3 3.0 3 3.6 V
VCC2 Regulated Output Voltage 4.75 5 5.25 V
Adjustable Output Voltage Range 3.0 5.5 V
Maximum Load Current 20 mA
V+Regulated Output Voltage 12 12.5 13 V
Adjustable Output Voltage Range 1.22 14 V
Maximum Load Current 20 mA
V–Regulated Output Voltage –12 –12.5 –13 V
Adjustable Output Voltage Range –1.22 14 V
Maximum Load Current 15 mA
fMAX Maximum Data Rate DI1 → O1, Ix → DOx, CL = 10pF 10 MHz
LTM2883-S, Bidirectional Communication
LTM2883-S, Unidirectional Communication
4
8
MHz
MHz
LTM2883-I 400 kHz
VIORM Maximum Working Insulation Voltage GND to GND2 560
400
VDC
VRMS
Common Mode Transient Immunity 30 kV/µs
DESCRIPTION
LTM2883 SPI/Digital or
I2C µModule Isolator with Adjustable ±12.5V
and 5V Regulated Power
Demonstration circuit 1748A is a serial peripheral interface
bus (SPI) or inter-IC bus (I2C) SPI/digital or I2C µModule
isolator with adjustable ±12.5V and 5V regulated power
featuring the LTM2883. The demo circuit features an EMI
optimized circuit confi guration and printed circuit board
layout. All components are integrated into the µModule
isolator. The demo circuit operates from a single external
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.
PERFORMANCE SUMMARY
(TA = 25°C)
supply on VCC. The part generates output voltages on VCC2,
V+, and V–, which may be adjusted by external program-
ming resistors. It communicates all necessary signaling
across the isolation barrier through LTC’s isolator µModule
technology.
Design fi les for this circuit board are available at
http://www.linear.com/demo
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DEMO MANUAL DC1748A
OPERATING PRINCIPLES
The LTM2883 contains an isolated DC/DC conversion
system, including a boost converter and inverting charge
pump, with multiple LDO’s to deliver power to the three
output voltage rails from VCC. Isolation is maintained by
the separation of GND and GND2 where signifi cant operat-
ing voltages and transients can exist without affecting the
operation of the LTM2883. The logic side ON pin enables
or shuts down the LTM2883. All logic side signals are
referenced to the logic supply pin VL. The LTM2883 is
available in two data bus confi gurations, SPI (-S) or I2C
(-I), and with two input voltage ranges, 3.0 to 3.6 volts
(-3) or 4.5 to 5.5 volts (-5).
SPI signaling is controlled by the logic inputs CS, SDI,
and SCK. SDOE controls the SDO output and is normally
connected to CS. The corresponding Isolated side output
signals are CS2, SDI2, and SCK2. SDO2 is the isolated
side SPI data input. All of the SPI communication channels
may be used as generic digital I/O.
I2C signaling is controlled by the logic inputs SDA and
SCL, corresponding to SDA2 and SCL2 on the isolated
side. The SCL channel is unidirectional supporting master
mode only I2C communication. SCL2 output is standard
CMOS push-pull drive. SDA signaling is bidirectional,
and includes an internal current source pull-up on SDA2
supporting up to 200pF of load capacitance.
Demo circuit 1748A is available in four confi gurations
supporting all versions of the LTM2883. Table 2 details
the demo circuit confi gurations.
Table 2.
DEMO CIRCUIT INPUT VOLTAGE COMMUNICATION
DC1748A-A 3.0V to 3.6V SPI/Digital
DC1748A-B 4.5V to 5.5V SPI/Digital
DC1748A-C 3.0V to 3.6V I2C
DC1748A-D 4.5V to 5.5V I2C
The demo circuit has been designed and optimized for low
RF emissions. To this end some features of the LTM2883
are not available for evaluation on the demo circuit. The
logic supply voltage VL is tied to VCC on the demo circuit,
and the ON pin is not available on the input pin header,
but may be controlled by jumper JP1. EMI mitigation
techniques used include the following.
1. Four layer PCB, allowing for isolated side to logic side
bridge capacitor. The bridge capacitor is formed be-
tween an inner layer of fl oating copper which overlaps
the logic side and isolated side ground planes. This
structure creates two series capacitors, each with
approximately .008" of insulation, supporting the full
dielectric withstand rating of 2500VRMS. The bridge
capacitor provides a low impedance return path for
injected currents due to parasitic capacitances of the
LTM2883’s signal and power isolating elements.
2. Discrete bridge capacitors (C3, C4) mounted between
GND2 and GND. The discrete capacitors provide ad-
ditional attenuation at frequencies below 400MHz.
Capacitors are safety rated type Y2, manufactured by
Murata, part number GA342QR7GF471KW01L.
3. Board/ground plane size has been minimized. This
reduces the dipole antenna formed between the logic
side and isolated side ground planes.
4. Top signal routing and ground fl oods have been opti-
mized to reduce signal loops, minimizing differential
mode radiation.
5. Common mode fi ltering is integrated into the input and
output pin headers. Filtering helps to reduce emissions
caused by conducted noise and minimizes the effects
of cabling to common mode emissions.
6. A combination of low ESL and high ESR decoupling is
used. A low ESL ceramic capacitor is located close to
the module minimizing high frequency noise conduction.
A high ESR tantalum capacitor is included to minimize
board resonances and prevent voltage spikes due to
hot plugging of the supply voltage.
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DEMO MANUAL DC1748A
OPERATING PRINCIPLES
Figure 1. DC1748 Radiated Emissions
EMI performance is shown in Figure 1, measured using
a Gigahertz Transverse Electromagnetic (GTEM) cell and
method detailed in IEC 61000-4-20, “Testing and Mea-
surement Techniques – Emission and Immunity Testing
in Transverse Electromagnetic Waveguides”.
The demo circuit includes provisions for programming
the three output voltage rails. Resistors R5, R6, and R7
allow the V+, V–, and VCC2 power rails, respectively, to
be reduced from their nominal operating voltages. The
formulas presented in Table 3 allow selection of the ap-
propriate resistor values.
Table 3.
VOLTAGE RAIL RESISTOR TO REDUCE OUTPUT
V+R5 = 150k • (V+ – 1.22)/(12.5 – V+)
V–R6 = 150k • (1.22 + V–)/(–12.5 – V–)
VCC2 R7 = 110k • (VCC2 – 0.6)/(5 – VCC2)
FREQUENCY (MHz)
0
–30
dBµV/m
–20
0
10
20
600 700 800 900
60
DC1748A F01
–10
100 200 300 400 500 1000
30
40
50
DETECTOR = QuasiPeak
RBW = 120kHz
VBW = 300kHz
SWEEP TIME = 17s
# OF POINTS = 501
DC1748A-A
DC1748A-B
CISPR 22 CLASS B LIMIT
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DEMO MANUAL DC1748A
Demonstration circuit 1748A is easy to set up and evalu-
ate the performance of the LTM2883. Refer to Figure 2
for proper measurement equipment setup and follow the
procedure below.
NOTE: When measuring the input or output voltage ripple
or high speed signals, care must be taken to avoid a long
ground lead on the oscilloscope probe.
1. Install JP1 in the ON (default) position.
2. With power off, connect the input power supply to VCC
and GND on pin header J1.
QUICK START PROCEDURE
3. Turn on the power at the input.
NOTE: Make sure that the input voltage does not
exceed 6V.
4. Check for the proper output voltages. VCC2 = 5V,
V+ = 12.5V, and V– = –12.5V on pin header J2.
5. Once the proper output voltages are established, con-
nect signals to J1 and J2 pin headers as appropriate.
The header pin names and locations are detailed on the
demo board silkscreen below the pin headers.
Figure 2. Demo Board Setup
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DEMO MANUAL DC1748A
Layer 1. Top Layer
PCB LAYOUT
Layer 2. Ground Plane
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DEMO MANUAL DC1748A
Layer 3. Signal Layer
PCB LAYOUT
Layer 4. Bottom Layer
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DEMO MANUAL DC1748A
PARTS LIST
ITEM QTY REFERENCE PART DESCRIPTION MANUFACTURER/PART NUMBER
Required Circuit Components
1 1 U1-A IC, LTM2883CY-3S Linear Technology LTM2883CY-3S#PBF
1 U1-B IC, LTM2883CY-5S Linear Technology LTM2883CY-5S#PBF
1 U1-C IC, LTM2883CY-3I Linear Technology LTM2883CY-3I#PBF
1 U1-D IC, LTM2883CY-5I Linear Technology LTM2883CY-5I#PBF
Hardware/Components (For Demo Board Only)
2 1 C1 Capacitor, Tantalum 10F 10V 20% TAJA AVX TAJA106M010RNJ
3 1 C2 Capacitor, Ceramic 1F 10V 20% 0508 Murata LLL219R71A105MA01L
4 2 C3, C4 Capacitor, Ceramic 470pF 250VAC 10% 1808 Murata GA342QR7GF471KW01L
5 2 J1, J2 0.1" Double Row Header, 5 × 2 Pin Samtec TSW-105-22-G-D
6 2 J1, J2 0.1" Ferrite Plate, 5 × 2 Hole Fair Rite 2644247101
7 1 J2 Connection, Filtered, DSUB 9-Pin Kobiconn 152-3609
8 1 JP1 2mm Single Row Header, 3-Pin Samtec TMM-103-02-L-S
9 1 JP1 Shunt Samtec 2SN-BK-G
10 1 R1-C Resistor, Chip 10k 1% 0805 Yageo RC0805FR-0710KL
1 R1-D Resistor, Chip 10k 1% 0805 Yageo RC0805FR-0710KL
11 1 R2-C Resistor, Chip 10k 1% 0805 Yageo RC0805FR-0710KL
1 R2-D Resistor, Chip 10k 1% 0805 Yageo RC0805FR-0710KL
12 1 R3-C Resistor, Chip 0 0805 Yageo RC0805FR-070RL
1 R3-D Resistor, Chip 0 0805 Yageo RC0805FR-070RL
13 1 R4-A Resistor, Chip 0 0805 Yageo RC0805FR-070RL
1 R4-B Resistor, Chip 0 0805 Yageo RC0805FR-070RL
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DEMO MANUAL DC1748A
SCHEMATIC DIAGRAM
(DC1748A-A/DC1748A-B)
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DEMO MANUAL DC1748A
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation
that the interconnection of its circuits as described herein will not infringe on existing patent rights.
SCHEMATIC DIAGRAM
(DC1748A-C/DC1748A-D)
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DEMO MANUAL DC1748A
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com
© LINEAR TECHNOLOGY CORPORATION 2010
LT 1210 • PRINTED IN USA
DEMONSTRATION BOARD IMPORTANT NOTICE
Linear Technology Corporation (LTC) provides the enclosed product(s) under the following AS IS conditions:
This demonstration board (DEMO BOARD) kit being sold or provided by Linear Technology is intended for use for ENGINEERING DEVELOPMENT
OR EVALUATION PURPOSES ONLY and is not provided by LTC for commercial use. As such, the DEMO BOARD herein may not be complete
in terms of required design-, marketing-, and/or manufacturing-related protective considerations, including but not limited to product safety
measures typically found in finished commercial goods. As a prototype, this product does not fall within the scope of the European Union direc-
tive on electromagnetic compatibility and therefore may or may not meet the technical requirements of the directive, or other regulations.
If this evaluation kit does not meet the specifications recited in the DEMO BOARD manual the kit may be returned within 30 days from the date
of delivery for a full refund. THE FOREGOING WARRANTY IS THE EXCLUSIVE WARRANTY MADE BY THE SELLER TO BUYER AND IS IN LIEU
OF ALL OTHER WARRANTIES, EXPRESSED, IMPLIED, OR STATUTORY, INCLUDING ANY WARRANTY OF MERCHANTABILITY OR FITNESS
FOR ANY PARTICULAR PURPOSE. EXCEPT TO THE EXTENT OF THIS INDEMNITY, NEITHER PARTY SHALL BE LIABLE TO THE OTHER FOR
ANY INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES.
The user assumes all responsibility and liability for proper and safe handling of the goods. Further, the user releases LTC from all claims
arising from the handling or use of the goods. Due to the open construction of the product, it is the user’s responsibility to take any and all
appropriate precautions with regard to electrostatic discharge. Also be aware that the products herein may not be regulatory compliant or
agency certified (FCC, UL, CE, etc.).
No License is granted under any patent right or other intellectual property whatsoever. LTC assumes no liability for applications assistance,
customer product design, software performance, or infringement of patents or any other intellectual property rights of any kind.
LTC currently services a variety of customers for products around the world, and therefore this transaction is not exclusive.
Please read the DEMO BOARD manual prior to handling the product. Persons handling this product must have electronics training and
observe good laboratory practice standards. Common sense is encouraged.
This notice contains important safety information about temperatures and voltages. For further safety concerns, please contact a LTC applica-
tion engineer.
Mailing Address:
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Copyright © 2004, Linear Technology Corporation
