DATA SHEE
T
THICK FILM CHIP RESISTORS
Introduction
Product Specification – Mar 25, 2008 V.7
www.yageo.com
Mar 25, 2008 V.7
INTRODUCTION
Thick film technology
Product specification
Chip Resistor Surface Mount
2
16
CTC: This unique number is an easily-readable
code. Global part number is preferred.
 15 digits code (PHYCOMP CTC): Phycomp
branded products
 14~18 digits code (Global part number):
Yageo/Phycomp branded products
12NC: In general,the tolerance,packing and
resistance code are integral parts of this number.
 Phycomp branded product
Further informations will be mentioned in the
relevant data sheet.
FUNCTIONAL DESCRIPTION
The functional description includes: nominal
resistance range and tolerance, limiting voltage,
temperature coefficient, absolute maximum
dissipation, climatic category and stability.
The limiting voltage (DC or RMS) is the maximum
voltage that may be continuously applied to the
resistor element, see “IEC publications 60115-8”.
The laws of heat conduction, convection and
radiation determine the temperature rise in a
resistor owing to power dissipation. The maximum
body temperature usually occurs in the middle of the
resistor and is called the hot-spot temperature.
In the normal operating temperature range of chip
resistors the temperature rise at the hot-spot, .T, is
proportional to the power dissipated: ∆T = A × P.
The proportionally constant ‘A’ gives the
temperature rise per Watt of dissipated power and
can be interpreted as a thermal resistance in K/W.
This thermal resistance is dependent on the heat
conductivity of the materials used (including the
PCB), the way of mounting and the dimensions of the
resistor. The sum of the temperature rise and the
ambient temperature is:
Tm = Tamb + ∆T
where:
Tm = hot-spot temperature
Tamb = ambient temperature
∆T = temperature rise at hot-spot.
The stability of a chip resistor during endurance tests
is mainly determined by the hot-spot temperature
and the resistive materials used.
INTRODUCTION
Data in data sheets is presented - whenever possible
-according to a 'format', in which the following
chapters are stated:
TITLE
SCOPE
APPLICATION
FEATURES
ORDERING INFORMATION
MARKING
CONSTRUCTION
DIMENSIONS
ELECTRICAL CHARACTERISTICS
PACKING STYLE AND PACKAGING QUANTITY
FUNCTIONAL DESCRIPTION
TESTS AND REQUIREMENTS
The chapters listed above are explained in this
section “Introduction Thick Film Chip Resistors”, with
detailed information in the relevant data sheet.
Chapters “Mounting”, “Packing”, and “Marking” are
detailed in separate sections.
DESCRIPTION
All thick film types of chip resistors have a
rectangular ceramic body. The resistive element is a
metal glaze film. The chips have been trimmed to the
required ohmic resistance by cutting one or more
grooves in the resistive layer. This process is
completely computer controlled and yields a high
reliability. The terminations are attached using either
a silver dipping method or by applying nickel
terminations, which are covered with a protective
epoxy coat, finally the two external terminations
(matte tin on Ni-barrier) are added.
The resistive layer is coated with a colored
protective layer. This protective layer provides
electrical, mechanical and/or environmental
protection - also against soldering flux and cleaning
solvents, in accordance with “MIL-STD-202G”, method
215 and “IEC 60115-4.29”. Yageo thick film chip
resistor is flameproof and can meet “UL94V-0”.
ORDERING INFORMATION - 12NC & GLOBAL
CLEAR TEXT CODE
Resistors are ordered in two ways. Both ways give
logistic and packing information.
www.yageo.com
Mar 25, 2008 V.7
INTRODUCTION
Thick film technology
Product specification
Chip Resistor Surface Mount
3
16
S
SU
UM
MM
MA
AR
RI
IZ
ZI
IN
NG
G
Description Relationship
Dimensions, conductance of materials and
mounting determine heat resistance
Heat resistance × dissipation gives temperature rise
Temperature rise + ambient temperature give hot-spot
temperature
P
PE
ER
RF
FO
OR
RM
MA
AN
NC
CE
E
When specifying the performance of a resistor, the
dissipation is given as a function of the hot-spot
temperature, with the ambient temperature as a
parameter.
From ∆T = A × P and Tm = Tamb ∆T it follows
that:
A
TT
P
amb
m
If P is plotted against Tm for a constant value of A,
parallel straight lines are obtained for different
values of the ambient temperature. The slope of
these lines,
A
I
dT
dP
m
handbook, full pagewidth
MGA208
Rnom
2.6%
1.6%
1.6%
2.6%
T ( C)
o
16 Ω
15525055
26 Ω
Fig. 1 Temperature coefficient.
is the reciprocal of the heat resistance and is the
characteristic for the resistor and its environment.
T
TH
HE
E
T
TE
EM
MP
PE
ER
RA
AT
TU
UR
RE
E
C
CO
OE
EF
FF
FI
IC
CI
IE
EN
NT
T
The temperature coefficient of resistance is a ratio
which indicates the rate of increase (decrease) of
resistance per degree (°C) increase (decrease) of
temperature within a specified range, and is
expressed in parts per million per °C (ppm/°C).
E
XAMPLE
If the temperature coefficient of a resistor of
R
nom
= 1 k
X
between –55 °C and +155 °C is ±200
ppm/°C, its resistance will be:
at 25 °C:
1,000
X
(nominal = rated value)
at +155 °C:
1,000
X
±(130 × 200 ppm/°C) × 1,000
X
= 1,026
X
or 974
X
at –55 °C:
1,000
X
±(80 × 200 ppm/°C) × 1,000
X
= 1,016
X
or 984
X
If the temperature coefficient is specified as ≤200
ppm/°C the resistance will be within the shaded area
as shown in Fig. 1.
www.yageo.com
Mar 25, 2008 V.7
INTRODUCTION
Thick film technology
Product specification
Chip Resistor Surface Mount
4
16
N
NO
OI
IS
SE
E
Most resistors generate noise due to the passage of
current through the resistor. This noise is dependent
on the amount of current, the resistive material and
the physical construction of the resistor. The
physical construction is partly influenced by the laser
trimming process, which cuts a groove in the
resistive material. Typical current noise levels are
shown in Fig. 2.
F
FR
RE
EQ
QU
UE
EN
NC
CY
Y
B
BE
EH
HA
AV
VI
IO
OU
UR
R
Resistors in general are designed to function
according to ohmic laws. This is basically true of
rectangular chip resistors for frequencies up to 100
kHz. At higher frequencies, the capacitance of the
terminations and the inductance of the resistive path
length begin to have an effect.
Basically, chip resistors can be represented by an
ideal resistor switched in series with a coil and both
switched parallel to a capacitor. The values of the
capacitance and inductance are mainly determined by
the dimensions of the terminations and the
conductive path length. The trimming pattern has a
negligible influence on the inductance, as the path
length is not influenced. Also, its influence on the
capacitance is negligible as the total capacitance is
largely determined by the terminations.
The environment surrounding chips (e.g. landing
paths, nearby tracks and the material of the printed-
circuit board) has a large influence on the behaviour
of the chip on the printed-circuit board.
12
8
4
0
28
24
36
32
20
16
1 10 100 1k 1M
R (
Ω
)
SCR028
100 k10 k 10 M
noise
level
μ
V
V
Fig. 2
Typical noise levels as a function of rated resistance
Size 1206
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Mar 25, 2008 V.7
INTRODUCTION
Thick film technology
Product specification
Chip Resistor Surface Mount
5
16
0
2.0
1010
SCR027
10 9
10 8
10 7
10 6
0.4
0.8
1.2
1.6
Z
R
f (Hz)
R = 1 MΩ
nR = 100 kΩ
nR = 10 kΩ
nR = 1 kΩ
n
R = 100 Ω
n
R = 10 Ω
n
R = 1 Ω
n
Fig. 4 Impedance as a function of frequency for a chip resistor
Size 0402
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Mar 25, 2008 V.7
INTRODUCTION
Thick film technology
Product specification
Chip Resistor Surface Mount
6
16
handbook, full pagewidth
0
2.0
10
10
MLB716
10
9
10
8
10
7
10
6
0.4
0.8
1.2
1.6
Z
R
f (Hz)
R = 1 MΩ
nR = 100 kΩ
nR = 10 kΩ
nR = 1 kΩ
n
R = 100 Ω
n
R = 10 Ω
n
R = 1 Ω
n
Fig. 5 Impedance as a function of frequency for a chip resistor
handbook, full pagewidth
100
100
1010
MLB717
10 9
10 8
10 7
10 6
60
20
20
60
f (Hz)
R = 1 MΩ
nR = 100 kΩ
nR = 10 kΩ
nR = 1 kΩ
n
R = 100 Ω
n
R = 10 Ω
n
R = 1 Ω
n
ϕ
(deg)
Fig. 6 Phase shift as a function of frequency for a chip resistor
Size 0603
Size 0603
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Mar 25, 2008 V.7
INTRODUCTION
Thick film technology
Product specification
Chip Resistor Surface Mount
7
16
handbook, full pagewidth
0
2.0
10
10
MLB718
10
9
10
8
10
7
10
6
0.4
0.8
1.2
1.6
Z
R
f (Hz)
R = 1 MΩ
nR = 100 kΩ
nR = 10 kΩ
nR = 1 kΩ
n
R = 100 Ω
n
R = 10 Ω
n
R = 1 Ω
n
Fig. 7 Impedance as a function of frequency for a chip resistor
handbook, full pagewidth
100
100
1010
MLB719
10 9
10 8
10 7
10 6
60
20
20
60
f (Hz)
R = 1 MΩ
nR = 100 kΩ
nR = 10 kΩ
nR = 1 kΩ
n
R = 100 Ω
n
R = 10 Ω
n
R = 1 Ω
n
ϕ
(deg)
Fig. 8 Phase shift as a function of frequency for a chip resistor
Size 0805
Size 0805
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Mar 25, 2008 V.7
INTRODUCTION
Thick film technology
Product specification
Chip Resistor Surface Mount
8
16
handbook, full pagewidth
0
2.0
1010
MLB720
10 9
10 8
10 7
10 6
0.4
0.8
1.2
1.6
Z
R
f (Hz)
R = 1 MΩ
nR = 100 kΩ
nR = 10 kΩ
nR = 1 kΩ
n
R = 100 Ω
n
R = 10 Ω
n
R = 1 Ω
n
Fig. 9 Impedance as a function of frequency for a chip resistor
Size 1206
handbook, full pagewidth
100
100
1010
MLB721
10 9
10 8
10 7
10 6
60
20
20
60
f (Hz)
R = 1 MΩ
nR = 100 kΩ
nR = 10 kΩ
nR = 1 kΩ
n
R = 100 Ω
n
R = 10 Ω
n
R = 1 Ω
n
ϕ
(deg)
Fig. 10 Phase shift as a function of frequency for a chip resistor
Size 1206
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Mar 25, 2008 V.7
INTRODUCTION
Thick film technology
Product specification
Chip Resistor Surface Mount
9
16
PARAMETER VALUE
Exponential time constant
50 to 700 µs
Repetition time
12 to 25 s
Amount of pulses
5 to 10
Ta b l e 1 Pulse load limits
P
PU
UL
LS
SE
E-
-L
LO
OA
AD
D
B
BE
EH
HA
AV
VI
IO
OU
UR
R
The load, due to a single pulse at
which chip resistors fail by going
open circuit, is determined by
shape and time. A standard way
to establish pulse load limits is
shown in Table 1.
With this test, it can be
determined at which applied
voltage the resistive value
changes about 0.5% of its nominal
value under the above mentioned
t
hat may be applied in a regular
way can be determined in a
similar manner.
pulse conditions. Fig.
11
shows
test results for the size 1206
chip
resistors. If applied regularly the
load is destructive, therefore the
load must not be applied
regularly during the load life of
the resistors. However, the
magnitude of a pulse at which
failure occurs is of little practical
value.
The maximum ‘single-pulse’ load
10 10
2
10
3
10
4
10
5
10
6
10
7
MBD641
10
4
10
10
2
10
3
V
R (Ω)
n
1.2/50 μs
10/700 μs
max
(V)
Fig. 11 Maximum permissible peak pulse voltage )V
ˆ
(
max
without failing to ‘open circuit’ in accordance with DIN IEC 60040 (CO) 533
Size 1206
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Mar 25, 2008 V.7
INTRODUCTION
Thick film technology
Product specification
Chip Resistor Surface Mount
10
16
600
200
0
400
MBD586
10
1
1
10
2
10
3
10
4
10
5
10
6
Vmax
(V)
t (s)
i
Fig. 13 Pulse on a regular basis; maximum permissible peak pulse voltage )V
ˆ
(
max
as a function of pulse duration (t
i
).
handbook, full pagewidth
10 6
MBC188
103
10 1
1
10
102
10 510 410 310 2110 1
Pmax
(W)
t (s)
i
t / t = 1000
pi
single pulse
repetitive pulse
Size 1206
Size 1206
Fig. 12 Pulse on a regular basis; maximum permissible peak pulse power )P
ˆ
(
max
as a function of pulse duration for R 10 kΩ, single pulse
and repetitive pulse t
p
/t
i
= 1,000
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Mar 25, 2008 V.7
INTRODUCTION
Thick film technology
Product specification
Chip Resistor Surface Mount
11
16
D
DE
ET
TE
ER
RM
MI
IN
NA
AT
TI
IO
ON
N
O
OF
F
P
PU
UL
LS
SE
E-
-L
LO
OA
AD
D
The graphs in Figs 12 and 13 may be used to
determine the maximum pulse-load for a resistor.

For repetitive rectangular pulses:

R
V
ˆ
2
i
must be lower than the value of
max
P
ˆ given
by the solid lines of Fig. 12 for the applicable
value of ti and duty cycle tp/ti.
 i
V
ˆ
must be lower than the value of max
V
ˆ given
in Fig. 13 for the applicable value of ti.
For repetitive exponential pulses:
 As for rectangular pulses, except that ti = 0.5
.
For single rectangular pulses:

R
V
ˆ2
i must be lower than the max
P
ˆ given by the
dashed line of Fig. 12 for the applicable value of
ti.
 i
V
ˆ
must be lower than the value of max
V
ˆ given
in Fig. 13 for the applicable value of ti.
D
DE
EF
FI
IN
NI
IT
TI
IO
ON
NS
S
O
OF
F
P
PU
UL
LS
SE
ES
S
S
INGLE PULSE
The resistor is considered to be operating under
single pulse conditions if, during its life, it is loaded
with a limited number (approximately 1,500) of
pulses over long time intervals (greater than one
hour).
R
EPETITIVE PULSE
The resistor is operating under repetitive pulse
conditions if it is loaded by a continuous train of
pulses of similar power.
The dashed line in Fig. 12 shows the observed
maximum load for the Size 1206 chip resistors under
single-pulse loading.
More usually, the resistor must withstand a
continuous train of pulses of repetition time ‘tp’
during which only a small resistance change is
acceptable. This resistance change (∆R/R) is equal to
the change permissible under continuous load
conditions. The continuous pulse train and small
permissible resistance change reduces the maximum
handling capability.
The continuous pulse train maximum handling
capacity of chip resistors has been determined
experimentally.
Measurements have shown that the handling capacity
varies with the resistive value applied.
However, maximum peak pulse voltages as indicated
in Fig. 13, should not be exceeded.
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Mar 25, 2008 V.7
INTRODUCTION
Thick film technology
Product specification
Chip Resistor Surface Mount
12
16
V
t
YNSC059
^
0.37 Vmax
^
Vmax
τ
t
p
E
EX
XA
AM
MP
PL
LE
ES
S
Determine the stability of a typical resistor for
operation under the following pulse-load conditions.
C
ONTINUOUS PLUS TRAIN
A 100 X
resistor is required to operate under the
following conditions:
Vi = 10 V; ti = 10–5 s; tp = 10–2 s
Therefore:
1
100
10
P
ˆ2
W and 000,1
10
10
t
t
5
2
i
p
For t
i
= 10
–5
s and
000,1
t
t
i
p
, Fig. 12 gives
max
P
ˆ = 2 W and Fig. 13 gives
max
V
ˆ= 400 V
As the operating conditions
P
ˆ
= 1 W and
i
V
ˆ= 10 V
are lower than these limiting values, this resistor
may be safely used.
S
INGLE PLUSE
A 10 k
X
resistor is required to operate under the
following conditions:
i
V
ˆ= 250 V; t
i
= 10
–5
s
Therefore:
25.6
000,10
250
P
ˆ
2
max
W
The dashed curve of Fig. 12 shows that at t
i
= 10
–5
s,
the permissible
max
P
ˆ= 10 W and Fig. 13 shows a
permissible
max
V
ˆ of 400 V, so this resistor may be
used.
MGA206
t
i
V
t
t
p
^
Vi
Fig. 14 Rectangular pulses
D
DE
EF
FI
IN
NI
IT
TI
IO
ON
N
O
OF
F
S
SY
YM
MB
BO
OL
LS
S
(
(S
SE
EE
E
F
FI
IG
GU
UR
RE
ES
S
1
11
1,
,
1
12
2,
,
1
13
3,
,
1
14
4
A
AN
ND
D
1
15
5)
)
Symbol Description
P
ˆ
applied peak pulse power
max
P
ˆ
maximum permissible peak pulse power (Fig.12)
i
V
ˆ
applied peak pulse voltage (Fig. 14)
max
V
ˆ
maximum permissible peak pulse voltage (Figs. 11, 13
and 15)
R
nom
nominal resistance value
t
i
pulse duration (rectangular pulses)
t
P
pulse repetition time
time constant (exponential pulses)
T
amb
ambient temperature
T
m (max.)
maximum hot-spot temperature of the resistor
Fig. 15 Exponential pulses
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Mar 25, 2008 V.7
INTRODUCTION
Thick film technology
Product specification
Chip Resistor Surface Mount
13
16
MECHANICAL DAT
A
M
MA
AS
SS
S
P
PE
ER
R
1
10
00
0
U
UN
NI
IT
TS
S
Ta b l e 3
R
esistor arrays, network and RF attenuators
PRODUCT SIZE CODE TYPE MASS (g)
0404 ATV321
0.100
2 x 0201 (4P2R) YC102
0.052
2 × 0402 (4P2R) YC122
0.100
2 x 0402 (4P2R) TC122
0.112
4 × 0402 (8P4R) YC124
0.281
4 x 0402 (8P4R) TC124
0.311
2 x 0603 (4P2R) YC162
0.376
4 × 0603 (8P4R) YC/TC164
1.031
1220 (8P4R) YC324
2.703
0616 (16P8R) YC248
0.885
0612 (10P8R) YC158
0.855
1225 (10P8R) YC358
3.333
PRODUCT SIZE CODE MASS (g)
0201
0.016
0402
0.058
0603
0.192
0805
0.450
1206
0.862
1210
1.471
1218
2.703
2010
2.273
2512
3.704
Ta b l e 2 Single resistor chips type
FAILURE IN TIME (FI
T
)
C
CA
AL
LC
CU
UL
LA
AT
TI
IO
ON
N
M
ME
ET
TH
HO
OD
D:
:
According to Yageo calculation, assuming components life time is following exponential distribution and using
60% confidence interval (60% C.I.) in Homogeneous Poisson Process; therefore the FIT is calculated by number
of tested Failure in Endurance Test (rated power at 70°C for 1,000 hours,
“IEC 60115-1 4.25.1”
) as following:
9
10
test timed
A
ccumulate
failure
estimated
o
f
number
C.I. 60%
)( FIT
TYPE FIT in
1999-2007
ACCUMULATION
TEST in 1999-2007 (hours)
RC0201
146 6,280,000
RC0402
65 14,150,000
RC0603
63 14,650,000
RC0805
63 14,720,000
RC1206
69 13,380,000
RC1210
78 11,750,000
RC2010
65 14,190,000
RC2512
81 11,310,000
Ta b l e 4 FIT of single resistor chips
TYPE FIT in
1999-2007
ACCUMULATION
TEST in 1999-2007 (hours)
YC122
590
1,560,000
TC164
548
1,560,000
YC124
390
1,560,000
YC158
390
1,560,000
YC164
339
1,710,000
YC248
390
1,560,000
YC324
390
1,560,000
YC358
390
1,560,000
Ta b l e 5
FIT of resistor arrays and networ
k
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Mar 25, 2008 V.7
INTRODUCTION
Thick film technology
Product specification
Chip Resistor Surface Mount
14
16
TESTS AND PROCEDURES
To guarantee zero defect production standard, Statistical
Process Control is an essential part of our production
processes. Furthermore, our production process is operating in accordance with
“ISO 9000”
.
Essentially all tests on resistors are carried out in accordance with the schedule of
“IEC publication 60115-1”
in
the specified climatic category and in accordance with
“IEC publication 60068”
,
“MIL-STD”
,
“JIS C 5202”
, and
“EIA/IS”
,
etc. In some instances deviations from the IEC recommendations are made.
Tests and their requirements are described in detail in the data sheets.
handbook, halfpage
300
TC
(10 /K)
6200
100
0
100
200
300 1 10 100 1k 1M
R (Ω)
MGA210
100 k10 k 10 M
spec. level
spec. level
Fig. 16 Typical temperature coefficients between the lower
and upper category temperatures
Size 1206
handbook, halfpage
1.2
0.8
0.4
0
0.4
0.8
1.2 1 10 100 1k 1M
R (Ω)
MGA214
100 k10 k 10 M
spec. level
spec. level
(%)
RΔ
R
Fig. 17
Typical percentage change in resistance after soldering
for 10 seconds at 270 °C, completely immersed
Size 1206
handbook, halfpage
12
8
4
0100 1k 1M
R (Ω)
MGA213
100 k10 k
noise
level
spec. level
μV
V
Fig. 18 Typical noise level as a function of rated resistance
measured using Quantech - equipment
Size 1206
handbook, halfpage
2
1
0
1
2
1 10 100 1k 1M
R (Ω)
MGA216
100 k10 k 10 M
spec. level
spec. level
(%)
RΔ
R
Fig. 19
Typical percentage change in resistance after 56 days
at 40 °C and 90 to 95% relative humidity loaded with
P
nom
Size 1206
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Mar 25, 2008 V.7
INTRODUCTION
Thick film technology
Product specification
Chip Resistor Surface Mount
15
16
handbook, halfpage
1.2
0.8
0.4
0
0.4
0.8
1.2 1 10 100 1k 1M
R (Ω)
MGA218
100 k10 k 10 M
spec. level
spec. level
(%)
RΔ
R
Fig. 20 Typical percentage change in resistance after 1,000
hours loaded with P
nom
at 70 °C ambient temperature
Size 1206
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Mar 25, 2008 V.7
INTRODUCTION
Thick film technology
Product specification
Chip Resistor Surface Mount
16
16
REVISION HISTORY
REVISION DATE CHANGE NOTIFICATION DESCRIPTION
Version 7 Mar 25, 2008 - - Headline changes to Introduction Thick Film Chip Resistor
- Add international standard and failures in time
Version 6 Dec 15, 2004 - - Converted to Yageo / Phycomp brand
- Separated “Marking” into an individual data sheet
- Mechanical data extended from sizes 0201 to 2512, resistor arrays/network
and attenuators as well
- Impedance chart for size 0402 added
Version 5 Jul 23, 2004 - - Size extended to 0201
Version 4 Aug 19, 2004 - - Updated company logo
Version 3 May 30, 2001 - - Converted to Phycomp brand